sim: unify sim-cpu usage
[deliverable/binutils-gdb.git] / sim / msp430 / sim-main.h
1 /* Simulator for TI MSP430 and MSP430X processors.
2
3 Copyright (C) 2012-2015 Free Software Foundation, Inc.
4 Contributed by Red Hat, Inc.
5
6 This file is part of simulators.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #ifndef _MSP430_MAIN_SIM_H_
22 #define _MSP430_MAIN_SIM_H_
23
24 #include "sim-basics.h"
25 #include "sim-signal.h"
26
27 typedef unsigned32 sim_cia;
28
29 typedef struct _sim_cpu SIM_CPU;
30
31 #include "msp430-sim.h"
32 #include "sim-base.h"
33
34 struct _sim_cpu
35 {
36 /* Simulator specific members. */
37 struct msp430_cpu_state state;
38 sim_cpu_base base;
39 };
40
41 struct sim_state
42 {
43 sim_cpu *cpu[MAX_NR_PROCESSORS];
44
45 asymbol **symbol_table;
46 long number_of_symbols;
47 #define STATE_SYMBOL_TABLE(sd) ((sd)->symbol_table)
48 #define STATE_NUM_SYMBOLS(sd) ((sd)->number_of_symbols)
49
50 /* Simulator specific members. */
51 sim_state_base base;
52 };
53
54 #define MSP430_CPU(sd) (STATE_CPU ((sd), 0))
55 #define MSP430_CPU_STATE(sd) (MSP430_CPU ((sd)->state))
56
57 #define CIA_GET(CPU) ((CPU)->state.regs[0] + 0)
58 #define CIA_SET(CPU,VAL) ((CPU)->state.regs[0] = (VAL))
59
60 #include "sim-config.h"
61 #include "sim-types.h"
62 #include "sim-engine.h"
63 #include "sim-options.h"
64
65 #define MAYBE_TRACE(type, cpu, fmt, ...) \
66 do \
67 { \
68 if (TRACE_##type##_P (cpu)) \
69 trace_generic (CPU_STATE (cpu), cpu, TRACE_##type##_IDX, \
70 fmt, ## __VA_ARGS__); \
71 } \
72 while (0)
73
74 #define TRACE_INSN(cpu, fmt, ...) MAYBE_TRACE (INSN, cpu, fmt, ## __VA_ARGS__)
75 #define TRACE_DECODE(cpu, fmt, ...) MAYBE_TRACE (DECODE, cpu, fmt, ## __VA_ARGS__)
76 #define TRACE_EXTRACT(cpu, fmt, ...) MAYBE_TRACE (EXTRACT, cpu, fmt, ## __VA_ARGS__)
77 #define TRACE_SYSCALL(cpu, fmt, ...) MAYBE_TRACE (SYSCALL, cpu, fmt, ## __VA_ARGS__)
78
79 #define TRACE_CORE(cpu, addr, size, map, val) \
80 do \
81 { \
82 MAYBE_TRACE (CORE, cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
83 map == exec_map ? 'I' : 'D', \
84 map == write_map ? "STORE" : "FETCH", \
85 size, addr, size * 2, val); \
86 PROFILE_COUNT_CORE (cpu, addr, size, map); \
87 } \
88 while (0)
89
90 #define TRACE_EVENTS(cpu, fmt, ...) MAYBE_TRACE (EVENTS, cpu, fmt, ## __VA_ARGS__)
91
92 #define TRACE_BRANCH(cpu, oldpc, newpc, fmt, ...) \
93 do \
94 { \
95 MAYBE_TRACE (BRANCH, cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
96 } \
97 while (0)
98
99 extern void trace_register (SIM_DESC, sim_cpu *, const char *, ...)
100 __attribute__((format (printf, 3, 4)));
101
102 #define TRACE_REGISTER(cpu, fmt, ...) \
103 do \
104 { \
105 if (TRACE_CORE_P (cpu)) \
106 trace_register (CPU_STATE (cpu), cpu, fmt, ## __VA_ARGS__); \
107 } \
108 while (0)
109
110 #define TRACE_REG(cpu, reg, val) \
111 TRACE_REGISTER (cpu, "wrote R%d = %#x", reg, val)
112
113 #endif /* _MSP430_MAIN_SIM_H_ */
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