Add support to count the number of instructions issued.
[deliverable/binutils-gdb.git] / sim / ppc / README.psim
1
2 PSIM
3
4 Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
5
6 This directory contains the program PSIM that models the PowerPC
7 architecture. It can either be run stand alone (psim) or linked with
8 GDB.
9
10
11 CONTENTS:
12
13 psim-*.tar:
14
15 psim-sim-*.tar.gz simulator source code
16
17 psim-test-*.tar.gz test directory for simulator
18
19 psim-gdb-*.diff.gz patches to integrated psim
20 into gdb
21
22 gnu-*.tar:
23
24 gnu-gdb-*.diff.gz patches to gdb that may have
25 already been merged into the
26 GDB source tree.
27
28 gnu-*-*.diff.gz Other noise
29
30
31 BUILDING:
32
33 o Install flex, bison, gnu-make, native gcc and probably also byacc.
34
35
36 o First you will need a fairly current copy of GDB (try the ftp site
37 ftp.cygnus.com:pub). I've built it with a beta version of gdb-4.15.
38
39 Unpack gdb vis:
40
41 $ gunzip < gdb-4.15.tar.gz | tar xf -
42
43
44 o Apply any patches that haven't yet been merged into the GDB source
45 tree.
46
47 $ cd gdb-4.15
48 $ gunzip < ../psim-gdb-*.diff.gz | patch -p1
49 $ gunzip < ../gnu-gdb-*.diff.gz | patch -p1
50
51
52 o Unpack the psim source code (and optionally the test directory)
53
54 $ cd gdb-4.15
55 $ gunzip < ../psim-sim-*.tar.gz | tar xvf -
56 $ gunzip < ../psim-test-*.tar.gz | tar xvf -
57
58
59 o Configure gdb as per normal. I use something along the lines of:
60
61 $ cd gdb-4.15
62 $ CC=gcc ./configure --target=powerpcle-unknown-eabi
63
64
65 o Build your entire gdb tree as per normal. Something along the
66 lines of:
67
68 $ cd gdb-4.15
69 $ make CC=gcc
70 .
71 .
72 .
73
74
75
76 o Install it it all as per normal. Something along the lines of:
77
78 $ cd gdb-4.15
79 $ make CC=gcc install
80
81 The program sim/ppc/psim is not installed.
82
83
84 RUNNING:
85
86 PSIM can either be run as a stand alone program or as part
87 of gdb. The psim-test archive contains pre-compiled and
88 linked programs that can be run on PSIM. The notes below
89 assume that you have unpacked that tar archive.
90
91 To rebuild the archive you will need to obtain a working
92 version of an ELF compiler/linker for the PowerPC.
93
94 Example of running PSIM:
95
96 Print out the users environment:
97
98 $ sim/ppc/psim sim/ppc/test/envp
99
100 Print out the arguments:
101
102 $ sim/ppc/psim sim/ppc/test/argv a b c
103
104 Check the OEA model:
105
106 $ sim/ppc/psim sim/ppc/test/interrupt
107
108 Check that sbrk works
109
110 $ sim/ppc/psim sim/ppc/test/break
111
112 Try for speed. The program count contains a loop
113 of two instructions which is looped <arg> times.
114 See later for how to make PSIM run 10-100 times
115 faster.
116
117 $ time sim/ppc/sim sim/ppc/test/count 5000000
118 $ expr 10 \* 1000 \* 1000 / <seconds>
119
120
121 Example of running GDB:
122
123 The most important thing to be aware of is the fact
124 that before the simulator is used, the user must attach
125 to it (target sim) and than load the executable (load count).
126
127 $ cd sim/ppc/test
128 $ powerpc-unknown-eabi-gdb count
129 (gdb) target sim
130 (gdb) load count
131 (gdb) break main
132 (gdb) run
133 .
134 .
135 .
136
137
138 CONFIGURATION: Making it go faster
139
140 See the file sim/ppc/config.h (a.k.a. sim/ppc/data/ppc-config)
141 for notes.
142
143
144 KNOWN FEATURES
145
146 SMP, dual-endian, VEA and OEA models, hardware devices
147 (console, icu, reset) ...
148
149
150 KNOWN PROBLEMS:
151
152 Configuration could be better.
153
154 HTAB (page) code for OEA model untested. Some of the vm code
155 instructions unimplemented.
156
157 Doesn't detect/handle changing endian bits. In fact they are
158 ignored.
159
160 Return from interrupt instruction unimplemented.
161
162 Flush instruction cache instructions do nothing. Perhaphs they
163 should (if there is an instruction cache) flush it.
164
165 PowerOpen VEA model (a.k.a XCOFF a.k.a AIX) broken. It was
166 working but that is before I changed the create stack frame
167 code into an ELF version.
168
169 OpenBoot and PR*P interfaces missing. Open boot could be
170 implemented by putting special instructions at the address
171 of the OpenBoot callback functions. Those instructions
172 could than emulate OpenBoot behavour.
173
174 VEA memory read/write performance could be improved by merging
175 the data sections.
176
177 When reading in a VEA executable, the binaries text and data
178 sections are not made page aligned.
179
180 Missing or commented out instructions.
181
182 Lack of floating point support.
183 [workaround: build everything using -msoft-float]
184
185 64bit untested.
186
187 Event code for pending events from signal handlers not
188 finished/tested.
189
190 Better and more devices.
191
192 Only two device trees VEA and OEA (clayton) and those hard coded.
193 Should be possible to specify a file containing a device tree
194 description as the program to run. At present it a device tree
195 file is detected causing psim to abort.
196
197 I wonder if I've got my ppc.instructions copyright
198 notice correct.
199
200
201 THANKS:
202
203 Thanks go to the following who each helped in some way.
204
205 Allen Briggs, Bett Koch, David Edelsohn,
206 Michael Meissner, Bob Mercier, Richard Perini,
207 Richard Stallman, Mitchele Walker
208
209
210 ----------------------------------------------------------------
211
212
213 Random notes on performance:
214
215
216 $ cd test
217 time ../psim count `expr 10000000 / 2`
218 time ../psim volatile-count `expr 10000000 / 7`
219
220 Where 2 and 7 are the number of instructions in the main loop.
221
222
223 611/729 - baseline
224
225 Tests:
226
227 CFLAGS= -c -O2 -m486 -fomit-frame-pointer
228
229 o different first/second level table/switch combinations
230
231 0 - use a table
232 1 - use a simple switch
233 2 - use an expanded switch
234
235 i486DX4/100 - AMD
236
237 1/108/140 - switch=0/0/0,expand=2,inline=2,nia=1,cache=1
238 1/114/140 - switch=0/0/0,expand=2,inline=2,nia=1,cache=1
239 1/137/149 - switch=0/0,expand=2,inline=1,nia=1,cache=1
240 1/144/155 - switch=2/1,expand=2,inline=1,nia=1,cache=1
241 1/153/159 - switch=2/1,expand=0,inline=1,nia=1,cache=1
242 1/185/189 - switch=0/0,expand=0,inline=1,nia=1
243
244 i486DX2/66
245
246 1/572/695 - switch=1/1,expand=0,inline=0
247 1/579/729 - switch=0/0,expand=0,inline=0
248 1/570/682 - switch=2/2,expand=0,inline=0
249 1/431/492 - switch=0/0,expand=0,inline=1,nia=0
250 1/271/292 - switch=2/1,expand=0,inline=1,nia=0
251 1/270/316 - switch=2/2,expand=0,inline=1,nia=0
252 1/271/281 - switch=1/1,expand=0,inline=1,nia=1
253 1/267/274 - switch=2/1,expand=0,inline=1,nia=1
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