1 /* Altivec registers, for PSIM, the PowerPC simulator.
3 Copyright 2003, 2007 Free Software Foundation, Inc.
5 Contributed by Red Hat Inc; developed under contract from Motorola.
6 Written by matthew green <mrg@redhat.com>.
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 /* Manage this as 4 32-bit entities, 8 16-bit entities or 16 8-bit
32 typedef unsigned32 vscreg
;
35 /* AltiVec Registers */
40 /* AltiVec registers */
41 #define VR(N) cpu_registers(processor)->altivec.vr[N]
43 /* AltiVec vector status and control register */
44 #define VSCR cpu_registers(processor)->altivec.vscr
46 /* AltiVec endian helpers, wrong endian hosts vs targets need to be
47 sure to get the right bytes/halfs/words when the order matters.
48 Note that many AltiVec instructions do not depend on byte order and
49 work on N independant bits of data. This is only for the
50 instructions that actually move data around. */
52 #if (WITH_HOST_BYTE_ORDER == BIG_ENDIAN)
53 #define AV_BINDEX(x) ((x) & 15)
54 #define AV_HINDEX(x) ((x) & 7)
56 static char endian_b2l_bindex
[16] = { 3, 2, 1, 0, 7, 6, 5, 4,
57 11, 10, 9, 8, 15, 14, 13, 12 };
58 static char endian_b2l_hindex
[16] = { 1, 0, 3, 2, 5, 4, 7, 6 };
59 #define AV_BINDEX(x) endian_b2l_bindex[(x) & 15]
60 #define AV_HINDEX(x) endian_b2l_hindex[(x) & 7]
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