1 /* This file is part of the program psim.
3 Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
30 #include "registers.h"
31 #include "device_tree.h"
32 #include "memory_map.h"
36 #include "interrupts.h"
41 /* typedef struct _cpu cpu;
43 Declared in basics.h because it is used opaquely throughout the
47 /* Create a cpu object */
49 INLINE_CPU cpu
*cpu_create
56 /* Find our way home */
58 INLINE_CPU psim
*cpu_system
64 INLINE_CPU event_queue
*cpu_event_queue
68 /* The processors local concept of time */
70 INLINE_CPU signed64 cpu_get_time_base
73 INLINE_CPU
void cpu_set_time_base
77 INLINE_CPU signed32 cpu_get_decrementer
80 INLINE_CPU
void cpu_set_decrementer
82 signed32 decrementer
);
85 /* manipulate the program counter
87 The program counter is not included in the register file. Instead
88 it is extracted and then later restored (set, reset, halt). This
89 is to give the user of the cpu (and the compiler) the chance to
90 minimize the need to load/store the cpu's PC value. (Especially in
91 the case of a single processor) */
93 INLINE_CPU
void cpu_set_program_counter
95 unsigned_word new_program_counter
);
97 INLINE_CPU unsigned_word cpu_get_program_counter
100 INLINE_CPU
void cpu_restart
104 INLINE_CPU
void cpu_halt
111 #if WITH_IDECODE_CACHE
112 /* gain acces to the processors instruction cracking cache
114 Only useful (and visable) if we're cracking the cache */
115 INLINE_CPU idecode_cache
*cpu_icache
120 /* reveal the processor address maps
122 At first sight it may seem better to, instead of exposing the cpu's
123 inner vm maps, to have the cpu its self provide memory manipulation
124 functions. (eg cpu_instruction_fetch() cpu_data_read_4())
126 Unfortunatly in addition to these functions is the need (for the
127 debugger) to be able to read/write to memory in ways that violate
128 the vm protection (eg store breakpoint instruction in the
131 INLINE_CPU vm_instruction_map
*cpu_instruction_map
134 INLINE_CPU vm_data_map
*cpu_data_map
137 INLINE_CPU core
*cpu_core
141 /* grant access to the reservation information */
142 typedef struct _memory_reservation
{
146 } memory_reservation
;
148 INLINE_CPU memory_reservation
*cpu_reservation
152 INLINE_CPU
void cpu_increment_number_of_insns
155 INLINE_CPU
long cpu_get_number_of_insns
158 INLINE_CPU
void cpu_print_info
164 This model exploits the PowerPC's requirement for a synchronization
165 to occure after (or before) the update of any context controlling
166 register. All context sync points must call the sync function
167 below to when ever a synchronization point is reached */
169 INLINE_CPU registers
*cpu_registers
172 INLINE_CPU
void cpu_synchronize_context
175 #define IS_PROBLEM_STATE(PROCESSOR) \
176 (CURRENT_ENVIRONMENT == VIRTUAL_ENVIRONMENT \
177 || (cpu_registers(PROCESSOR)->msr & msr_problem_state))
179 #define IS_64BIT_MODE(PROCESSOR) \
180 ((CURRENT_ENVIRONMENT == VIRTUAL_ENVIRONMENT && WITH_64BIT_TARGET) \
181 || (cpu_registers(PROCESSOR)->msr & msr_64bit_mode))
183 #define IS_FP_AVAILABLE(PROCESSOR) \
184 (CURRENT_ENVIRONMENT == VIRTUAL_ENVIRONMENT \
185 || (cpu_registers(PROCESSOR)->msr & msr_floating_point_available))