1 /* This file is part of the program psim.
3 Copyright 1994, 1995, 1996, 1997, 2003 Andrew Cagney
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 /* Additional, and optional expressions. */
23 #include "altivec_expression.h"
26 #include "e500_expression.h"
29 /* 32bit target expressions:
31 Each calculation is performed three times using each of the
32 signed64, unsigned64 and long integer types. The macro ALU_END
33 (in _ALU_RESULT_VAL) then selects which of the three alternative
34 results will be used in the final assignment of the target
35 register. As this selection is determined at compile time by
36 fields in the instruction (OE, EA, Rc) the compiler has sufficient
37 information to firstly simplify the selection code into a single
38 case and then back anotate the equations and hence eliminate any
39 resulting dead code. That dead code being the calculations that,
40 as it turned out were not in the end needed.
42 64bit arrithemetic is used firstly because it allows the use of
43 gcc's efficient long long operators (typically efficiently output
44 inline) and secondly because the resultant answer will contain in
45 the low 32bits the answer while in the high 32bits is either carry
46 or status information. */
48 /* 64bit target expressions:
50 Unfortunatly 128bit arrithemetic isn't that common. Consequently
51 the 32/64 bit trick can not be used. Instead all calculations are
52 required to retain carry/overflow information in separate
53 variables. Even with this restriction it is still possible for the
54 trick of letting the compiler discard the calculation of unneeded
58 /* Macro's to type cast 32bit constants to 64bits */
59 #define SIGNED64(val) ((signed64)(signed32)(val))
60 #define UNSIGNED64(val) ((unsigned64)(unsigned32)(val))
63 /* Start a section of ALU code */
65 #define ALU_BEGIN(val) \
67 natural_word alu_val; \
68 unsigned64 alu_carry_val; \
69 signed64 alu_overflow_val; \
73 /* assign the result to the target register */
75 #define ALU_END(TARG,CA,OE,Rc) \
76 { /* select the result to use */ \
77 signed_word const alu_result = _ALU_RESULT_VAL(CA,OE,Rc); \
78 /* determine the overflow bit if needed */ \
80 if ((((unsigned64)(alu_overflow_val & BIT64(0))) \
82 == (alu_overflow_val & BIT64(32))) \
83 XER &= (~xer_overflow); \
85 XER |= (xer_summary_overflow | xer_overflow); \
87 /* Update the carry bit if needed */ \
89 XER = ((XER & ~xer_carry) \
90 | SHUFFLED32((alu_carry_val >> 32), 31, xer_carry_bit)); \
91 /* if (alu_carry_val & BIT64(31)) \
94 XER &= (~xer_carry); */ \
96 TRACE(trace_alu, (" Result = %ld (0x%lx), XER = %ld\n", \
97 (long)alu_result, (long)alu_result, (long)XER)); \
98 /* Update the Result Conditions if needed */ \
99 CR0_COMPARE(alu_result, 0, Rc); \
100 /* assign targ same */ \
104 /* select the result from the different options */
106 #define _ALU_RESULT_VAL(CA,OE,Rc) (WITH_TARGET_WORD_BITSIZE == 64 \
115 /* More basic alu operations */
116 #if (WITH_TARGET_WORD_BITSIZE == 64)
117 #define ALU_SET(val) \
120 alu_carry_val = ((unsigned64)alu_val) >> 32; \
121 alu_overflow_val = ((signed64)alu_val) >> 32; \
124 #if (WITH_TARGET_WORD_BITSIZE == 32)
125 #define ALU_SET(val) \
128 alu_carry_val = (unsigned32)(alu_val); \
129 alu_overflow_val = (signed32)(alu_val); \
133 #if (WITH_TARGET_WORD_BITSIZE == 64)
134 #define ALU_ADD(val) \
136 unsigned64 alu_lo = (UNSIGNED64(alu_val) \
137 + UNSIGNED64(val)); \
138 signed alu_carry = ((alu_lo & BIT(31)) != 0); \
139 alu_carry_val = (alu_carry_val \
140 + UNSIGNED64(EXTRACTED(val, 0, 31)) \
142 alu_overflow_val = (alu_overflow_val \
143 + SIGNED64(EXTRACTED(val, 0, 31)) \
145 alu_val = alu_val + val; \
148 #if (WITH_TARGET_WORD_BITSIZE == 32)
149 #define ALU_ADD(val) \
152 alu_carry_val += (unsigned32)(val); \
153 alu_overflow_val += (signed32)(val); \
158 #if (WITH_TARGET_WORD_BITSIZE == 64)
161 signed carry = MASKED32(XER, xer_carry_bit, xer_carry_bit) != 0; \
165 #if (WITH_TARGET_WORD_BITSIZE == 32)
168 signed carry = MASKED32(XER, xer_carry_bit, xer_carry_bit) != 0; \
175 #if (WITH_TARGET_WORD_BITSIZE == 64)
177 #if (WITH_TARGET_WORD_BITSIZE == 32)
178 #define ALU_SUB(val) \
181 alu_carry_val -= (unsigned32)(val); \
182 alu_overflow_val -= (signed32)(val); \
187 #if (WITH_TARGET_WORD_BITSIZE == 64)
189 #if (WITH_TARGET_WORD_BITSIZE == 32)
190 #define ALU_OR(val) \
193 alu_carry_val = (unsigned32)(alu_val); \
194 alu_overflow_val = (signed32)(alu_val); \
199 #if (WITH_TARGET_WORD_BITSIZE == 64)
201 #if (WITH_TARGET_WORD_BITSIZE == 32)
202 #define ALU_XOR(val) \
205 alu_carry_val = (unsigned32)(alu_val); \
206 alu_overflow_val = (signed32)(alu_val); \
212 #if (WITH_TARGET_WORD_BITSIZE == 64)
214 #if (WITH_TARGET_WORD_BITSIZE == 32)
217 alu_val = -alu_val; \
218 alu_carry_val = -alu_carry_val; \
219 alu_overflow_val = -alu_overflow_val; \
225 #if (WITH_TARGET_WORD_BITSIZE == 64)
227 #if (WITH_TARGET_WORD_BITSIZE == 32)
228 #define ALU_AND(val) \
231 alu_carry_val = (unsigned32)(alu_val); \
232 alu_overflow_val = (signed32)(alu_val); \
237 #if (WITH_TARGET_WORD_BITSIZE == 64)
240 signed64 new_alu_val = ~alu_val; \
241 ALU_SET(new_alu_val); \
244 #if (WITH_TARGET_WORD_BITSIZE == 32)
247 signed new_alu_val = ~alu_val; \
248 ALU_SET(new_alu_val); \
253 /* Macros for updating the condition register */
255 #define CR1_UPDATE(Rc) \
258 CR_SET(1, EXTRACTED32(FPSCR, fpscr_fx_bit, fpscr_ox_bit)); \
263 #define _DO_CR_COMPARE(LHS, RHS) \
270 #define CR_SET(REG, VAL) MBLIT32(CR, REG*4, REG*4+3, VAL)
271 #define CR_FIELD(REG) EXTRACTED32(CR, REG*4, REG*4+3)
272 #define CR_SET_XER_SO(REG, VAL) \
274 creg new_bits = ((XER & xer_summary_overflow) \
275 ? (cr_i_summary_overflow | VAL) \
277 CR_SET(REG, new_bits); \
280 #define CR_COMPARE(REG, LHS, RHS) \
282 creg new_bits = ((XER & xer_summary_overflow) \
283 ? (cr_i_summary_overflow | _DO_CR_COMPARE(LHS,RHS)) \
284 : _DO_CR_COMPARE(LHS,RHS)); \
285 CR_SET(REG, new_bits); \
288 #define CR0_COMPARE(LHS, RHS, Rc) \
291 CR_COMPARE(0, LHS, RHS); \
293 ("CR=0x%08lx, LHS=%ld, RHS=%ld\n", \
294 (unsigned long)CR, (long)LHS, (long)RHS)); \
300 /* Bring data in from the cold */
302 #define MEM(SIGN, EA, NR_BYTES) \
303 ((SIGN##_##NR_BYTES) vm_data_map_read_##NR_BYTES(cpu_data_map(processor), EA, \
306 #define STORE(EA, NR_BYTES, VAL) \
308 vm_data_map_write_##NR_BYTES(cpu_data_map(processor), EA, VAL, \
314 /* some FPSCR update macros. */
316 #define FPSCR_BEGIN \
318 fpscreg old_fpscr UNUSED = FPSCR
320 #define FPSCR_END(Rc) { \
321 /* always update VX */ \
322 if ((FPSCR & fpscr_vx_bits)) \
325 FPSCR &= ~fpscr_vx; \
326 /* always update FEX */ \
327 if (((FPSCR & fpscr_vx) && (FPSCR & fpscr_ve)) \
328 || ((FPSCR & fpscr_ox) && (FPSCR & fpscr_oe)) \
329 || ((FPSCR & fpscr_ux) && (FPSCR & fpscr_ue)) \
330 || ((FPSCR & fpscr_zx) && (FPSCR & fpscr_ze)) \
331 || ((FPSCR & fpscr_xx) && (FPSCR & fpscr_xe))) \
332 FPSCR |= fpscr_fex; \
334 FPSCR &= ~fpscr_fex; \
336 /* interrupt enabled? */ \
337 if ((MSR & (msr_floating_point_exception_mode_0 \
338 | msr_floating_point_exception_mode_1)) \
339 && (FPSCR & fpscr_fex)) \
340 program_interrupt(processor, cia, \
341 floating_point_enabled_program_interrupt); \
344 #define FPSCR_SET(REG, VAL) MBLIT32(FPSCR, REG*4, REG*4+3, VAL)
345 #define FPSCR_FIELD(REG) EXTRACTED32(FPSCR, REG*4, REG*4+3)
347 #define FPSCR_SET_FPCC(VAL) MBLIT32(FPSCR, fpscr_fpcc_bit, fpscr_fpcc_bit+3, VAL)
349 /* Handle various exceptions */
351 #define FPSCR_OR_VX(VAL) \
353 /* NOTE: VAL != 0 */ \
358 #define FPSCR_SET_OX(COND) \
365 FPSCR &= ~fpscr_ox; \
368 #define FPSCR_SET_UX(COND) \
375 FPSCR &= ~fpscr_ux; \
378 #define FPSCR_SET_ZX(COND) \
385 FPSCR &= ~fpscr_zx; \
388 #define FPSCR_SET_XX(COND) \
396 /* Note: code using SET_FI must also explicitly call SET_XX */
398 #define FPSCR_SET_FR(COND) do { \
402 FPSCR &= ~fpscr_fr; \
405 #define FPSCR_SET_FI(COND) \
411 FPSCR &= ~fpscr_fi; \
414 #define FPSCR_SET_FPRF(VAL) \
416 FPSCR = (FPSCR & ~fpscr_fprf) | (VAL); \
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