4b7a5d4b5a58db47a489f19a6314214c26f56d34
1 /* cpu.c --- CPU for RL78 simulator.
3 Copyright (C) 2011-2014 Free Software Foundation, Inc.
4 Contributed by Red Hat, Inc.
6 This file is part of the GNU simulators.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>.
27 #include "opcode/rl78.h"
34 int timer_enabled
= 2;
36 #define REGISTER_ADDRESS 0xffee0
49 static void trace_register_init ();
51 /* This maps PSW to a pointer into memory[] */
52 static RegBank
*regbase_table
[256];
54 #define regbase regbase_table[memory[RL78_SFR_PSW]]
56 #define REG(r) ((regbase)->r)
65 memset (memory
+REGISTER_ADDRESS
, 0x11, 8 * 4);
66 memory
[RL78_SFR_PSW
] = 0x06;
67 memory
[RL78_SFR_ES
] = 0x0f;
68 memory
[RL78_SFR_CS
] = 0x00;
69 memory
[RL78_SFR_PMC
] = 0x00;
71 for (i
= 0; i
< 256; i
++)
73 int rb0
= (i
& RL78_PSW_RBS0
) ? 1 : 0;
74 int rb1
= (i
& RL78_PSW_RBS1
) ? 2 : 0;
76 regbase_table
[i
] = (RegBank
*)(memory
+ (3 - rb
) * 8 + REGISTER_ADDRESS
);
79 trace_register_init ();
81 /* This means "by default" */
86 get_reg (RL78_Register regno
)
91 /* Conditionals do this. */
96 case RL78_Reg_X
: return REG (x
);
97 case RL78_Reg_A
: return REG (a
);
98 case RL78_Reg_C
: return REG (c
);
99 case RL78_Reg_B
: return REG (b
);
100 case RL78_Reg_E
: return REG (e
);
101 case RL78_Reg_D
: return REG (d
);
102 case RL78_Reg_L
: return REG (l
);
103 case RL78_Reg_H
: return REG (h
);
104 case RL78_Reg_AX
: return REG (a
) * 256 + REG (x
);
105 case RL78_Reg_BC
: return REG (b
) * 256 + REG (c
);
106 case RL78_Reg_DE
: return REG (d
) * 256 + REG (e
);
107 case RL78_Reg_HL
: return REG (h
) * 256 + REG (l
);
108 case RL78_Reg_SP
: return memory
[RL78_SFR_SP
] + 256 * memory
[RL78_SFR_SP
+1];
109 case RL78_Reg_PSW
: return memory
[RL78_SFR_PSW
];
110 case RL78_Reg_CS
: return memory
[RL78_SFR_CS
];
111 case RL78_Reg_ES
: return memory
[RL78_SFR_ES
];
112 case RL78_Reg_PMC
: return memory
[RL78_SFR_PMC
];
113 case RL78_Reg_MEM
: return memory
[RL78_SFR_MEM
];
117 extern unsigned char initted
[];
120 set_reg (RL78_Register regno
, SI val
)
126 case RL78_Reg_X
: REG (x
) = val
; break;
127 case RL78_Reg_A
: REG (a
) = val
; break;
128 case RL78_Reg_C
: REG (c
) = val
; break;
129 case RL78_Reg_B
: REG (b
) = val
; break;
130 case RL78_Reg_E
: REG (e
) = val
; break;
131 case RL78_Reg_D
: REG (d
) = val
; break;
132 case RL78_Reg_L
: REG (l
) = val
; break;
133 case RL78_Reg_H
: REG (h
) = val
; break;
136 REG (x
) = val
& 0xff;
140 REG (c
) = val
& 0xff;
144 REG (e
) = val
& 0xff;
148 REG (l
) = val
& 0xff;
153 printf ("Warning: SP value 0x%04x truncated at pc=0x%05x\n", val
, pc
);
157 int old_sp
= get_reg (RL78_Reg_SP
);
161 for (i
= val
; i
< old_sp
; i
++)
162 initted
[i
+ 0xf0000] = 0;
165 memory
[RL78_SFR_SP
] = val
& 0xff;
166 memory
[RL78_SFR_SP
+ 1] = val
>> 8;
168 case RL78_Reg_PSW
: memory
[RL78_SFR_PSW
] = val
; break;
169 case RL78_Reg_CS
: memory
[RL78_SFR_CS
] = val
; break;
170 case RL78_Reg_ES
: memory
[RL78_SFR_ES
] = val
; break;
171 case RL78_Reg_PMC
: memory
[RL78_SFR_PMC
] = val
; break;
172 case RL78_Reg_MEM
: memory
[RL78_SFR_MEM
] = val
; break;
178 condition_true (RL78_Condition cond_id
, int val
)
180 int psw
= get_reg (RL78_Reg_PSW
);
181 int z
= (psw
& RL78_PSW_Z
) ? 1 : 0;
182 int cy
= (psw
& RL78_PSW_CY
) ? 1 : 0;
186 case RL78_Condition_T
:
188 case RL78_Condition_F
:
190 case RL78_Condition_C
:
192 case RL78_Condition_NC
:
194 case RL78_Condition_H
:
196 case RL78_Condition_NH
:
198 case RL78_Condition_Z
:
200 case RL78_Condition_NZ
:
234 const char *comma
= "";
241 #define PSW1(bit, name) if (psw & bit) { strcat (buf, comma); strcat (buf, name); comma = ","; }
242 PSW1 (RL78_PSW_IE
, "ie");
243 PSW1 (RL78_PSW_Z
, "z");
244 PSW1 (RL78_PSW_RBS1
, "r1");
245 PSW1 (RL78_PSW_AC
, "ac");
246 PSW1 (RL78_PSW_RBS0
, "r0");
247 PSW1 (RL78_PSW_ISP1
, "i1");
248 PSW1 (RL78_PSW_ISP0
, "i0");
249 PSW1 (RL78_PSW_CY
, "cy");
255 static unsigned char old_regs
[32];
259 int trace_register_words
;
262 trace_register_changes (void)
270 #define TB(name,nv,ov) if (nv != ov) { printf ("%s: \033[31m%02x \033[32m%02x\033[0m ", name, ov, nv); ov = nv; any = 1; }
271 #define TW(name,nv,ov) if (nv != ov) { printf ("%s: \033[31m%04x \033[32m%04x\033[0m ", name, ov, nv); ov = nv; any = 1; }
273 if (trace_register_words
)
275 #define TRW(name, idx) TW (name, memory[REGISTER_ADDRESS + (idx)], old_regs[idx])
276 for (i
= 0; i
< 32; i
+= 2)
282 case 0: strcpy (buf
, "AX"); break;
283 case 2: strcpy (buf
, "BC"); break;
284 case 4: strcpy (buf
, "DE"); break;
285 case 6: strcpy (buf
, "HL"); break;
286 default: sprintf (buf
, "r%d", i
); break;
288 a
= REGISTER_ADDRESS
+ (i
^ 0x18);
289 o
= old_regs
[i
^ 0x18] + old_regs
[(i
^ 0x18) + 1] * 256;
290 n
= memory
[a
] + memory
[a
+ 1] * 256;
292 old_regs
[i
^ 0x18] = n
;
293 old_regs
[(i
^ 0x18) + 1] = n
>> 8;
298 for (i
= 0; i
< 32; i
++)
303 buf
[0] = "XACBEDLH"[i
];
307 sprintf (buf
, "r%d", i
);
308 #define TRB(name, idx) TB (name, memory[REGISTER_ADDRESS + (idx)], old_regs[idx])
312 if (memory
[RL78_SFR_PSW
] != old_psw
)
314 printf ("PSW: \033[31m");
315 psw_string (old_psw
);
316 printf (" \033[32m");
317 psw_string (memory
[RL78_SFR_PSW
]);
319 old_psw
= memory
[RL78_SFR_PSW
];
322 TW ("SP", mem_get_hi (RL78_SFR_SP
), old_sp
);
328 trace_register_init (void)
330 memcpy (old_regs
, memory
+ REGISTER_ADDRESS
, 8 * 4);
331 old_psw
= memory
[RL78_SFR_PSW
];
332 old_sp
= mem_get_hi (RL78_SFR_SP
);
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