1 /* Simulator/Opcode generator for the Renesas
2 (formerly Hitachi) / SuperH Inc. Super-H architecture.
4 Written by Steve Chamberlain of Cygnus Support.
7 This file is part of SH sim.
10 THIS SOFTWARE IS NOT COPYRIGHTED
12 Cygnus offers the following for use in the public domain. Cygnus
13 makes no warranty with regard to the software or it's performance
14 and the user accepts the software "AS IS" with all faults.
16 CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
17 THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
22 /* This program generates the opcode table for the assembler and
25 -t prints a pretty table for the assembler manual
26 -s generates the simulator code jump table
27 -d generates a define table
28 -x generates the simulator code switch statement
29 default used to generate the opcode tables
35 #define MAX_NR_STUFF 42
43 char *stuff
[MAX_NR_STUFF
];
51 { "n", "", "add #<imm>,<REG_N>", "0111nnnni8*1....",
54 " UNDEF(n); /* see #ifdef PARANOID */",
58 { "n", "mn", "add <REG_M>,<REG_N>", "0011nnnnmmmm1100",
62 { "n", "mn", "addc <REG_M>,<REG_N>", "0011nnnnmmmm1110",
64 "SET_SR_T (ult < R[n]);",
66 "SET_SR_T (T || (R[n] < ult));",
69 { "n", "mn", "addv <REG_M>,<REG_N>", "0011nnnnmmmm1111",
71 "SET_SR_T ((~(R[n] ^ R[m]) & (ult ^ R[n])) >> 31);",
75 { "0", "0", "and #<imm>,R0", "11001001i8*1....",
78 { "n", "nm", "and <REG_M>,<REG_N>", "0010nnnnmmmm1001",
81 { "", "0", "and.b #<imm>,@(R0,GBR)", "11001101i8*1....",
83 "WBAT (GBR + R0, RBAT (GBR + R0) & i);",
86 { "", "", "bf <bdisp8>", "10001011i8p1....",
87 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
89 " SET_NIP (PC + 4 + (SEXT (i) * 2));",
94 { "", "", "bf.s <bdisp8>", "10001111i8p1....",
95 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
97 " SET_NIP (PC + 4 + (SEXT (i) * 2));",
99 " Delay_Slot (PC + 2);",
103 { "", "n", "bit32 #imm3,@(disp12,<REG_N>)", "0011nnnni8*11001",
104 "/* 32-bit logical bit-manipulation instructions. */",
105 "int word2 = RIAT (nip);",
106 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
107 "i >>= 4; /* BOGUS: Using only three bits of 'i'. */",
108 "/* MSB of 'i' must be zero. */",
110 " RAISE_EXCEPTION (SIGILL);",
112 "do_blog_insn (1 << i, (word2 & 0xfff) + R[n], ",
113 " (word2 >> 12) & 0xf, memory, maskb);",
114 "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
116 { "", "", "bra <bdisp12>", "1010i12.........",
117 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
118 "SET_NIP (PC + 4 + (SEXT12 (i) * 2));",
120 "Delay_Slot (PC + 2);",
123 { "", "n", "braf <REG_N>", "0000nnnn00100011",
124 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
125 "SET_NIP (PC + 4 + R[n]);",
127 "Delay_Slot (PC + 2);",
130 { "", "", "bsr <bdisp12>", "1011i12.........",
131 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
132 "PR = PH2T (PC + 4);",
133 "SET_NIP (PC + 4 + (SEXT12 (i) * 2));",
135 "Delay_Slot (PC + 2);",
138 { "", "n", "bsrf <REG_N>", "0000nnnn00000011",
139 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
140 "PR = PH2T (PC) + 4;",
141 "SET_NIP (PC + 4 + R[n]);",
143 "Delay_Slot (PC + 2);",
146 { "", "", "bt <bdisp8>", "10001001i8p1....",
147 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
149 " SET_NIP (PC + 4 + (SEXT (i) * 2));",
154 { "", "m", "bld/st #<imm>, <REG_M>", "10000111mmmmi4*1",
155 "/* MSB of 'i' is true for load, false for store. */",
158 " R[m] |= (1 << i);",
160 " R[m] &= ~(1 << i);",
162 " SET_SR_T ((R[m] & (1 << (i - 8))) != 0);",
164 { "m", "m", "bset/clr #<imm>, <REG_M>", "10000110mmmmi4*1",
165 "/* MSB of 'i' is true for set, false for clear. */",
167 " R[m] &= ~(1 << i);",
169 " R[m] |= (1 << (i - 8));",
171 { "n", "n", "clips.b <REG_N>", "0100nnnn10010001",
172 "if (R[n] < -128 || R[n] > 127) {",
177 " else if (R[n] < -128)",
181 { "n", "n", "clips.w <REG_N>", "0100nnnn10010101",
182 "if (R[n] < -32768 || R[n] > 32767) {",
185 " if (R[n] > 32767)",
187 " else if (R[n] < -32768)",
191 { "n", "n", "clipu.b <REG_N>", "0100nnnn10000001",
192 "if (R[n] < -256 || R[n] > 255) {",
198 { "n", "n", "clipu.w <REG_N>", "0100nnnn10000101",
199 "if (R[n] < -65536 || R[n] > 65535) {",
205 { "n", "0n", "divs R0,<REG_N>", "0100nnnn10010100",
206 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
208 " R[n] = 0x7fffffff;",
209 "else if (R0 == -1 && R[n] == 0x80000000)",
210 " R[n] = 0x7fffffff;",
214 { "n", "0n", "divu R0,<REG_N>", "0100nnnn10000100",
215 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
217 " R[n] = 0xffffffff;",
218 "/* FIXME: The result may be implementation-defined if it is outside */",
219 "/* the range of signed int (i.e. if R[n] was negative and R0 == 1). */",
220 "else R[n] = R[n] / (unsigned int) R0;",
223 { "n", "0n", "mulr R0,<REG_N>", "0100nnnn10000000",
224 "R[n] = (R[n] * R0) & 0xffffffff;",
227 { "0", "n", "ldbank @<REG_N>,R0", "0100nnnn11100101",
228 "int regn = (R[n] >> 2) & 0x1f;",
229 "int bankn = (R[n] >> 7) & 0x1ff;",
231 " regn = 19; /* FIXME what should happen? */",
232 "R0 = saved_state.asregs.regstack[bankn].regs[regn];",
235 { "", "0n", "stbank R0,@<REG_N>", "0100nnnn11100001",
236 "int regn = (R[n] >> 2) & 0x1f;",
237 "int bankn = (R[n] >> 7) & 0x1ff;",
239 " regn = 19; /* FIXME what should happen? */",
240 "saved_state.asregs.regstack[bankn].regs[regn] = R0;",
242 { "", "", "resbank", "0000000001011011",
244 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
245 /* FIXME: cdef all */
246 "if (BO) { /* Bank Overflow */",
247 /* FIXME: how do we know when to reset BO? */
248 " for (i = 0; i <= 14; i++) {",
249 " R[i] = RLAT (R[15]);",
253 " PR = RLAT (R[15]);",
256 " GBR = RLAT (R[15]);",
259 " MACH = RLAT (R[15]);",
262 " MACL = RLAT (R[15]);",
266 "else if (BANKN == 0) /* Bank Underflow */",
267 " RAISE_EXCEPTION (SIGILL);", /* FIXME: what exception? */
269 " SET_BANKN (BANKN - 1);",
270 " for (i = 0; i <= 14; i++)",
271 " R[i] = saved_state.asregs.regstack[BANKN].regs[i];",
272 " MACH = saved_state.asregs.regstack[BANKN].regs[15];",
273 " PR = saved_state.asregs.regstack[BANKN].regs[17];",
274 " GBR = saved_state.asregs.regstack[BANKN].regs[18];",
275 " MACL = saved_state.asregs.regstack[BANKN].regs[19];",
278 { "f", "f-", "movml.l <REG_N>,@-R15", "0100nnnn11110001",
279 "/* Push Rn...R0 (if n==15, push pr and R14...R0). */",
284 " WLAT (R[15], PR);",
286 " WLAT (R[15], R[n]);",
287 "} while (n-- > 0);",
289 { "f", "f+", "movml.l @R15+,<REG_N>", "0100nnnn11110101",
290 "/* Pop R0...Rn (if n==15, pop R0...R14 and pr). */",
295 " PR = RLAT (R[15]);",
297 " R[i] = RLAT (R[15]);",
299 "} while (i++ < n);",
301 { "f", "f-", "movmu.l <REG_N>,@-R15", "0100nnnn11110000",
302 "/* Push pr, R14...Rn (if n==15, push pr). */", /* FIXME */
308 " WLAT (R[15], PR);",
310 " WLAT (R[15], R[i]);",
311 "} while (i-- > n);",
313 { "f", "f+", "movmu.l @R15+,<REG_N>", "0100nnnn11110100",
314 "/* Pop Rn...R14, pr (if n==15, pop pr). */", /* FIXME */
318 " PR = RLAT (R[15]);",
320 " R[n] = RLAT (R[15]);",
322 "} while (n++ < 15);",
324 { "", "", "nott", "0000000001101000",
325 "SET_SR_T (T == 0);",
328 { "", "", "bt.s <bdisp8>", "10001101i8p1....",
329 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
331 " SET_NIP (PC + 4 + (SEXT (i) * 2));",
333 " Delay_Slot (PC + 2);",
337 { "", "", "clrmac", "0000000000101000",
342 { "", "", "clrs", "0000000001001000",
346 { "", "", "clrt", "0000000000001000",
351 { "", "", "clrdmxy", "0000000010001000",
352 "saved_state.asregs.cregs.named.sr &= ~(SR_MASK_DMX | SR_MASK_DMY);"
355 { "", "0", "cmp/eq #<imm>,R0", "10001000i8*1....",
356 "SET_SR_T (R0 == SEXT (i));",
358 { "", "mn", "cmp/eq <REG_M>,<REG_N>", "0011nnnnmmmm0000",
359 "SET_SR_T (R[n] == R[m]);",
361 { "", "mn", "cmp/ge <REG_M>,<REG_N>", "0011nnnnmmmm0011",
362 "SET_SR_T (R[n] >= R[m]);",
364 { "", "mn", "cmp/gt <REG_M>,<REG_N>", "0011nnnnmmmm0111",
365 "SET_SR_T (R[n] > R[m]);",
367 { "", "mn", "cmp/hi <REG_M>,<REG_N>", "0011nnnnmmmm0110",
368 "SET_SR_T (UR[n] > UR[m]);",
370 { "", "mn", "cmp/hs <REG_M>,<REG_N>", "0011nnnnmmmm0010",
371 "SET_SR_T (UR[n] >= UR[m]);",
373 { "", "n", "cmp/pl <REG_N>", "0100nnnn00010101",
374 "SET_SR_T (R[n] > 0);",
376 { "", "n", "cmp/pz <REG_N>", "0100nnnn00010001",
377 "SET_SR_T (R[n] >= 0);",
379 { "", "mn", "cmp/str <REG_M>,<REG_N>", "0010nnnnmmmm1100",
380 "ult = R[n] ^ R[m];",
381 "SET_SR_T (((ult & 0xff000000) == 0)",
382 " | ((ult & 0xff0000) == 0)",
383 " | ((ult & 0xff00) == 0)",
384 " | ((ult & 0xff) == 0));",
387 { "", "mn", "div0s <REG_M>,<REG_N>", "0010nnnnmmmm0111",
388 "SET_SR_Q ((R[n] & sbit) != 0);",
389 "SET_SR_M ((R[m] & sbit) != 0);",
390 "SET_SR_T (M != Q);",
393 { "", "", "div0u", "0000000000011001",
399 { "n", "nm", "div1 <REG_M>,<REG_N>", "0011nnnnmmmm0100",
400 "div1 (&R0, m, n/*, T*/);",
403 { "", "nm", "dmuls.l <REG_M>,<REG_N>", "0011nnnnmmmm1101",
404 "dmul (1/*signed*/, R[n], R[m]);",
407 { "", "nm", "dmulu.l <REG_M>,<REG_N>", "0011nnnnmmmm0101",
408 "dmul (0/*unsigned*/, R[n], R[m]);",
411 { "n", "n", "dt <REG_N>", "0100nnnn00010000",
413 "SET_SR_T (R[n] == 0);",
416 { "n", "m", "exts.b <REG_M>,<REG_N>", "0110nnnnmmmm1110",
417 "R[n] = SEXT (R[m]);",
419 { "n", "m", "exts.w <REG_M>,<REG_N>", "0110nnnnmmmm1111",
420 "R[n] = SEXTW (R[m]);",
423 { "n", "m", "extu.b <REG_M>,<REG_N>", "0110nnnnmmmm1100",
424 "R[n] = (R[m] & 0xff);",
426 { "n", "m", "extu.w <REG_M>,<REG_N>", "0110nnnnmmmm1101",
427 "R[n] = (R[m] & 0xffff);",
431 { "", "", "fabs <FREG_N>", "1111nnnn01011101",
432 "FP_UNARY (n, fabs);",
433 "/* FIXME: FR (n) &= 0x7fffffff; */",
437 { "", "", "fadd <FREG_M>,<FREG_N>", "1111nnnnmmmm0000",
442 { "", "", "fcmp/eq <FREG_M>,<FREG_N>", "1111nnnnmmmm0100",
443 "FP_CMP (n, ==, m);",
446 { "", "", "fcmp/gt <FREG_M>,<FREG_N>", "1111nnnnmmmm0101",
451 { "", "", "fcnvds <DR_N>,FPUL", "1111nnnn10111101",
452 "if (! FPSCR_PR || n & 1)",
453 " RAISE_EXCEPTION (SIGILL);",
467 { "", "", "fcnvsd FPUL,<DR_N>", "1111nnnn10101101",
468 "if (! FPSCR_PR || n & 1)",
469 " RAISE_EXCEPTION (SIGILL);",
483 { "", "", "fdiv <FREG_M>,<FREG_N>", "1111nnnnmmmm0011",
485 "/* FIXME: check for DP and (n & 1) == 0? */",
489 { "", "", "fipr <FV_M>,<FV_N>", "1111vvVV11101101",
491 " RAISE_EXCEPTION (SIGILL);",
495 " if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
496 " RAISE_EXCEPTION (SIGILL);",
497 " /* FIXME: check for nans and infinities. */",
498 " fsum += FR (v1+0) * FR (v2+0);",
499 " fsum += FR (v1+1) * FR (v2+1);",
500 " fsum += FR (v1+2) * FR (v2+2);",
501 " fsum += FR (v1+3) * FR (v2+3);",
502 " SET_FR (v1+3, fsum);",
507 { "", "", "fldi0 <FREG_N>", "1111nnnn10001101",
508 "SET_FR (n, (float) 0.0);",
509 "/* FIXME: check for DP and (n & 1) == 0? */",
513 { "", "", "fldi1 <FREG_N>", "1111nnnn10011101",
514 "SET_FR (n, (float) 1.0);",
515 "/* FIXME: check for DP and (n & 1) == 0? */",
519 { "", "", "flds <FREG_N>,FPUL", "1111nnnn00011101",
530 { "", "", "float FPUL,<FREG_N>", "1111nnnn00101101",
533 " SET_DR (n, (double) FPUL);",
536 " SET_FR (n, (float) FPUL);",
541 { "", "", "fmac <FREG_0>,<FREG_M>,<FREG_N>", "1111nnnnmmmm1110",
542 "SET_FR (n, FR (m) * FR (0) + FR (n));",
543 "/* FIXME: check for DP and (n & 1) == 0? */",
547 { "", "", "fmov <FREG_M>,<FREG_N>", "1111nnnnmmmm1100",
550 " int ni = XD_TO_XF (n);",
551 " int mi = XD_TO_XF (m);",
552 " SET_XF (ni + 0, XF (mi + 0));",
553 " SET_XF (ni + 1, XF (mi + 1));",
557 " SET_FR (n, FR (m));",
561 { "", "n", "fmov.s <FREG_M>,@<REG_N>", "1111nnnnmmmm1010",
570 " WLAT (R[n], FI (m));",
574 { "", "m", "fmov.s @<REG_M>,<FREG_N>", "1111nnnnmmmm1000",
583 " SET_FI (n, RLAT (R[m]));",
587 { "", "n", "fmov.s @(disp12,<REG_N>), <FREG_M>", "0011nnnnmmmm0001",
588 "/* and fmov.s <FREG_N>, @(disp12,<FREG_M>)",
589 " and mov.bwl <REG_N>, @(disp12,<REG_M>)",
590 " and mov.bwl @(disp12,<REG_N>),<REG_M>",
591 " and movu.bw @(disp12,<REG_N>),<REG_M>. */",
592 "int word2 = RIAT (nip);",
593 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
594 "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
596 "do_long_move_insn (word2 & 0xf000, word2 & 0x0fff, m, n, &thislock);",
599 { "m", "m", "fmov.s @<REG_M>+,<FREG_N>", "1111nnnnmmmm1001",
609 " SET_FI (n, RLAT (R[m]));",
614 { "n", "n", "fmov.s <FREG_M>,@-<REG_N>", "1111nnnnmmmm1011",
625 " WLAT (R[n], FI (m));",
629 { "", "0m", "fmov.s @(R0,<REG_M>),<FREG_N>", "1111nnnnmmmm0110",
633 " RDAT (R[0]+R[m], n);",
638 " SET_FI (n, RLAT (R[0] + R[m]));",
642 { "", "0n", "fmov.s <FREG_M>,@(R0,<REG_N>)", "1111nnnnmmmm0111",
646 " WDAT (R[0]+R[n], m);",
651 " WLAT ((R[0]+R[n]), FI (m));",
656 See fmov instructions above for move to/from extended fp registers. */
659 { "", "", "fmul <FREG_M>,<FREG_N>", "1111nnnnmmmm0010",
664 { "", "", "fneg <FREG_N>", "1111nnnn01001101",
669 { "", "", "fpchg", "1111011111111101",
670 "SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_PR);",
674 { "", "", "frchg", "1111101111111101",
676 " RAISE_EXCEPTION (SIGILL);",
677 "else if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
678 " RAISE_EXCEPTION (SIGILL);",
680 " SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_FR);",
684 { "", "", "fsca", "1111eeee11111101",
686 " RAISE_EXCEPTION (SIGILL);",
687 "else if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
688 " RAISE_EXCEPTION (SIGILL);",
691 " SET_FR (n, fsca_s (FPUL, &sin));",
692 " SET_FR (n+1, fsca_s (FPUL, &cos));",
697 { "", "", "fschg", "1111001111111101",
698 "SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_SZ);",
702 { "", "", "fsqrt <FREG_N>", "1111nnnn01101101",
703 "FP_UNARY (n, sqrt);",
707 { "", "", "fsrra <FREG_N>", "1111nnnn01111101",
709 " RAISE_EXCEPTION (SIGILL);",
710 "else if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
711 " RAISE_EXCEPTION (SIGILL);",
713 " SET_FR (n, fsrra_s (FR (n)));",
717 { "", "", "fsub <FREG_M>,<FREG_N>", "1111nnnnmmmm0001",
722 { "", "", "ftrc <FREG_N>, FPUL", "1111nnnn00111101",
725 " if (DR (n) != DR (n)) /* NaN */",
726 " FPUL = 0x80000000;",
728 " FPUL = (int) DR (n);",
731 "if (FR (n) != FR (n)) /* NaN */",
732 " FPUL = 0x80000000;",
734 " FPUL = (int) FR (n);",
738 { "", "", "ftrv <FV_N>", "1111vv0111111101",
740 " RAISE_EXCEPTION (SIGILL);",
743 " if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
744 " RAISE_EXCEPTION (SIGILL);",
745 " /* FIXME not implemented. */",
746 " printf (\"ftrv xmtrx, FV%d\\n\", v1);",
751 { "", "", "fsts FPUL,<FREG_N>", "1111nnnn00001101",
761 { "", "n", "jmp @<REG_N>", "0100nnnn00101011",
762 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
763 "SET_NIP (PT2H (R[n]));",
765 "Delay_Slot (PC + 2);",
768 { "", "n", "jsr @<REG_N>", "0100nnnn00001011",
769 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
770 "PR = PH2T (PC + 4);",
772 " gotcall (PR, R[n]);",
773 "SET_NIP (PT2H (R[n]));",
775 "Delay_Slot (PC + 2);",
777 { "", "n", "jsr/n @<REG_N>", "0100nnnn01001011",
778 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
779 "PR = PH2T (PC + 2);",
781 " gotcall (PR, R[n]);",
782 "SET_NIP (PT2H (R[n]));",
784 { "", "", "jsr/n @@(<disp>,TBR)", "10000011i8p4....",
785 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
786 "PR = PH2T (PC + 2);",
788 " gotcall (PR, i + TBR);",
789 "SET_NIP (PT2H (i + TBR));",
792 { "", "n", "ldc <REG_N>,<CREG_M>", "0100nnnnmmmm1110",
794 "/* FIXME: user mode */",
796 { "", "n", "ldc <REG_N>,SR", "0100nnnn00001110",
798 "/* FIXME: user mode */",
800 { "", "n", "ldc <REG_N>,MOD", "0100nnnn01011110",
803 { "", "n", "ldc <REG_N>,DBR", "0100nnnn11111010",
805 " DBR = R[n]; /* priv mode */",
807 " RAISE_EXCEPTION (SIGILL); /* user mode */",
809 { "", "n", "ldc <REG_N>,SGR", "0100nnnn00111010",
811 " SGR = R[n]; /* priv mode */",
813 " RAISE_EXCEPTION (SIGILL); /* user mode */",
815 { "", "n", "ldc <REG_N>,TBR", "0100nnnn01001010",
816 "if (SR_MD)", /* FIXME? */
817 " TBR = R[n]; /* priv mode */",
819 " RAISE_EXCEPTION (SIGILL); /* user mode */",
821 { "n", "n", "ldc.l @<REG_N>+,<CREG_M>", "0100nnnnmmmm0111",
823 "CREG (m) = RLAT (R[n]);",
825 "/* FIXME: user mode */",
827 { "n", "n", "ldc.l @<REG_N>+,SR", "0100nnnn00000111",
829 "SET_SR (RLAT (R[n]));",
831 "/* FIXME: user mode */",
833 { "n", "n", "ldc.l @<REG_N>+,MOD", "0100nnnn01010111",
835 "SET_MOD (RLAT (R[n]));",
838 { "n", "n", "ldc.l @<REG_N>+,DBR", "0100nnnn11110110",
842 " DBR = RLAT (R[n]);",
846 " RAISE_EXCEPTION (SIGILL); /* user mode */",
848 { "n", "n", "ldc.l @<REG_N>+,SGR", "0100nnnn00110110",
852 " SGR = RLAT (R[n]);",
856 " RAISE_EXCEPTION (SIGILL); /* user mode */",
860 { "", "", "ldre @(<disp>,PC)", "10001110i8p1....",
861 "RE = SEXT (i) * 2 + 4 + PH2T (PC);",
863 { "", "", "ldrs @(<disp>,PC)", "10001100i8p1....",
864 "RS = SEXT (i) * 2 + 4 + PH2T (PC);",
868 { "", "n", "ldrc <REG_N>", "0100nnnn00110100",
870 "loop = get_loop_bounds_ext (RS, RE, memory, mem_end, maskw, endianw);",
871 "CHECK_INSN_PTR (insn_ptr);",
874 { "", "", "ldrc #<imm>", "10001010i8*1....",
876 "loop = get_loop_bounds_ext (RS, RE, memory, mem_end, maskw, endianw);",
877 "CHECK_INSN_PTR (insn_ptr);",
881 { "", "n", "lds <REG_N>,<SREG_M>", "0100nnnnssss1010",
884 { "n", "n", "lds.l @<REG_N>+,<SREG_M>", "0100nnnnssss0110",
886 "SREG (m) = RLAT (R[n]);",
889 /* sh2e / sh-dsp (lds <REG_N>,DSR) */
890 { "", "n", "lds <REG_N>,FPSCR", "0100nnnn01101010",
893 /* sh2e / sh-dsp (lds.l @<REG_N>+,DSR) */
894 { "n", "n", "lds.l @<REG_N>+,FPSCR", "0100nnnn01100110",
896 "SET_FPSCR (RLAT (R[n]));",
900 { "", "", "ldtlb", "0000000000111000",
901 "/* We don't implement cache or tlb, so this is a noop. */",
904 { "nm", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
905 "macl (&R0, memory, n, m);",
908 { "nm", "nm", "mac.w @<REG_M>+,@<REG_N>+", "0100nnnnmmmm1111",
909 "macw (&R0, memory, n, m, endianw);",
912 { "n", "", "mov #<imm>,<REG_N>", "1110nnnni8*1....",
915 { "n", "", "movi20 #<imm20>,<REG_N>", "0000nnnni8*10000",
916 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
917 "R[n] = ((i << 24) >> 12) | RIAT (nip);",
918 "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
920 { "n", "", "movi20s #<imm20>,<REG_N>", "0000nnnni8*10001",
921 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
922 "R[n] = ((((i & 0xf0) << 24) >> 12) | RIAT (nip)) << 8;",
923 "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
925 { "n", "m", "mov <REG_M>,<REG_N>", "0110nnnnmmmm0011",
929 { "0", "", "mov.b @(<disp>,GBR),R0", "11000100i8*1....",
931 "R0 = RSBAT (i + GBR);",
934 { "0", "m", "mov.b @(<disp>,<REG_M>),R0", "10000100mmmmi4*1",
936 "R0 = RSBAT (i + R[m]);",
939 { "n", "0m", "mov.b @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1100",
941 "R[n] = RSBAT (R0 + R[m]);",
944 { "nm", "m", "mov.b @<REG_M>+,<REG_N>", "0110nnnnmmmm0100",
946 "R[n] = RSBAT (R[m]);",
950 { "0n", "n", "mov.b @-<REG_N>,R0", "0100nnnn11001011",
953 "R0 = RSBAT (R[n]);",
956 { "", "mn", "mov.b <REG_M>,@<REG_N>", "0010nnnnmmmm0000",
958 "WBAT (R[n], R[m]);",
960 { "", "0", "mov.b R0,@(<disp>,GBR)", "11000000i8*1....",
962 "WBAT (i + GBR, R0);",
964 { "", "m0", "mov.b R0,@(<disp>,<REG_M>)", "10000000mmmmi4*1",
966 "WBAT (i + R[m], R0);",
968 { "", "mn0", "mov.b <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0100",
970 "WBAT (R[n] + R0, R[m]);",
972 { "n", "nm", "mov.b <REG_M>,@-<REG_N>", "0010nnnnmmmm0100",
973 /* Allow for the case where m == n. */
979 { "n", "n0", "mov.b R0,@<REG_N>+", "0100nnnn10001011",
984 { "n", "m", "mov.b @<REG_M>,<REG_N>", "0110nnnnmmmm0000",
986 "R[n] = RSBAT (R[m]);",
990 { "0", "", "mov.l @(<disp>,GBR),R0", "11000110i8*4....",
992 "R0 = RLAT (i + GBR);",
995 { "n", "", "mov.l @(<disp>,PC),<REG_N>", "1101nnnni8p4....",
997 "R[n] = RLAT ((PH2T (PC) & ~3) + 4 + i);",
1000 { "n", "m", "mov.l @(<disp>,<REG_M>),<REG_N>", "0101nnnnmmmmi4*4",
1002 "R[n] = RLAT (i + R[m]);",
1005 { "n", "m0", "mov.l @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1110",
1007 "R[n] = RLAT (R0 + R[m]);",
1010 { "nm", "m", "mov.l @<REG_M>+,<REG_N>", "0110nnnnmmmm0110",
1012 "R[n] = RLAT (R[m]);",
1016 { "0n", "n", "mov.l @-<REG_N>,R0", "0100nnnn11101011",
1019 "R0 = RLAT (R[n]);",
1022 { "n", "m", "mov.l @<REG_M>,<REG_N>", "0110nnnnmmmm0010",
1024 "R[n] = RLAT (R[m]);",
1027 { "", "0", "mov.l R0,@(<disp>,GBR)", "11000010i8*4....",
1029 "WLAT (i + GBR, R0);",
1031 { "", "nm", "mov.l <REG_M>,@(<disp>,<REG_N>)", "0001nnnnmmmmi4*4",
1033 "WLAT (i + R[n], R[m]);",
1035 { "", "nm0", "mov.l <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0110",
1037 "WLAT (R0 + R[n], R[m]);",
1039 { "n", "nm", "mov.l <REG_M>,@-<REG_N>", "0010nnnnmmmm0110",
1040 /* Allow for the case where m == n. */
1046 { "n", "n0", "mov.l R0,@<REG_N>+", "0100nnnn10101011",
1051 { "", "nm", "mov.l <REG_M>,@<REG_N>", "0010nnnnmmmm0010",
1053 "WLAT (R[n], R[m]);",
1056 { "0", "", "mov.w @(<disp>,GBR),R0", "11000101i8*2....",
1058 "R0 = RSWAT (i + GBR);",
1061 { "n", "", "mov.w @(<disp>,PC),<REG_N>", "1001nnnni8p2....",
1063 "R[n] = RSWAT (PH2T (PC + 4 + i));",
1066 { "0", "m", "mov.w @(<disp>,<REG_M>),R0", "10000101mmmmi4*2",
1068 "R0 = RSWAT (i + R[m]);",
1071 { "n", "m0", "mov.w @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1101",
1073 "R[n] = RSWAT (R0 + R[m]);",
1076 { "nm", "n", "mov.w @<REG_M>+,<REG_N>", "0110nnnnmmmm0101",
1078 "R[n] = RSWAT (R[m]);",
1082 { "0n", "n", "mov.w @-<REG_N>,R0", "0100nnnn11011011",
1085 "R0 = RSWAT (R[n]);",
1088 { "n", "m", "mov.w @<REG_M>,<REG_N>", "0110nnnnmmmm0001",
1090 "R[n] = RSWAT (R[m]);",
1093 { "", "0", "mov.w R0,@(<disp>,GBR)", "11000001i8*2....",
1095 "WWAT (i + GBR, R0);",
1097 { "", "0m", "mov.w R0,@(<disp>,<REG_M>)", "10000001mmmmi4*2",
1099 "WWAT (i + R[m], R0);",
1101 { "", "m0n", "mov.w <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0101",
1103 "WWAT (R0 + R[n], R[m]);",
1105 { "n", "mn", "mov.w <REG_M>,@-<REG_N>", "0010nnnnmmmm0101",
1106 /* Allow for the case where m == n. */
1112 { "n", "0n", "mov.w R0,@<REG_N>+", "0100nnnn10011011",
1117 { "", "nm", "mov.w <REG_M>,@<REG_N>", "0010nnnnmmmm0001",
1119 "WWAT (R[n], R[m]);",
1122 { "0", "", "mova @(<disp>,PC),R0", "11000111i8p4....",
1123 "R0 = ((i + 4 + PH2T (PC)) & ~0x3);",
1126 { "", "n0", "movca.l R0, @<REG_N>", "0000nnnn11000011",
1127 "/* We don't simulate cache, so this insn is identical to mov. */",
1129 "WLAT (R[n], R[0]);",
1132 { "", "n0", "movco.l R0, @<REG_N>", "0000nnnn01110011",
1135 "/* if (T) R0 -> (Rn) */",
1137 " WLAT (R[n], R[0]);",
1142 { "0", "n", "movli.l @<REG_N>, R0", "0000nnnn01100011",
1146 "R[0] = RLAT (R[n]);",
1147 "/* if (interrupt/exception) 0 -> LDST */",
1148 "/* (we don't simulate asynchronous interrupts/exceptions) */",
1151 { "n", "", "movt <REG_N>", "0000nnnn00101001",
1154 { "", "", "movrt <REG_N>", "0000nnnn00111001",
1157 { "0", "n", "movua.l @<REG_N>,R0", "0100nnnn10101001",
1159 "int e = target_little_endian ? 3 : 0;",
1161 "R[0] = (RBAT (regn + (0^e)) << 24) + (RBAT (regn + (1^e)) << 16) + ",
1162 " (RBAT (regn + (2^e)) << 8) + RBAT (regn + (3^e));",
1165 { "0n", "n", "movua.l @<REG_N>+,R0", "0100nnnn11101001",
1167 "int e = target_little_endian ? 3 : 0;",
1169 "R[0] = (RBAT (regn + (0^e)) << 24) + (RBAT (regn + (1^e)) << 16) + ",
1170 " (RBAT (regn + (2^e)) << 8) + RBAT (regn + (3^e));",
1174 { "", "mn", "mul.l <REG_M>,<REG_N>", "0000nnnnmmmm0111",
1175 "MACL = ((int) R[n]) * ((int) R[m]);",
1177 #if 0 /* FIXME: The above cast to int is not really portable.
1178 It should be replaced by a SEXT32 macro. */
1179 { "", "nm", "mul.l <REG_M>,<REG_N>", "0000nnnnmmmm0111",
1180 "MACL = R[n] * R[m];",
1184 /* muls.w - see muls */
1185 { "", "mn", "muls <REG_M>,<REG_N>", "0010nnnnmmmm1111",
1186 "MACL = ((int) (short) R[n]) * ((int) (short) R[m]);",
1189 /* mulu.w - see mulu */
1190 { "", "mn", "mulu <REG_M>,<REG_N>", "0010nnnnmmmm1110",
1191 "MACL = (((unsigned int) (unsigned short) R[n])",
1192 " * ((unsigned int) (unsigned short) R[m]));",
1195 { "n", "m", "neg <REG_M>,<REG_N>", "0110nnnnmmmm1011",
1199 { "n", "m", "negc <REG_M>,<REG_N>", "0110nnnnmmmm1010",
1201 "SET_SR_T (ult > 0);",
1202 "R[n] = ult - R[m];",
1203 "SET_SR_T (T || (R[n] > ult));",
1206 { "", "", "nop", "0000000000001001",
1210 { "n", "m", "not <REG_M>,<REG_N>", "0110nnnnmmmm0111",
1215 { "", "n", "icbi @<REG_N>", "0000nnnn11100011",
1216 "/* Except for the effect on the cache - which is not simulated -",
1217 " this is like a nop. */",
1220 { "", "n", "ocbi @<REG_N>", "0000nnnn10010011",
1221 "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
1222 "/* FIXME: Cache not implemented */",
1225 { "", "n", "ocbp @<REG_N>", "0000nnnn10100011",
1226 "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
1227 "/* FIXME: Cache not implemented */",
1230 { "", "n", "ocbwb @<REG_N>", "0000nnnn10110011",
1231 "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
1232 "/* FIXME: Cache not implemented */",
1235 { "0", "", "or #<imm>,R0", "11001011i8*1....",
1238 { "n", "m", "or <REG_M>,<REG_N>", "0010nnnnmmmm1011",
1241 { "", "0", "or.b #<imm>,@(R0,GBR)", "11001111i8*1....",
1243 "WBAT (R0 + GBR, (RBAT (R0 + GBR) | i));",
1246 { "", "n", "pref @<REG_N>", "0000nnnn10000011",
1247 "/* Except for the effect on the cache - which is not simulated -",
1248 " this is like a nop. */",
1252 { "", "n", "prefi @<REG_N>", "0000nnnn11010011",
1253 "/* Except for the effect on the cache - which is not simulated -",
1254 " this is like a nop. */",
1258 { "", "", "synco", "0000000010101011",
1259 "/* Except for the effect on the pipeline - which is not simulated -",
1260 " this is like a nop. */",
1263 { "n", "n", "rotcl <REG_N>", "0100nnnn00100100",
1265 "R[n] = (R[n] << 1) | T;",
1269 { "n", "n", "rotcr <REG_N>", "0100nnnn00100101",
1271 "R[n] = (UR[n] >> 1) | (T << 31);",
1275 { "n", "n", "rotl <REG_N>", "0100nnnn00000100",
1276 "SET_SR_T (R[n] < 0);",
1281 { "n", "n", "rotr <REG_N>", "0100nnnn00000101",
1282 "SET_SR_T (R[n] & 1);",
1283 "R[n] = UR[n] >> 1;",
1284 "R[n] |= (T << 31);",
1287 { "", "", "rte", "0000000000101011",
1291 "SET_NIP (PT2H (RLAT (R[15]) + 2));",
1293 "SET_SR (RLAT (R[15]) & 0x3f3);",
1295 "Delay_Slot (PC + 2);",
1297 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1299 "SET_NIP (PT2H (SPC));",
1301 "Delay_Slot (PC + 2);",
1305 { "", "", "rts", "0000000000001011",
1306 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1307 "SET_NIP (PT2H (PR));",
1309 "Delay_Slot (PC + 2);",
1311 { "", "", "rts/n", "0000000001101011",
1312 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1313 "SET_NIP (PT2H (PR));",
1315 { "0", "n", "rtv/n <REG_N>", "0000nnnn01111011",
1316 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1319 "SET_NIP (PT2H (PR));",
1323 { "", "", "setdmx", "0000000010011000",
1324 "saved_state.asregs.cregs.named.sr |= SR_MASK_DMX;"
1325 "saved_state.asregs.cregs.named.sr &= ~SR_MASK_DMY;"
1329 { "", "", "setdmy", "0000000011001000",
1330 "saved_state.asregs.cregs.named.sr |= SR_MASK_DMY;"
1331 "saved_state.asregs.cregs.named.sr &= ~SR_MASK_DMX;"
1335 { "", "n", "setrc <REG_N>", "0100nnnn00010100",
1338 { "", "", "setrc #<imm>", "10000010i8*1....",
1339 /* It would be more realistic to let loop_start point to some static
1340 memory that contains an illegal opcode and then give a bus error when
1341 the loop is eventually encountered, but it seems not only simpler,
1342 but also more debugging-friendly to just catch the failure here. */
1343 "if (BUSERROR (RS | RE, maskw))",
1344 " RAISE_EXCEPTION (SIGILL);",
1347 " loop = get_loop_bounds (RS, RE, memory, mem_end, maskw, endianw);",
1348 " CHECK_INSN_PTR (insn_ptr);",
1352 { "", "", "sets", "0000000001011000",
1356 { "", "", "sett", "0000000000011000",
1360 { "n", "mn", "shad <REG_M>,<REG_N>", "0100nnnnmmmm1100",
1361 "R[n] = (R[m] < 0) ? (R[m]&0x1f ? R[n] >> ((-R[m])&0x1f) : R[n] >> 31) : (R[n] << (R[m] & 0x1f));",
1364 { "n", "n", "shal <REG_N>", "0100nnnn00100000",
1365 "SET_SR_T (R[n] < 0);",
1369 { "n", "n", "shar <REG_N>", "0100nnnn00100001",
1370 "SET_SR_T (R[n] & 1);",
1371 "R[n] = R[n] >> 1;",
1374 { "n", "mn", "shld <REG_M>,<REG_N>", "0100nnnnmmmm1101",
1375 "R[n] = (R[m] < 0) ? (R[m]&0x1f ? UR[n] >> ((-R[m])&0x1f) : 0): (R[n] << (R[m] & 0x1f));",
1378 { "n", "n", "shll <REG_N>", "0100nnnn00000000",
1379 "SET_SR_T (R[n] < 0);",
1383 { "n", "n", "shll2 <REG_N>", "0100nnnn00001000",
1386 { "n", "n", "shll8 <REG_N>", "0100nnnn00011000",
1389 { "n", "n", "shll16 <REG_N>", "0100nnnn00101000",
1393 { "n", "n", "shlr <REG_N>", "0100nnnn00000001",
1394 "SET_SR_T (R[n] & 1);",
1395 "R[n] = UR[n] >> 1;",
1398 { "n", "n", "shlr2 <REG_N>", "0100nnnn00001001",
1399 "R[n] = UR[n] >> 2;",
1401 { "n", "n", "shlr8 <REG_N>", "0100nnnn00011001",
1402 "R[n] = UR[n] >> 8;",
1404 { "n", "n", "shlr16 <REG_N>", "0100nnnn00101001",
1405 "R[n] = UR[n] >> 16;",
1408 { "", "", "sleep", "0000000000011011",
1409 "nip += trap (0xc3, &R0, PC, memory, maskl, maskw, endianw);",
1412 { "n", "", "stc <CREG_M>,<REG_N>", "0000nnnnmmmm0010",
1416 { "n", "", "stc SGR,<REG_N>", "0000nnnn00111010",
1418 " R[n] = SGR; /* priv mode */",
1420 " RAISE_EXCEPTION (SIGILL); /* user mode */",
1422 { "n", "", "stc DBR,<REG_N>", "0000nnnn11111010",
1424 " R[n] = DBR; /* priv mode */",
1426 " RAISE_EXCEPTION (SIGILL); /* user mode */",
1428 { "n", "", "stc TBR,<REG_N>", "0000nnnn01001010",
1429 "if (SR_MD)", /* FIXME? */
1430 " R[n] = TBR; /* priv mode */",
1432 " RAISE_EXCEPTION (SIGILL); /* user mode */",
1434 { "n", "n", "stc.l <CREG_M>,@-<REG_N>", "0100nnnnmmmm0011",
1437 "WLAT (R[n], CREG (m));",
1439 { "n", "n", "stc.l SGR,@-<REG_N>", "0100nnnn00110010",
1441 "{ /* priv mode */",
1444 " WLAT (R[n], SGR);",
1447 " RAISE_EXCEPTION (SIGILL); /* user mode */",
1449 { "n", "n", "stc.l DBR,@-<REG_N>", "0100nnnn11110010",
1451 "{ /* priv mode */",
1454 " WLAT (R[n], DBR);",
1457 " RAISE_EXCEPTION (SIGILL); /* user mode */",
1460 { "n", "", "sts <SREG_M>,<REG_N>", "0000nnnnssss1010",
1463 { "n", "n", "sts.l <SREG_M>,@-<REG_N>", "0100nnnnssss0010",
1466 "WLAT (R[n], SREG (m));",
1469 { "n", "nm", "sub <REG_M>,<REG_N>", "0011nnnnmmmm1000",
1473 { "n", "nm", "subc <REG_M>,<REG_N>", "0011nnnnmmmm1010",
1475 "SET_SR_T (ult > R[n]);",
1476 "R[n] = ult - R[m];",
1477 "SET_SR_T (T || (R[n] > ult));",
1480 { "n", "nm", "subv <REG_M>,<REG_N>", "0011nnnnmmmm1011",
1481 "ult = R[n] - R[m];",
1482 "SET_SR_T (((R[n] ^ R[m]) & (ult ^ R[n])) >> 31);",
1486 { "n", "nm", "swap.b <REG_M>,<REG_N>", "0110nnnnmmmm1000",
1487 "R[n] = ((R[m] & 0xffff0000)",
1488 " | ((R[m] << 8) & 0xff00)",
1489 " | ((R[m] >> 8) & 0x00ff));",
1491 { "n", "nm", "swap.w <REG_M>,<REG_N>", "0110nnnnmmmm1001",
1492 "R[n] = (((R[m] << 16) & 0xffff0000)",
1493 " | ((R[m] >> 16) & 0x00ffff));",
1496 { "", "n", "tas.b @<REG_N>", "0100nnnn00011011",
1498 "ult = RBAT (R[n]);",
1499 "SET_SR_T (ult == 0);",
1500 "WBAT (R[n],ult|0x80);",
1503 { "0", "", "trapa #<imm>", "11000011i8*1....",
1504 "long imm = 0xff & i;",
1505 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1506 "if (i < 20 || i == 33 || i == 34 || i == 0xc3)",
1507 " nip += trap (i, &R0, PC, memory, maskl, maskw, endianw);",
1512 " WLAT (R[15], GET_SR ());",
1514 " WLAT (R[15], PH2T (PC + 2));",
1516 "else if (!SR_BL) {",
1517 " SSR = GET_SR ();",
1518 " SPC = PH2T (PC + 2);",
1519 " SET_SR (GET_SR () | SR_MASK_MD | SR_MASK_BL | SR_MASK_RB);",
1520 " /* FIXME: EXPEVT = 0x00000160; */",
1522 " SET_NIP (PT2H (RLAT (VBR + (imm<<2))));",
1526 { "", "mn", "tst <REG_M>,<REG_N>", "0010nnnnmmmm1000",
1527 "SET_SR_T ((R[n] & R[m]) == 0);",
1529 { "", "0", "tst #<imm>,R0", "11001000i8*1....",
1530 "SET_SR_T ((R0 & i) == 0);",
1532 { "", "0", "tst.b #<imm>,@(R0,GBR)", "11001100i8*1....",
1534 "SET_SR_T ((RBAT (GBR+R0) & i) == 0);",
1537 { "", "0", "xor #<imm>,R0", "11001010i8*1....",
1540 { "n", "mn", "xor <REG_M>,<REG_N>", "0010nnnnmmmm1010",
1543 { "", "0", "xor.b #<imm>,@(R0,GBR)", "11001110i8*1....",
1545 "ult = RBAT (GBR+R0);",
1547 "WBAT (GBR + R0, ult);",
1550 { "n", "nm", "xtrct <REG_M>,<REG_N>", "0010nnnnmmmm1101",
1551 "R[n] = (((R[n] >> 16) & 0xffff)",
1552 " | ((R[m] << 16) & 0xffff0000));",
1556 { "divs.l <REG_M>,<REG_N>", "0100nnnnmmmm1110",
1557 "divl (0, R[n], R[m]);",
1559 { "divu.l <REG_M>,<REG_N>", "0100nnnnmmmm1101",
1560 "divl (0, R[n], R[m]);",
1568 /* If this is disabled, the simulator speeds up by about 12% on a
1569 450 MHz PIII - 9% with ACE_FAST.
1570 Maybe we should have separate simulator loops? */
1572 { "n", "n", "movs.w @-<REG_N>,<DSP_REG_M>", "111101NNMMMM0000",
1575 "DSP_R (m) = RSWAT (R[n]) << 16;",
1576 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1578 { "", "n", "movs.w @<REG_N>,<DSP_REG_M>", "111101NNMMMM0100",
1580 "DSP_R (m) = RSWAT (R[n]) << 16;",
1581 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1583 { "n", "n", "movs.w @<REG_N>+,<DSP_REG_M>", "111101NNMMMM1000",
1585 "DSP_R (m) = RSWAT (R[n]) << 16;",
1586 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1589 { "n", "n8","movs.w @<REG_N>+REG_8,<DSP_REG_M>", "111101NNMMMM1100",
1591 "DSP_R (m) = RSWAT (R[n]) << 16;",
1592 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1595 { "n", "n", "movs.w @-<REG_N>,<DSP_GRD_M>", "111101NNGGGG0000",
1598 "DSP_R (m) = RSWAT (R[n]);",
1600 { "", "n", "movs.w @<REG_N>,<DSP_GRD_M>", "111101NNGGGG0100",
1602 "DSP_R (m) = RSWAT (R[n]);",
1604 { "n", "n", "movs.w @<REG_N>+,<DSP_GRD_M>", "111101NNGGGG1000",
1606 "DSP_R (m) = RSWAT (R[n]);",
1609 { "n", "n8","movs.w @<REG_N>+REG_8,<DSP_GRD_M>", "111101NNGGGG1100",
1611 "DSP_R (m) = RSWAT (R[n]);",
1614 { "n", "n", "movs.w <DSP_REG_M>,@-<REG_N>", "111101NNMMMM0001",
1617 "WWAT (R[n], DSP_R (m) >> 16);",
1619 { "", "n", "movs.w <DSP_REG_M>,@<REG_N>", "111101NNMMMM0101",
1621 "WWAT (R[n], DSP_R (m) >> 16);",
1623 { "n", "n", "movs.w <DSP_REG_M>,@<REG_N>+", "111101NNMMMM1001",
1625 "WWAT (R[n], DSP_R (m) >> 16);",
1628 { "n", "n8","movs.w <DSP_REG_M>,@<REG_N>+REG_8", "111101NNMMMM1101",
1630 "WWAT (R[n], DSP_R (m) >> 16);",
1633 { "n", "n", "movs.w <DSP_GRD_M>,@-<REG_N>", "111101NNGGGG0001",
1636 "WWAT (R[n], SEXT (DSP_R (m)));",
1638 { "", "n", "movs.w <DSP_GRD_M>,@<REG_N>", "111101NNGGGG0101",
1640 "WWAT (R[n], SEXT (DSP_R (m)));",
1642 { "n", "n", "movs.w <DSP_GRD_M>,@<REG_N>+", "111101NNGGGG1001",
1644 "WWAT (R[n], SEXT (DSP_R (m)));",
1647 { "n", "n8","movs.w <DSP_GRD_M>,@<REG_N>+REG_8", "111101NNGGGG1101",
1649 "WWAT (R[n], SEXT (DSP_R (m)));",
1652 { "n", "n", "movs.l @-<REG_N>,<DSP_REG_M>", "111101NNMMMM0010",
1655 "DSP_R (m) = RLAT (R[n]);",
1656 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1658 { "", "n", "movs.l @<REG_N>,<DSP_REG_M>", "111101NNMMMM0110",
1660 "DSP_R (m) = RLAT (R[n]);",
1661 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1663 { "n", "n", "movs.l @<REG_N>+,<DSP_REG_M>", "111101NNMMMM1010",
1665 "DSP_R (m) = RLAT (R[n]);",
1666 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1669 { "n", "n8","movs.l @<REG_N>+REG_8,<DSP_REG_M>", "111101NNMMMM1110",
1671 "DSP_R (m) = RLAT (R[n]);",
1672 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1675 { "n", "n", "movs.l <DSP_REG_M>,@-<REG_N>", "111101NNMMMM0011",
1678 "WLAT (R[n], DSP_R (m));",
1680 { "", "n", "movs.l <DSP_REG_M>,@<REG_N>", "111101NNMMMM0111",
1682 "WLAT (R[n], DSP_R (m));",
1684 { "n", "n", "movs.l <DSP_REG_M>,@<REG_N>+", "111101NNMMMM1011",
1686 "WLAT (R[n], DSP_R (m));",
1689 { "n", "n8","movs.l <DSP_REG_M>,@<REG_N>+REG_8", "111101NNMMMM1111",
1691 "WLAT (R[n], DSP_R (m));",
1694 { "n", "n", "movs.l <DSP_GRD_M>,@-<REG_N>", "111101NNGGGG0011",
1697 "WLAT (R[n], SEXT (DSP_R (m)));",
1699 { "", "n", "movs.l <DSP_GRD_M>,@<REG_N>", "111101NNGGGG0111",
1701 "WLAT (R[n], SEXT (DSP_R (m)));",
1703 { "n", "n", "movs.l <DSP_GRD_M>,@<REG_N>+", "111101NNGGGG1011",
1705 "WLAT (R[n], SEXT (DSP_R (m)));",
1708 { "n", "n8","movs.l <DSP_GRD_M>,@<REG_N>+REG_8", "111101NNGGGG1111",
1710 "WLAT (R[n], SEXT (DSP_R (m)));",
1713 { "", "n", "movx.w @<REG_xy>,<DSP_XY>", "111100xyXY0001??",
1714 "DSP_R (m) = RSWAT (R[n]) << 16;",
1717 " iword &= 0xfd53; goto top;",
1720 { "", "n", "movx.l @<REG_xy>,<DSP_XY>", "111100xyXY010100",
1721 "DSP_R (m) = RLAT (R[n]);",
1723 { "n", "n", "movx.w @<REG_xy>+,<DSP_XY>", "111100xyXY0010??",
1724 "DSP_R (m) = RSWAT (R[n]) << 16;",
1725 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
1728 " iword &= 0xfd53; goto top;",
1731 { "n", "n", "movx.l @<REG_xy>+,<DSP_XY>", "111100xyXY011000",
1732 "DSP_R (m) = RLAT (R[n]);",
1733 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 4;",
1735 { "n", "n8","movx.w @<REG_xy>+REG_8,<DSP_XY>", "111100xyXY0011??",
1736 "DSP_R (m) = RSWAT (R[n]) << 16;",
1737 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
1740 " iword &= 0xfd53; goto top;",
1743 { "n", "n8","movx.l @<REG_xy>+REG_8,<DSP_XY>", "111100xyXY011100",
1744 "DSP_R (m) = RLAT (R[n]);",
1745 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
1747 { "", "n", "movx.w <DSP_Ax>,@<REG_xy>", "111100xyax1001??",
1748 "WWAT (R[n], DSP_R (m) >> 16);",
1751 " iword &= 0xfd53; goto top;",
1754 { "", "n", "movx.l <DSP_Ax>,@<REG_xy>", "111100xyax110100",
1755 "WLAT (R[n], DSP_R (m));",
1757 { "n", "n", "movx.w <DSP_Ax>,@<REG_xy>+", "111100xyax1010??",
1758 "WWAT (R[n], DSP_R (m) >> 16);",
1759 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
1762 " iword &= 0xfd53; goto top;",
1765 { "n", "n", "movx.l <DSP_Ax>,@<REG_xy>+", "111100xyax111000",
1766 "WLAT (R[n], DSP_R (m));",
1767 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 4;",
1769 { "n", "n8","movx.w <DSP_Ax>,@<REG_xy>+REG_8","111100xyax1011??",
1770 "WWAT (R[n], DSP_R (m) >> 16);",
1771 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
1774 " iword &= 0xfd53; goto top;",
1777 { "n", "n8","movx.l <DSP_Ax>,@<REG_xy>+REG_8","111100xyax111100",
1778 "WLAT (R[n], DSP_R (m));",
1779 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
1781 { "", "n", "movy.w @<REG_yx>,<DSP_YX>", "111100yxYX000001",
1782 "DSP_R (m) = RSWAT (R[n]) << 16;",
1784 { "n", "n", "movy.w @<REG_yx>+,<DSP_YX>", "111100yxYX000010",
1785 "DSP_R (m) = RSWAT (R[n]) << 16;",
1786 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
1788 { "n", "n9","movy.w @<REG_yx>+REG_9,<DSP_YX>", "111100yxYX000011",
1789 "DSP_R (m) = RSWAT (R[n]) << 16;",
1790 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
1792 { "", "n", "movy.w <DSP_Ay>,@<REG_yx>", "111100yxAY010001",
1793 "WWAT (R[n], DSP_R (m) >> 16);",
1795 { "n", "n", "movy.w <DSP_Ay>,@<REG_yx>+", "111100yxAY010010",
1796 "WWAT (R[n], DSP_R (m) >> 16);",
1797 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
1799 { "n", "n9", "movy.w <DSP_Ay>,@<REG_yx>+REG_9", "111100yxAY010011",
1800 "WWAT (R[n], DSP_R (m) >> 16);",
1801 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
1803 { "", "n", "movy.l @<REG_yx>,<DSP_YX>", "111100yxYX100001",
1804 "DSP_R (m) = RLAT (R[n]);",
1806 { "n", "n", "movy.l @<REG_yx>+,<DSP_YX>", "111100yxYX100010",
1807 "DSP_R (m) = RLAT (R[n]);",
1808 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 4;",
1810 { "n", "n9","movy.l @<REG_yx>+REG_9,<DSP_YX>", "111100yxYX100011",
1811 "DSP_R (m) = RLAT (R[n]);",
1812 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
1814 { "", "n", "movy.l <DSP_Ay>,@<REG_yx>", "111100yxAY110001",
1815 "WLAT (R[n], DSP_R (m));",
1817 { "n", "n", "movy.l <DSP_Ay>,@<REG_yx>+", "111100yxAY110010",
1818 "WLAT (R[n], DSP_R (m));",
1819 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 4;",
1821 { "n", "n9", "movy.l <DSP_Ay>,@<REG_yx>+REG_9", "111100yxAY110011",
1822 "WLAT (R[n], DSP_R (m));",
1823 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
1825 { "", "", "nopx nopy", "1111000000000000",
1828 { "", "", "ppi", "1111100000000000",
1829 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1830 "ppi_insn (RIAT (nip));",
1831 "SET_NIP (nip + 2);",
1832 "iword &= 0xf7ff; goto top;",
1839 { "","", "pshl #<imm>,dz", "00000iiim16.zzzz",
1840 "int Sz = DSP_R (z) & 0xffff0000;",
1844 "else if (i >= 128 - 16)",
1845 " res = (unsigned) Sz >> 128 - i; /* no sign extension */",
1848 " RAISE_EXCEPTION (SIGILL);",
1851 "res &= 0xffff0000;",
1855 { "","", "psha #<imm>,dz", "00010iiim32.zzzz",
1856 "int Sz = DSP_R (z);",
1857 "int Sz_grd = GET_DSP_GRD (z);",
1869 " res_grd = Sz_grd << i | (unsigned) Sz >> 32 - i;",
1871 " res_grd = SEXT (res_grd);",
1872 " carry = res_grd & 1;",
1874 "else if (i >= 96)",
1879 " res_grd = SIGN32 (Sz_grd);",
1884 " res = Sz >> i | Sz_grd << 32 - i;",
1885 " res_grd = Sz_grd >> i;",
1887 " carry = Sz >> (i - 1) & 1;",
1891 " RAISE_EXCEPTION (SIGILL);",
1894 "COMPUTE_OVERFLOW;",
1895 "greater_equal = 0;",
1897 { "","", "pmuls Se,Sf,Dg", "0100eeffxxyygguu",
1898 "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
1899 "if (res == 0x80000000)",
1900 " res = 0x7fffffff;",
1902 "DSP_GRD (g) = SIGN32 (res);",
1905 { "","", "psub Sx,Sy,Du pmuls Se,Sf,Dg", "0110eeffxxyygguu",
1906 "int Sx = DSP_R (x);",
1907 "int Sx_grd = GET_DSP_GRD (x);",
1908 "int Sy = DSP_R (y);",
1909 "int Sy_grd = SIGN32 (Sy);",
1911 "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
1912 "if (res == 0x80000000)",
1913 " res = 0x7fffffff;",
1915 "DSP_GRD (g) = SIGN32 (res);",
1919 "carry = (unsigned) res > (unsigned) Sx;",
1920 "res_grd = Sx_grd - Sy_grd - carry;",
1921 "COMPUTE_OVERFLOW;",
1924 { "","", "padd Sx,Sy,Du pmuls Se,Sf,Dg", "0111eeffxxyygguu",
1925 "int Sx = DSP_R (x);",
1926 "int Sx_grd = GET_DSP_GRD (x);",
1927 "int Sy = DSP_R (y);",
1928 "int Sy_grd = SIGN32 (Sy);",
1930 "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
1931 "if (res == 0x80000000)",
1932 " res = 0x7fffffff;",
1934 "DSP_GRD (g) = SIGN32 (res);",
1938 "carry = (unsigned) res < (unsigned) Sx;",
1939 "res_grd = Sx_grd + Sy_grd + carry;",
1940 "COMPUTE_OVERFLOW;",
1942 { "","", "psubc Sx,Sy,Dz", "10100000xxyyzzzz",
1943 "int Sx = DSP_R (x);",
1944 "int Sx_grd = GET_DSP_GRD (x);",
1945 "int Sy = DSP_R (y);",
1946 "int Sy_grd = SIGN32 (Sy);",
1948 "res = Sx - Sy - (DSR & 1);",
1949 "carry = (unsigned) res > (unsigned) Sx || (res == Sx && Sy);",
1950 "res_grd = Sx_grd + Sy_grd + carry;",
1951 "COMPUTE_OVERFLOW;",
1954 "if (res || res_grd)\n",
1955 " DSR |= greater_equal | res_grd >> 2 & DSR_MASK_N | overflow;\n",
1957 " DSR |= DSR_MASK_Z | overflow;\n",
1961 { "","", "paddc Sx,Sy,Dz", "10110000xxyyzzzz",
1962 "int Sx = DSP_R (x);",
1963 "int Sx_grd = GET_DSP_GRD (x);",
1964 "int Sy = DSP_R (y);",
1965 "int Sy_grd = SIGN32 (Sy);",
1967 "res = Sx + Sy + (DSR & 1);",
1968 "carry = (unsigned) res < (unsigned) Sx || (res == Sx && Sy);",
1969 "res_grd = Sx_grd + Sy_grd + carry;",
1970 "COMPUTE_OVERFLOW;",
1973 "if (res || res_grd)\n",
1974 " DSR |= greater_equal | res_grd >> 2 & DSR_MASK_N | overflow;\n",
1976 " DSR |= DSR_MASK_Z | overflow;\n",
1980 { "","", "pcmp Sx,Sy", "10000100xxyyzzzz",
1981 "int Sx = DSP_R (x);",
1982 "int Sx_grd = GET_DSP_GRD (x);",
1983 "int Sy = DSP_R (y);",
1984 "int Sy_grd = SIGN32 (Sy);",
1986 "z = 17; /* Ignore result. */",
1988 "carry = (unsigned) res > (unsigned) Sx;",
1989 "res_grd = Sx_grd - Sy_grd - carry;",
1990 "COMPUTE_OVERFLOW;",
1993 { "","", "pwsb Sx,Sy,Dz", "10100100xxyyzzzz",
1995 { "","", "pwad Sx,Sy,Dz", "10110100xxyyzzzz",
1997 { "","", "(if cc) pabs Sx,Dz", "100010ccxx01zzzz",
1998 "/* FIXME: duplicate code pabs. */",
2000 "res_grd = GET_DSP_GRD (x);",
2006 " carry = (res != 0); /* The manual has a bug here. */",
2007 " res_grd = -res_grd - carry;",
2009 "COMPUTE_OVERFLOW;",
2010 "/* ??? The re-computing of overflow after",
2011 " saturation processing is specific to pabs. */",
2012 "overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0;",
2015 { "","", "pabs Sx,Dz", "10001000xx..zzzz",
2017 "res_grd = GET_DSP_GRD (x);",
2023 " carry = (res != 0); /* The manual has a bug here. */",
2024 " res_grd = -res_grd - carry;",
2026 "COMPUTE_OVERFLOW;",
2027 "/* ??? The re-computing of overflow after",
2028 " saturation processing is specific to pabs. */",
2029 "overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0;",
2033 { "","", "(if cc) prnd Sx,Dz", "100110ccxx01zzzz",
2034 "/* FIXME: duplicate code prnd. */",
2035 "int Sx = DSP_R (x);",
2036 "int Sx_grd = GET_DSP_GRD (x);",
2038 "res = (Sx + 0x8000) & 0xffff0000;",
2039 "carry = (unsigned) res < (unsigned) Sx;",
2040 "res_grd = Sx_grd + carry;",
2041 "COMPUTE_OVERFLOW;",
2044 { "","", "prnd Sx,Dz", "10011000xx..zzzz",
2045 "int Sx = DSP_R (x);",
2046 "int Sx_grd = GET_DSP_GRD (x);",
2048 "res = (Sx + 0x8000) & 0xffff0000;",
2049 "carry = (unsigned) res < (unsigned) Sx;",
2050 "res_grd = Sx_grd + carry;",
2051 "COMPUTE_OVERFLOW;",
2055 { "","", "(if cc) pabs Sy,Dz", "101010cc01yyzzzz",
2056 "/* FIXME: duplicate code pabs. */",
2060 "greater_equal = DSR_MASK_G;",
2070 " res = 0x7fffffff;",
2073 " overflow = DSR_MASK_V;",
2074 " greater_equal = 0;",
2079 { "","", "pabs Sy,Dz", "10101000..yyzzzz",
2083 "greater_equal = DSR_MASK_G;",
2093 " res = 0x7fffffff;",
2096 " overflow = DSR_MASK_V;",
2097 " greater_equal = 0;",
2102 { "","", "(if cc) prnd Sy,Dz", "101110cc01yyzzzz",
2103 "/* FIXME: duplicate code prnd. */",
2104 "int Sy = DSP_R (y);",
2105 "int Sy_grd = SIGN32 (Sy);",
2107 "res = (Sy + 0x8000) & 0xffff0000;",
2108 "carry = (unsigned) res < (unsigned) Sy;",
2109 "res_grd = Sy_grd + carry;",
2110 "COMPUTE_OVERFLOW;",
2113 { "","", "prnd Sy,Dz", "10111000..yyzzzz",
2114 "int Sy = DSP_R (y);",
2115 "int Sy_grd = SIGN32 (Sy);",
2117 "res = (Sy + 0x8000) & 0xffff0000;",
2118 "carry = (unsigned) res < (unsigned) Sy;",
2119 "res_grd = Sy_grd + carry;",
2120 "COMPUTE_OVERFLOW;",
2123 { "","", "(if cc) pshl Sx,Sy,Dz", "100000ccxxyyzzzz",
2124 "int Sx = DSP_R (x) & 0xffff0000;",
2125 "int Sy = DSP_R (y) >> 16 & 0x7f;",
2129 "else if (Sy >= 128 - 16)",
2130 " res = (unsigned) Sx >> 128 - Sy; /* no sign extension */",
2133 " RAISE_EXCEPTION (SIGILL);",
2136 "goto cond_logical;",
2138 { "","", "(if cc) psha Sx,Sy,Dz", "100100ccxxyyzzzz",
2139 "int Sx = DSP_R (x);",
2140 "int Sx_grd = GET_DSP_GRD (x);",
2141 "int Sy = DSP_R (y) >> 16 & 0x7f;",
2153 " res_grd = Sx_grd << Sy | (unsigned) Sx >> 32 - Sy;",
2155 " res_grd = SEXT (res_grd);",
2156 " carry = res_grd & 1;",
2158 "else if (Sy >= 96)",
2163 " res_grd = SIGN32 (Sx_grd);",
2168 " res = Sx >> Sy | Sx_grd << 32 - Sy;",
2169 " res_grd = Sx_grd >> Sy;",
2171 " carry = Sx >> (Sy - 1) & 1;",
2175 " RAISE_EXCEPTION (SIGILL);",
2178 "COMPUTE_OVERFLOW;",
2179 "greater_equal = 0;",
2181 { "","", "(if cc) psub Sx,Sy,Dz", "101000ccxxyyzzzz",
2182 "int Sx = DSP_R (x);",
2183 "int Sx_grd = GET_DSP_GRD (x);",
2184 "int Sy = DSP_R (y);",
2185 "int Sy_grd = SIGN32 (Sy);",
2188 "carry = (unsigned) res > (unsigned) Sx;",
2189 "res_grd = Sx_grd - Sy_grd - carry;",
2190 "COMPUTE_OVERFLOW;",
2193 { "","", "(if cc) psub Sy,Sx,Dz", "100001ccxxyyzzzz",
2194 "int Sx = DSP_R (x);",
2195 "int Sx_grd = GET_DSP_GRD (x);",
2196 "int Sy = DSP_R (y);",
2197 "int Sy_grd = SIGN32 (Sy);",
2200 "carry = (unsigned) res > (unsigned) Sy;",
2201 "res_grd = Sy_grd - Sx_grd - carry;",
2202 "COMPUTE_OVERFLOW;",
2205 { "","", "(if cc) padd Sx,Sy,Dz", "101100ccxxyyzzzz",
2206 "int Sx = DSP_R (x);",
2207 "int Sx_grd = GET_DSP_GRD (x);",
2208 "int Sy = DSP_R (y);",
2209 "int Sy_grd = SIGN32 (Sy);",
2212 "carry = (unsigned) res < (unsigned) Sx;",
2213 "res_grd = Sx_grd + Sy_grd + carry;",
2214 "COMPUTE_OVERFLOW;",
2217 { "","", "(if cc) pand Sx,Sy,Dz", "100101ccxxyyzzzz",
2218 "res = DSP_R (x) & DSP_R (y);",
2220 "res &= 0xffff0000;",
2222 "if (iword & 0x200)\n",
2223 " goto assign_z;\n",
2227 "greater_equal = 0;",
2230 " DSR |= res >> 26 & DSR_MASK_N;\n",
2232 " DSR |= DSR_MASK_Z;\n",
2233 "goto assign_dc;\n",
2235 { "","", "(if cc) pxor Sx,Sy,Dz", "101001ccxxyyzzzz",
2236 "res = DSP_R (x) ^ DSP_R (y);",
2237 "goto cond_logical;",
2239 { "","", "(if cc) por Sx,Sy,Dz", "101101ccxxyyzzzz",
2240 "res = DSP_R (x) | DSP_R (y);",
2241 "goto cond_logical;",
2243 { "","", "(if cc) pdec Sx,Dz", "100010ccxx..zzzz",
2244 "int Sx = DSP_R (x);",
2245 "int Sx_grd = GET_DSP_GRD (x);",
2247 "res = Sx - 0x10000;",
2248 "carry = res > Sx;",
2249 "res_grd = Sx_grd - carry;",
2250 "COMPUTE_OVERFLOW;",
2252 "res &= 0xffff0000;",
2254 { "","", "(if cc) pinc Sx,Dz", "100110ccxx..zzzz",
2255 "int Sx = DSP_R (x);",
2256 "int Sx_grd = GET_DSP_GRD (x);",
2258 "res = Sx + 0x10000;",
2259 "carry = res < Sx;",
2260 "res_grd = Sx_grd + carry;",
2261 "COMPUTE_OVERFLOW;",
2263 "res &= 0xffff0000;",
2265 { "","", "(if cc) pdec Sy,Dz", "101010cc..yyzzzz",
2266 "int Sy = DSP_R (y);",
2267 "int Sy_grd = SIGN32 (Sy);",
2269 "res = Sy - 0x10000;",
2270 "carry = res > Sy;",
2271 "res_grd = Sy_grd - carry;",
2272 "COMPUTE_OVERFLOW;",
2274 "res &= 0xffff0000;",
2276 { "","", "(if cc) pinc Sy,Dz", "101110cc..yyzzzz",
2277 "int Sy = DSP_R (y);",
2278 "int Sy_grd = SIGN32 (Sy);",
2280 "res = Sy + 0x10000;",
2281 "carry = res < Sy;",
2282 "res_grd = Sy_grd + carry;",
2283 "COMPUTE_OVERFLOW;",
2285 "res &= 0xffff0000;",
2287 { "","", "(if cc) pclr Dz", "100011cc....zzzz",
2292 "greater_equal = 1;",
2294 { "","", "pclr Du pmuls Se,Sf,Dg", "0100eeff0001gguu",
2295 "/* Do multiply. */",
2296 "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
2297 "if (res == 0x80000000)",
2298 " res = 0x7fffffff;",
2300 "DSP_GRD (g) = SIGN32 (res);",
2301 "/* FIXME: update DSR based on results of multiply! */",
2309 { "","", "(if cc) pdmsb Sx,Dz", "100111ccxx..zzzz",
2310 "unsigned Sx = DSP_R (x);",
2311 "int Sx_grd = GET_DSP_GRD (x);",
2316 " Sx_grd = ~Sx_grd;",
2330 " if (Sx & ~0 << i)",
2338 "res_grd = SIGN32 (res);",
2343 { "","", "(if cc) pdmsb Sy,Dz", "101111cc..yyzzzz",
2344 "unsigned Sy = DSP_R (y);",
2353 " if (Sy & ~0 << i)",
2361 "res_grd = SIGN32 (res);",
2366 { "","", "(if cc) pneg Sx,Dz", "110010ccxx..zzzz",
2367 "int Sx = DSP_R (x);",
2368 "int Sx_grd = GET_DSP_GRD (x);",
2371 "carry = res != 0;",
2372 "res_grd = 0 - Sx_grd - carry;",
2373 "COMPUTE_OVERFLOW;",
2376 { "","", "(if cc) pcopy Sx,Dz", "110110ccxx..zzzz",
2378 "res_grd = GET_DSP_GRD (x);",
2380 "COMPUTE_OVERFLOW;",
2383 { "","", "(if cc) pneg Sy,Dz", "111010cc..yyzzzz",
2384 "int Sy = DSP_R (y);",
2385 "int Sy_grd = SIGN32 (Sy);",
2388 "carry = res != 0;",
2389 "res_grd = 0 - Sy_grd - carry;",
2390 "COMPUTE_OVERFLOW;",
2393 { "","", "(if cc) pcopy Sy,Dz", "111110cc..yyzzzz",
2395 "res_grd = SIGN32 (res);",
2397 "COMPUTE_OVERFLOW;",
2400 { "","", "(if cc) psts MACH,Dz", "110011cc....zzzz",
2402 "res_grd = SIGN32 (res);",
2405 { "","", "(if cc) psts MACL,Dz", "110111cc....zzzz",
2407 "res_grd = SIGN32 (res);",
2410 { "","", "(if cc) plds Dz,MACH", "111011cc....zzzz",
2411 "if (0xa05f >> z & 1)",
2412 " RAISE_EXCEPTION (SIGILL);",
2414 " MACH = DSP_R (z);",
2417 { "","", "(if cc) plds Dz,MACL", "111111cc....zzzz",
2418 "if (0xa05f >> z & 1)",
2419 " RAISE_EXCEPTION (SIGILL);",
2421 " MACL = DSP_R (z) = res;",
2425 { "","", "(if cc) pswap Sx,Dz", "100111ccxx01zzzz",
2426 "int Sx = DSP_R (x);",
2428 "res = ((Sx & 0xffff) * 65536) + ((Sx >> 16) & 0xffff);",
2429 "res_grd = GET_DSP_GRD (x);",
2432 "greater_equal = res & 0x80000000 ? 0 : DSR_MASK_G;",
2435 { "","", "(if cc) pswap Sy,Dz", "101111cc01yyzzzz",
2436 "int Sy = DSP_R (y);",
2438 "res = ((Sy & 0xffff) * 65536) + ((Sy >> 16) & 0xffff);",
2439 "res_grd = SIGN32 (Sy);",
2442 "greater_equal = res & 0x80000000 ? 0 : DSR_MASK_G;",
2448 /* Tables of things to put into enums for sh-opc.h */
2449 static char *nibble_type_list
[] =
2484 char *arg_type_list
[] =
2518 make_enum_list (name
, s
)
2523 printf ("typedef enum {\n");
2526 printf ("\t%s,\n", *s
);
2530 printf ("} %s;\n", name
);
2542 memcpy (bufa
, a
->code
, 4);
2543 memcpy (bufa
+ 4, a
->code
+ 12, 4);
2546 memcpy (bufb
, b
->code
, 4);
2547 memcpy (bufb
+ 4, b
->code
+ 12, 4);
2549 diff
= strcmp (bufa
, bufb
);
2550 /* Stabilize the sort, so that later entries can override more general
2551 preceding entries. */
2552 return diff
? diff
: a
- b
;
2566 qsort (tab
, len
, sizeof (*p
), qfunc
);
2574 for (p
= tab
; p
->name
; p
++)
2576 printf ("%s %-30s\n", p
->code
, p
->name
);
2580 static unsigned short table
[1 << 16];
2582 static int warn_conflicts
= 0;
2585 conflict_warn (val
, i
)
2592 fprintf (stderr
, "Warning: opcode table conflict: 0x%04x (idx %d && %d)\n",
2593 val
, i
, table
[val
]);
2595 for (ix
= sizeof (tab
) / sizeof (tab
[0]); ix
>= 0; ix
--)
2596 if (tab
[ix
].index
== i
|| tab
[ix
].index
== j
)
2598 key
= ((tab
[ix
].code
[0] - '0') << 3) +
2599 ((tab
[ix
].code
[1] - '0') << 2) +
2600 ((tab
[ix
].code
[2] - '0') << 1) +
2601 ((tab
[ix
].code
[3] - '0'));
2603 if (val
>> 12 == key
)
2604 fprintf (stderr
, " %s -- %s\n", tab
[ix
].code
, tab
[ix
].name
);
2607 for (ix
= sizeof (movsxy_tab
) / sizeof (movsxy_tab
[0]); ix
>= 0; ix
--)
2608 if (movsxy_tab
[ix
].index
== i
|| movsxy_tab
[ix
].index
== j
)
2610 key
= ((movsxy_tab
[ix
].code
[0] - '0') << 3) +
2611 ((movsxy_tab
[ix
].code
[1] - '0') << 2) +
2612 ((movsxy_tab
[ix
].code
[2] - '0') << 1) +
2613 ((movsxy_tab
[ix
].code
[3] - '0'));
2615 if (val
>> 12 == key
)
2616 fprintf (stderr
, " %s -- %s\n",
2617 movsxy_tab
[ix
].code
, movsxy_tab
[ix
].name
);
2620 for (ix
= sizeof (ppi_tab
) / sizeof (ppi_tab
[0]); ix
>= 0; ix
--)
2621 if (ppi_tab
[ix
].index
== i
|| ppi_tab
[ix
].index
== j
)
2623 key
= ((ppi_tab
[ix
].code
[0] - '0') << 3) +
2624 ((ppi_tab
[ix
].code
[1] - '0') << 2) +
2625 ((ppi_tab
[ix
].code
[2] - '0') << 1) +
2626 ((ppi_tab
[ix
].code
[3] - '0'));
2628 if (val
>> 12 == key
)
2629 fprintf (stderr
, " %s -- %s\n",
2630 ppi_tab
[ix
].code
, ppi_tab
[ix
].name
);
2634 /* Take an opcode, expand all varying fields in it out and fill all the
2635 right entries in 'table' with the opcode index. */
2638 expand_opcode (val
, i
, s
)
2645 if (warn_conflicts
&& table
[val
] != 0)
2646 conflict_warn (val
, i
);
2656 fprintf (stderr
, "expand_opcode: illegal char '%c'\n", s
[0]);
2660 /* Consume an arbitrary number of ones and zeros. */
2662 j
= (j
<< 1) + (s
[m
++] - '0');
2663 } while (s
[m
] == '0' || s
[m
] == '1');
2664 expand_opcode ((val
<< m
) | j
, i
, s
+ m
);
2666 case 'N': /* NN -- four-way fork */
2667 for (j
= 0; j
< 4; j
++)
2668 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2670 case 'x': /* xx or xy -- two-way or four-way fork */
2671 for (j
= 0; j
< 4; j
+= (s
[1] == 'x' ? 2 : 1))
2672 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2674 case 'y': /* yy or yx -- two-way or four-way fork */
2675 for (j
= 0; j
< (s
[1] == 'x' ? 4 : 2); j
++)
2676 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2678 case '?': /* Seven-way "wildcard" fork for movxy */
2679 expand_opcode ((val
<< 2), i
, s
+ 2);
2680 for (j
= 1; j
< 4; j
++)
2682 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2683 expand_opcode ((val
<< 2) | (j
+ 16), i
, s
+ 2);
2686 case 'i': /* eg. "i8*1" */
2687 case '.': /* "...." is a wildcard */
2690 /* nnnn, mmmm, i#*#, .... -- 16-way fork. */
2691 for (j
= 0; j
< 16; j
++)
2692 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2695 /* eeee -- even numbered register:
2697 for (j
= 0; j
< 15; j
+= 2)
2698 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2701 /* A0, A1, X0, X1, Y0, Y1, M0, M1, A0G, A1G:
2702 MMMM -- 10-way fork */
2703 expand_opcode ((val
<< 4) | 5, i
, s
+ 4);
2704 for (j
= 7; j
< 16; j
++)
2705 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2709 GGGG -- two-way fork */
2710 for (j
= 13; j
<= 15; j
+=2)
2711 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2714 /* ssss -- 10-way fork */
2715 /* System registers mach, macl, pr: */
2716 for (j
= 0; j
< 3; j
++)
2717 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2718 /* System registers fpul, fpscr/dsr, a0, x0, x1, y0, y1: */
2719 for (j
= 5; j
< 12; j
++)
2720 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2723 /* XX/XY -- 2/4 way fork. */
2724 for (j
= 0; j
< 4; j
+= (s
[1] == 'X' ? 2 : 1))
2725 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2728 /* aa/ax -- 2/4 way fork. */
2729 for (j
= 0; j
< 4; j
+= (s
[1] == 'a' ? 2 : 1))
2730 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2733 /* YY/YX -- 2/4 way fork. */
2734 for (j
= 0; j
< (s
[1] == 'Y' ? 2 : 4); j
+= 1)
2735 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2738 /* AA/AY: 2/4 way fork. */
2739 for (j
= 0; j
< (s
[1] == 'A' ? 2 : 4); j
+= 1)
2740 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2743 /* vv(VV) -- 4(16) way fork. */
2744 /* Vector register fv0/4/8/12. */
2747 /* 2 vector registers. */
2748 for (j
= 0; j
< 15; j
++)
2749 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2753 /* 1 vector register. */
2754 for (j
= 0; j
< 4; j
+= 1)
2755 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2762 /* Print the jump table used to index an opcode into a switch
2766 dumptable (name
, size
, start
)
2776 printf ("unsigned short %s[%d]={\n", name
, size
);
2777 while (i
< start
+ size
)
2781 printf ("/* 0x%x */\n", i
);
2788 printf ("%2d", table
[i
+ j
+ k
]);
2807 static int index
= 1;
2810 for (; p
->name
; p
++)
2813 expand_opcode (0, p
->index
, p
->code
);
2817 /* Table already contains all the switch case tags for 16-bit opcode double
2818 data transfer (ddt) insns, and the switch case tag for processing parallel
2819 processing insns (ppi) for code 0xf800 (ppi nopx nopy). Copy the
2820 latter tag to represent all combinations of ppi with ddt. */
2826 for (i
= 0xf000; i
< 0xf400; i
++)
2828 table
[i
+ 0x800] = table
[0xf800];
2835 for (; p
->name
; p
++)
2844 printf (" /* %s %s */\n", p
->name
, p
->code
);
2845 printf (" case %d: \n", p
->index
);
2853 fprintf (stderr
, "gencode/gensim_caselist: illegal char '%c'\n",
2858 /* Wildcard expansion, nothing to do here. */
2862 printf (" int v1 = ((iword >> 10) & 3) * 4;\n");
2866 printf (" int v2 = ((iword >> 8) & 3) * 4;\n");
2878 printf (" int n = (iword >> 8) & 0xf;\n");
2883 printf (" int n = (((iword >> 8) - 2) & 0x3) + 2;\n");
2887 if (s
[1] == 'y') /* xy */
2889 printf (" int n = (iword & 3) ? \n");
2890 printf (" ((iword >> 9) & 1) + 4 : \n");
2891 printf (" REG_xy ((iword >> 8) & 3);\n");
2894 printf (" int n = ((iword >> 9) & 1) + 4;\n");
2899 if (s
[1] == 'x') /* yx */
2901 printf (" int n = (iword & 0xc) ? \n");
2902 printf (" ((iword >> 8) & 1) + 6 : \n");
2903 printf (" REG_yx ((iword >> 8) & 3);\n");
2906 printf (" int n = ((iword >> 8) & 1) + 6;\n");
2915 printf (" int m = (iword >> 4) & 0xf;\n");
2919 if (s
[1] == 'Y') /* XY */
2921 printf (" int m = (iword & 3) ? \n");
2922 printf (" ((iword >> 7) & 1) + 8 : \n");
2923 printf (" DSP_xy ((iword >> 6) & 3);\n");
2926 printf (" int m = ((iword >> 7) & 1) + 8;\n");
2930 if (s
[1] == 'x') /* ax */
2932 printf (" int m = (iword & 3) ? \n");
2933 printf (" 7 - ((iword >> 6) & 2) : \n");
2934 printf (" DSP_ax ((iword >> 6) & 3);\n");
2937 printf (" int m = 7 - ((iword >> 6) & 2);\n");
2941 if (s
[1] == 'X') /* YX */
2943 printf (" int m = (iword & 0xc) ? \n");
2944 printf (" ((iword >> 6) & 1) + 10 : \n");
2945 printf (" DSP_yx ((iword >> 6) & 3);\n");
2948 printf (" int m = ((iword >> 6) & 1) + 10;\n");
2952 if (s
[1] == 'Y') /* AY */
2954 printf (" int m = (iword & 0xc) ? \n");
2955 printf (" 7 - ((iword >> 5) & 2) : \n");
2956 printf (" DSP_ay ((iword >> 6) & 3);\n");
2959 printf (" int m = 7 - ((iword >> 5) & 2);\n");
2964 printf (" int i = (iword & 0x");
2970 "gensim_caselist: Unknown char '%c' in %s\n",
2991 "gensim_caselist: Unknown char '%c' in %s\n",
2995 case '.': /* eg. "i12." */
3012 printf (" i = (i ^ (1 << %d)) - (1 << %d);\n",
3013 sextbit
- 1, sextbit
- 1);
3017 printf (" TB (m,n);\n");
3019 printf (" TL (m);\n");
3021 printf (" TL (n);\n");
3026 for (r
= p
->refs
; *r
; r
++)
3028 if (*r
== 'f') printf (" CREF (15);\n");
3032 printf (" int i = n;\n");
3034 printf (" CREF (i);\n");
3035 printf (" } while (i-- > 0);\n");
3041 printf (" int i = n;\n");
3043 printf (" CREF (i);\n");
3044 printf (" } while (i++ < 14);\n");
3047 if (*r
== '0') printf (" CREF (0);\n");
3048 if (*r
== '8') printf (" CREF (8);\n");
3049 if (*r
== '9') printf (" CREF (9);\n");
3050 if (*r
== 'n') printf (" CREF (n);\n");
3051 if (*r
== 'm') printf (" CREF (m);\n");
3056 for (j
= 0; j
< MAX_NR_STUFF
; j
++)
3060 printf (" %s\n", p
->stuff
[j
]);
3068 for (r
= p
->defs
; *r
; r
++)
3070 if (*r
== 'f') printf (" CDEF (15);\n");
3074 printf (" int i = n;\n");
3076 printf (" CDEF (i);\n");
3077 printf (" } while (i-- > 0);\n");
3083 printf (" int i = n;\n");
3085 printf (" CDEF (i);\n");
3086 printf (" } while (i++ < 14);\n");
3089 if (*r
== '0') printf (" CDEF (0);\n");
3090 if (*r
== 'n') printf (" CDEF (n);\n");
3091 if (*r
== 'm') printf (" CDEF (m);\n");
3095 printf (" break;\n");
3104 printf ("/* REG_xy = [r4, r5, r0, r1]. */\n");
3105 printf ("#define REG_xy(R) ((R)==0 ? 4 : (R)==2 ? 5 : (R)==1 ? 0 : 1)\n");
3106 printf ("/* REG_yx = [r6, r7, r2, r3]. */\n");
3107 printf ("#define REG_yx(R) ((R)==0 ? 6 : (R)==1 ? 7 : (R)==2 ? 2 : 3)\n");
3108 printf ("/* DSP_ax = [a0, a1, x0, x1]. */\n");
3109 printf ("#define DSP_ax(R) ((R)==0 ? 7 : (R)==2 ? 5 : (R)==1 ? 8 : 9)\n");
3110 printf ("/* DSP_ay = [a0, a1, y0, y1]. */\n");
3111 printf ("#define DSP_ay(R) ((R)==0 ? 7 : (R)==1 ? 5 : (R)==2 ? 10 : 11)\n");
3112 printf ("/* DSP_xy = [x0, x1, y0, y1]. */\n");
3113 printf ("#define DSP_xy(R) ((R)==0 ? 8 : (R)==2 ? 9 : (R)==1 ? 10 : 11)\n");
3114 printf ("/* DSP_yx = [y0, y1, x0, x1]. */\n");
3115 printf ("#define DSP_yx(R) ((R)==0 ? 10 : (R)==1 ? 11 : (R)==2 ? 8 : 9)\n");
3116 printf (" switch (jump_table[iword]) {\n");
3118 gensim_caselist (tab
);
3119 gensim_caselist (movsxy_tab
);
3121 printf (" default:\n");
3123 printf (" RAISE_EXCEPTION (SIGILL);\n");
3134 for (p
= tab
; p
->name
; p
++)
3137 printf ("#define OPC_");
3151 printf (" %d\n",p
->index
);
3155 static int ppi_index
;
3157 /* Take a ppi code, expand all varying fields in it and fill all the
3158 right entries in 'table' with the opcode index.
3159 NOTE: tail recursion optimization removed for simplicity. */
3162 expand_ppi_code (val
, i
, s
)
3172 fprintf (stderr
, "gencode/expand_ppi_code: Illegal char '%c'\n", s
[0]);
3177 if (warn_conflicts
&& table
[val
] != 0)
3178 conflict_warn (val
, i
);
3180 /* The last four bits are disregarded for the switch table. */
3184 /* Four-bit expansion. */
3185 for (j
= 0; j
< 16; j
++)
3186 expand_ppi_code ((val
<< 4) + j
, i
, s
+ 4);
3190 expand_ppi_code ((val
<< 1), i
, s
+ 1);
3193 expand_ppi_code ((val
<< 1) + 1, i
, s
+ 1);
3198 expand_ppi_code ((val
<< 1), i
, s
+ 1);
3199 expand_ppi_code ((val
<< 1) + 1, i
, s
+ 1);
3202 expand_ppi_code ((val
<< 2) + 1, ppi_index
++, s
+ 2);
3203 expand_ppi_code ((val
<< 2) + 2, i
, s
+ 2);
3204 expand_ppi_code ((val
<< 2) + 3, i
, s
+ 2);
3215 for (p
= ppi_tab
; p
->name
; p
++)
3217 p
->index
= ppi_index
++;
3218 expand_ppi_code (0, p
->index
, p
->code
);
3227 printf ("#define DSR_MASK_G 0x80\n");
3228 printf ("#define DSR_MASK_Z 0x40\n");
3229 printf ("#define DSR_MASK_N 0x20\n");
3230 printf ("#define DSR_MASK_V 0x10\n");
3232 printf ("#define COMPUTE_OVERFLOW do {\\\n");
3233 printf (" overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0; \\\n");
3234 printf (" if (overflow && S) \\\n");
3236 printf (" if (res_grd & 0x80) \\\n");
3238 printf (" res = 0x80000000; \\\n");
3239 printf (" res_grd |= 0xff; \\\n");
3241 printf (" else \\\n");
3243 printf (" res = 0x7fffffff; \\\n");
3244 printf (" res_grd &= ~0xff; \\\n");
3246 printf (" overflow = 0; \\\n");
3248 printf ("} while (0)\n");
3250 printf ("#define ADD_SUB_GE \\\n");
3251 printf (" (greater_equal = ~(overflow << 3 & res_grd) & DSR_MASK_G)\n");
3253 printf ("static void\n");
3254 printf ("ppi_insn (iword)\n");
3255 printf (" int iword;\n");
3257 printf (" /* 'ee' = [x0, x1, y0, a1] */\n");
3258 printf (" static char e_tab[] = { 8, 9, 10, 5};\n");
3259 printf (" /* 'ff' = [y0, y1, x0, a1] */\n");
3260 printf (" static char f_tab[] = {10, 11, 8, 5};\n");
3261 printf (" /* 'xx' = [x0, x1, a0, a1] */\n");
3262 printf (" static char x_tab[] = { 8, 9, 7, 5};\n");
3263 printf (" /* 'yy' = [y0, y1, m0, m1] */\n");
3264 printf (" static char y_tab[] = {10, 11, 12, 14};\n");
3265 printf (" /* 'gg' = [m0, m1, a0, a1] */\n");
3266 printf (" static char g_tab[] = {12, 14, 7, 5};\n");
3267 printf (" /* 'uu' = [x0, y0, a0, a1] */\n");
3268 printf (" static char u_tab[] = { 8, 10, 7, 5};\n");
3270 printf (" int z;\n");
3271 printf (" int res, res_grd;\n");
3272 printf (" int carry, overflow, greater_equal;\n");
3274 printf (" switch (ppi_table[iword >> 4]) {\n");
3276 for (; p
->name
; p
++)
3284 printf (" /* %s %s */\n", p
->name
, p
->code
);
3285 printf (" case %d: \n", p
->index
);
3288 for (shift
= 16; *s
; )
3293 printf (" int i = (iword >> 4) & 0x7f;\n");
3303 printf (" int %c = %c_tab[(iword >> %d) & 3];\n",
3309 printf (" if ((((iword >> 8) ^ DSR) & 1) == 0)\n");
3310 printf ("\treturn;\n");
3312 printf (" case %d: \n", p
->index
+ 1);
3324 printf (" z = iword & 0xf;\n");
3332 else if (havedecl
== 2)
3334 for (j
= 0; j
< MAX_NR_STUFF
; j
++)
3339 (havedecl
== 2 ? " " : ""),
3347 printf (" if (iword & 0x200)\n");
3348 printf (" goto assign_z;\n");
3350 printf (" break;\n");
3354 printf (" default:\n");
3356 printf (" RAISE_EXCEPTION (SIGILL);\n");
3357 printf (" return;\n");
3360 printf (" DSR &= ~0xf1;\n");
3361 printf (" if (res || res_grd)\n");
3362 printf (" DSR |= greater_equal | res_grd >> 2 & DSR_MASK_N | overflow;\n");
3364 printf (" DSR |= DSR_MASK_Z | overflow;\n");
3365 printf (" assign_dc:\n");
3366 printf (" switch (DSR >> 1 & 7)\n");
3368 printf (" case 0: /* Carry Mode */\n");
3369 printf (" DSR |= carry;\n");
3370 printf (" case 1: /* Negative Value Mode */\n");
3371 printf (" DSR |= res_grd >> 7 & 1;\n");
3372 printf (" case 2: /* Zero Value Mode */\n");
3373 printf (" DSR |= DSR >> 6 & 1;\n");
3374 printf (" case 3: /* Overflow mode\n");
3375 printf (" DSR |= overflow >> 4;\n");
3376 printf (" case 4: /* Signed Greater Than Mode */\n");
3377 printf (" DSR |= DSR >> 7 & 1;\n");
3378 printf (" case 4: /* Signed Greater Than Or Equal Mode */\n");
3379 printf (" DSR |= greater_equal >> 7;\n");
3381 printf (" assign_z:\n");
3382 printf (" if (0xa05f >> z & 1)\n");
3384 printf (" RAISE_EXCEPTION (SIGILL);\n");
3385 printf (" return;\n");
3387 printf (" DSP_R (z) = res;\n");
3388 printf (" DSP_GRD (z) = res_grd;\n");
3397 /* Verify the table before anything else. */
3400 for (p
= tab
; p
->name
; p
++)
3402 /* Check that the code field contains 16 bits. */
3403 if (strlen (p
->code
) != 16)
3405 fprintf (stderr
, "Code `%s' length wrong (%d) for `%s'\n",
3406 p
->code
, strlen (p
->code
), p
->name
);
3412 /* Now generate the requested data. */
3415 if (ac
> 2 && strcmp (av
[2], "-w") == 0)
3419 if (strcmp (av
[1], "-t") == 0)
3423 else if (strcmp (av
[1], "-d") == 0)
3427 else if (strcmp (av
[1], "-s") == 0)
3430 dumptable ("sh_jump_table", 1 << 16, 0);
3432 memset (table
, 0, sizeof table
);
3433 filltable (movsxy_tab
);
3434 expand_ppi_movxy ();
3435 dumptable ("sh_dsp_table", 1 << 12, 0xf000);
3437 memset (table
, 0, sizeof table
);
3439 dumptable ("ppi_table", 1 << 12, 0);
3441 else if (strcmp (av
[1], "-x") == 0)
3444 filltable (movsxy_tab
);
3447 else if (strcmp (av
[1], "-p") == 0)
3454 fprintf (stderr
, "Opcode table generation no longer supported.\n");
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