sim/sh/interp.c

   1 /* Simulator for the Hitachi SH architecture.
   2
   3    Written by Steve Chamberlain of Cygnus Support.
   4    sac@cygnus.com
   5
   6    This file is part of SH sim
   7
   8
   9                 THIS SOFTWARE IS NOT COPYRIGHTED
  10
  11    Cygnus offers the following for use in the public domain.  Cygnus
  12    makes no warranty with regard to the software or it's performance
  13    and the user accepts the software "AS IS" with all faults.
  14
  15    CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
  16    THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17    MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  18
  19 */
  20
  21 #include "config.h"
  22
  23 #include <signal.h>
  24 #ifdef HAVE_UNISTD_H
  25 #include <unistd.h>
  26 #endif
  27
  28 #include "sysdep.h"
  29 #include "bfd.h"
  30 #include "callback.h"
  31 #include "remote-sim.h"
  32
  33 /* This file is local - if newlib changes, then so should this.  */
  34 #include "syscall.h"
  35
  36 #include <math.h>
  37
  38 #ifdef _WIN32
  39 #include <float.h>              /* Needed for _isnan() */
  40 #define isnan _isnan
  41 #endif
  42
  43 #ifndef SIGBUS
  44 #define SIGBUS SIGSEGV
  45 #endif
  46
  47 #ifndef SIGQUIT
  48 #define SIGQUIT SIGTERM
  49 #endif
  50
  51 #ifndef SIGTRAP
  52 #define SIGTRAP 5
  53 #endif
  54
  55 #define O_RECOMPILE 85
  56 #define DEFINE_TABLE
  57 #define DISASSEMBLER_TABLE
  58
  59 #define SBIT(x) ((x)&sbit)
  60 #define R0      saved_state.asregs.regs[0]
  61 #define Rn      saved_state.asregs.regs[n]
  62 #define Rm      saved_state.asregs.regs[m]
  63 #define UR0     (unsigned int)(saved_state.asregs.regs[0])
  64 #define UR      (unsigned int)R
  65 #define UR      (unsigned int)R
  66 #define SR0     saved_state.asregs.regs[0]
  67 #define GBR     saved_state.asregs.gbr
  68 #define VBR     saved_state.asregs.vbr
  69 #define SSR     saved_state.asregs.ssr
  70 #define SPC     saved_state.asregs.spc
  71 #define MACH    saved_state.asregs.mach
  72 #define MACL    saved_state.asregs.macl
  73 #define M       saved_state.asregs.sr.bits.m
  74 #define Q       saved_state.asregs.sr.bits.q
  75 #define S       saved_state.asregs.sr.bits.s
  76 #define FPSCR   saved_state.asregs.fpscr
  77 #define FPUL    saved_state.asregs.fpul
  78
  79 #define GET_SR() (saved_state.asregs.sr.bits.t = T, saved_state.asregs.sr.word)
  80 #define SET_SR(x) {saved_state.asregs.sr.word = (x); T =saved_state.asregs.sr.bits.t;}
  81
  82 #define PC pc
  83 #define C cycles
  84
  85 static SIM_OPEN_KIND sim_kind;
  86 static char *myname;
  87 static int little_endian_p;
  88
  89 int
  90 fail ()
  91 {
  92   abort ();
  93 }
  94
  95 /* This function exists solely for the purpose of setting a breakpoint to
  96    catch simulated bus errors when running the simulator under GDB.  */
  97
  98 void
  99 bp_holder ()
 100 {
 101 }
 102
 103 #define BUSERROR(addr, mask) \
 104   if (addr & ~mask) { saved_state.asregs.exception = SIGBUS;  bp_holder (); }
 105
 106 /* Define this to enable register lifetime checking.
 107    The compiler generates "add #0,rn" insns to mark registers as invalid,
 108    the simulator uses this info to call fail if it finds a ref to an invalid
 109    register before a def
 110
 111    #define PARANOID
 112 */
 113
 114 #ifdef PARANOID
 115 int valid[16];
 116 #define CREF(x)  if(!valid[x]) fail();
 117 #define CDEF(x)  valid[x] = 1;
 118 #define UNDEF(x) valid[x] = 0;
 119 #else
 120 #define CREF(x)
 121 #define CDEF(x)
 122 #define UNDEF(x)
 123 #endif
 124
 125 static void parse_and_set_memory_size PARAMS ((char *str));
 126
 127 static int IOMEM PARAMS ((int addr, int write, int value));
 128
 129 static host_callback *callback;
 130
 131 /* These variables are at file scope so that functions other than
 132    sim_resume can use the fetch/store macros */
 133
 134 static int  little_endian;
 135
 136 #if 1
 137 static int maskl = ~0;
 138 static int maskw = ~0;
 139 #endif
 140 typedef union
 141 {
 142
 143   struct
 144   {
 145
 146     int regs[16];
 147     int pc;
 148     int pr;
 149
 150     int gbr;
 151     int vbr;
 152     int mach;
 153     int macl;
 154
 155     union
 156       {
 157         struct
 158           {
 159             unsigned int d0:22;
 160             unsigned int m:1;
 161             unsigned int q:1;
 162             unsigned int i:4;
 163             unsigned int d1:2;
 164             unsigned int s:1;
 165             unsigned int t:1;
 166           }
 167         bits;
 168         int word;
 169       }
 170     sr;
 171
 172     int fpul;
 173     float fpscr;
 174     float fregs[16];
 175
 176     int ssr;
 177     int spc;
 178     int bregs[16];
 179
 180     int ticks;
 181     int stalls;
 182     int memstalls;
 183     int cycles;
 184     int insts;
 185
 186     int prevlock;
 187     int thislock;
 188     int exception;
 189     int msize;
 190 #define PROFILE_FREQ 1
 191 #define PROFILE_SHIFT 2
 192     int profile;
 193     unsigned short *profile_hist;
 194     unsigned char *memory;
 195   }
 196   asregs;
 197   int asints[28];
 198 } saved_state_type;
 199
 200 saved_state_type saved_state;
 201
 202 static void INLINE
 203 wlat_little (memory, x, value, maskl)
 204      unsigned char *memory;
 205 {
 206   int v = value;
 207   unsigned char *p = memory + ((x) & maskl);
 208   BUSERROR(x, maskl);
 209   p[3] = v >> 24;
 210   p[2] = v >> 16;
 211   p[1] = v >> 8;
 212   p[0] = v;
 213 }
 214
 215 static void INLINE
 216 wwat_little (memory, x, value, maskw)
 217      unsigned char *memory;
 218 {
 219   int v = value;
 220   unsigned char *p = memory + ((x) & maskw);
 221   BUSERROR(x, maskw);
 222
 223   p[1] = v >> 8;
 224   p[0] = v;
 225 }
 226
 227 static void INLINE
 228 wbat_any (memory, x, value, maskb)
 229      unsigned char *memory;
 230 {
 231   unsigned char *p = memory + (x & maskb);
 232   if (x > 0x5000000)
 233     IOMEM (x, 1, value);
 234   BUSERROR(x, maskb);
 235
 236   p[0] = value;
 237 }
 238
 239 static void INLINE
 240 wlat_big (memory, x, value, maskl)
 241      unsigned char *memory;
 242 {
 243   int v = value;
 244   unsigned char *p = memory + ((x) & maskl);
 245   BUSERROR(x, maskl);
 246
 247   p[0] = v >> 24;
 248   p[1] = v >> 16;
 249   p[2] = v >> 8;
 250   p[3] = v;
 251 }
 252
 253 static void INLINE
 254 wwat_big (memory, x, value, maskw)
 255      unsigned char *memory;
 256 {
 257   int v = value;
 258   unsigned char *p = memory + ((x) & maskw);
 259   BUSERROR(x, maskw);
 260
 261   p[0] = v >> 8;
 262   p[1] = v;
 263 }
 264
 265 static void INLINE
 266 wbat_big (memory, x, value, maskb)
 267      unsigned char *memory;
 268 {
 269   unsigned char *p = memory + (x & maskb);
 270   BUSERROR(x, maskb);
 271
 272   if (x > 0x5000000)
 273     IOMEM (x, 1, value);
 274   p[0] = value;
 275 }
 276
 277 /* Read functions */
 278
 279 static int INLINE
 280 rlat_little (memory, x, maskl)
 281      unsigned char *memory;
 282 {
 283   unsigned char *p = memory + ((x) & maskl);
 284   BUSERROR(x, maskl);
 285
 286   return (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0];
 287 }
 288
 289 static int INLINE
 290 rwat_little (memory, x, maskw)
 291      unsigned char *memory;
 292 {
 293   unsigned char *p = memory + ((x) & maskw);
 294   BUSERROR(x, maskw);
 295
 296   return (p[1] << 8) | p[0];
 297 }
 298
 299 static int INLINE
 300 rbat_any (memory, x, maskb)
 301      unsigned char *memory;
 302 {
 303   unsigned char *p = memory + ((x) & maskb);
 304   BUSERROR(x, maskb);
 305
 306   return p[0];
 307 }
 308
 309 static int INLINE
 310 rlat_big (memory, x, maskl)
 311      unsigned char *memory;
 312 {
 313   unsigned char *p = memory + ((x) & maskl);
 314   BUSERROR(x, maskl);
 315
 316   return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3];
 317 }
 318
 319 static int INLINE
 320 rwat_big (memory, x, maskw)
 321      unsigned char *memory;
 322 {
 323   unsigned char *p = memory + ((x) & maskw);
 324   BUSERROR(x, maskw);
 325
 326   return (p[0] << 8) | p[1];
 327 }
 328
 329 #define RWAT(x)         (little_endian ? rwat_little(memory, x, maskw): rwat_big(memory, x, maskw))
 330 #define RLAT(x)         (little_endian ? rlat_little(memory, x, maskl): rlat_big(memory, x, maskl))
 331 #define RBAT(x)         (rbat_any (memory, x, maskb))
 332 #define WWAT(x,v)       (little_endian ? wwat_little(memory, x, v, maskw): wwat_big(memory, x, v, maskw))
 333 #define WLAT(x,v)       (little_endian ? wlat_little(memory, x, v, maskl): wlat_big(memory, x, v, maskl))
 334 #define WBAT(x,v)       (wbat_any (memory, x, v, maskb))
 335
 336 #define RUWAT(x)  (RWAT(x) & 0xffff)
 337 #define RSWAT(x)  ((short)(RWAT(x)))
 338 #define RSBAT(x)  (SEXT(RBAT(x)))
 339
 340 #define MA() ((pc & 3) != 0 ? ++memstalls : 0)
 341
 342 #define SEXT(x)         (((x&0xff) ^ (~0x7f))+0x80)
 343 #define SEXTW(y)        ((int)((short)y))
 344
 345 #define SL(TEMPPC)      iword= RUWAT(TEMPPC); goto top;
 346
 347 int empty[16];
 348
 349 #define L(x)   thislock = x;
 350 #define TL(x)  if ((x) == prevlock) stalls++;
 351 #define TB(x,y)  if ((x) == prevlock || (y)==prevlock) stalls++;
 352
 353 #if defined(__GO32__) || defined(_WIN32)
 354 int sim_memory_size = 19;
 355 #else
 356 int sim_memory_size = 24;
 357 #endif
 358
 359 static int sim_profile_size = 17;
 360 static int nsamples;
 361
 362 #undef TB
 363 #define TB(x,y)
 364
 365 #define SMR1 (0x05FFFEC8)       /* Channel 1  serial mode register */
 366 #define BRR1 (0x05FFFEC9)       /* Channel 1  bit rate register */
 367 #define SCR1 (0x05FFFECA)       /* Channel 1  serial control register */
 368 #define TDR1 (0x05FFFECB)       /* Channel 1  transmit data register */
 369 #define SSR1 (0x05FFFECC)       /* Channel 1  serial status register */
 370 #define RDR1 (0x05FFFECD)       /* Channel 1  receive data register */
 371
 372 #define SCI_RDRF         0x40   /* Recieve data register full */
 373 #define SCI_TDRE        0x80    /* Transmit data register empty */
 374
 375 static int
 376 IOMEM (addr, write, value)
 377      int addr;
 378      int write;
 379      int value;
 380 {
 381   if (write)
 382     {
 383       switch (addr)
 384         {
 385         case TDR1:
 386           if (value != '\r')
 387             {
 388               putchar (value);
 389               fflush (stdout);
 390             }
 391           break;
 392         }
 393     }
 394   else
 395     {
 396       switch (addr)
 397         {
 398         case RDR1:
 399           return getchar ();
 400         }
 401     }
 402   return 0;
 403 }
 404
 405 static int
 406 get_now ()
 407 {
 408   return time ((long *) 0);
 409 }
 410
 411 static int
 412 now_persec ()
 413 {
 414   return 1;
 415 }
 416
 417 static FILE *profile_file;
 418
 419 static void
 420 swap (memory, n)
 421      unsigned char *memory;
 422      int n;
 423 {
 424   WLAT (0, n);
 425 }
 426
 427 static void
 428 swap16 (memory, n)
 429      unsigned char *memory;
 430      int n;
 431 {
 432   WWAT (0, n);
 433 }
 434
 435 static void
 436 swapout (n)
 437      int n;
 438 {
 439   if (profile_file)
 440     {
 441       char b[4];
 442       swap (b, n);
 443       fwrite (b, 4, 1, profile_file);
 444     }
 445 }
 446
 447 static void
 448 swapout16 (n)
 449      int n;
 450 {
 451   char b[4];
 452   swap16 (b, n);
 453   fwrite (b, 2, 1, profile_file);
 454 }
 455
 456 /* Turn a pointer in a register into a pointer into real memory. */
 457
 458 static char *
 459 ptr (x)
 460      int x;
 461 {
 462   return (char *) (x + saved_state.asregs.memory);
 463 }
 464
 465 /* Simulate a monitor trap, put the result into r0 and errno into r1 */
 466
 467 static void
 468 trap (i, regs, memory, maskl, maskw, little_endian)
 469      int i;
 470      int *regs;
 471      unsigned char *memory;
 472 {
 473   switch (i)
 474     {
 475     case 1:
 476       printf ("%c", regs[0]);
 477       break;
 478     case 2:
 479       saved_state.asregs.exception = SIGQUIT;
 480       break;
 481     case 3:                     /* FIXME: for backwards compat, should be removed */
 482     case 34:
 483       {
 484         extern int errno;
 485         int perrno = errno;
 486         errno = 0;
 487
 488         switch (regs[4])
 489           {
 490
 491 #if !defined(__GO32__) && !defined(_WIN32)
 492           case SYS_fork:
 493             regs[0] = fork ();
 494             break;
 495           case SYS_execve:
 496             regs[0] = execve (ptr (regs[5]), (char **)ptr (regs[6]), (char **)ptr (regs[7]));
 497             break;
 498           case SYS_execv:
 499             regs[0] = execve (ptr (regs[5]),(char **) ptr (regs[6]), 0);
 500             break;
 501           case SYS_pipe:
 502             {
 503               char *buf;
 504               int host_fd[2];
 505
 506               buf = ptr (regs[5]);
 507
 508               regs[0] = pipe (host_fd);
 509
 510               WLAT (buf, host_fd[0]);
 511               buf += 4;
 512               WLAT (buf, host_fd[1]);
 513             }
 514             break;
 515
 516           case SYS_wait:
 517             regs[0] = wait (ptr (regs[5]));
 518             break;
 519 #endif
 520
 521           case SYS_read:
 522             regs[0] = callback->read (callback, regs[5], ptr (regs[6]), regs[7]);
 523             break;
 524           case SYS_write:
 525             if (regs[5] == 1)
 526               regs[0] = (int)callback->write_stdout (callback, ptr(regs[6]), regs[7]);
 527             else
 528               regs[0] = (int)callback->write (callback, regs[5], ptr (regs[6]), regs[7]);
 529             break;
 530           case SYS_lseek:
 531             regs[0] = callback->lseek (callback,regs[5], regs[6], regs[7]);
 532             break;
 533           case SYS_close:
 534             regs[0] = callback->close (callback,regs[5]);
 535             break;
 536           case SYS_open:
 537             regs[0] = callback->open (callback,ptr (regs[5]), regs[6]);
 538             break;
 539           case SYS_exit:
 540             /* EXIT - caller can look in r5 to work out the reason */
 541             saved_state.asregs.exception = SIGQUIT;
 542             regs[0] = regs[5];
 543             break;
 544
 545           case SYS_stat:        /* added at hmsi */
 546             /* stat system call */
 547             {
 548               struct stat host_stat;
 549               char *buf;
 550
 551               regs[0] = stat (ptr (regs[5]), &host_stat);
 552
 553               buf = ptr (regs[6]);
 554
 555               WWAT (buf, host_stat.st_dev);
 556               buf += 2;
 557               WWAT (buf, host_stat.st_ino);
 558               buf += 2;
 559               WLAT (buf, host_stat.st_mode);
 560               buf += 4;
 561               WWAT (buf, host_stat.st_nlink);
 562               buf += 2;
 563               WWAT (buf, host_stat.st_uid);
 564               buf += 2;
 565               WWAT (buf, host_stat.st_gid);
 566               buf += 2;
 567               WWAT (buf, host_stat.st_rdev);
 568               buf += 2;
 569               WLAT (buf, host_stat.st_size);
 570               buf += 4;
 571               WLAT (buf, host_stat.st_atime);
 572               buf += 4;
 573               WLAT (buf, 0);
 574               buf += 4;
 575               WLAT (buf, host_stat.st_mtime);
 576               buf += 4;
 577               WLAT (buf, 0);
 578               buf += 4;
 579               WLAT (buf, host_stat.st_ctime);
 580               buf += 4;
 581               WLAT (buf, 0);
 582               buf += 4;
 583               WLAT (buf, 0);
 584               buf += 4;
 585               WLAT (buf, 0);
 586               buf += 4;
 587             }
 588             break;
 589
 590 #ifndef _WIN32
 591           case SYS_chown:
 592             regs[0] = chown (ptr (regs[5]), regs[6], regs[7]);
 593             break;
 594 #endif /* _WIN32 */
 595           case SYS_chmod:
 596             regs[0] = chmod (ptr (regs[5]), regs[6]);
 597             break;
 598           case SYS_utime:
 599             /* Cast the second argument to void *, to avoid type mismatch
 600                if a prototype is present.  */
 601             regs[0] = utime (ptr (regs[5]), (void *) ptr (regs[6]));
 602             break;
 603           default:
 604             abort ();
 605           }
 606         regs[1] = callback->get_errno (callback);
 607         errno = perrno;
 608       }
 609       break;
 610
 611     case 0xc3:
 612     case 255:
 613       saved_state.asregs.exception = SIGTRAP;
 614       break;
 615     }
 616
 617 }
 618
 619 void
 620 control_c (sig, code, scp, addr)
 621      int sig;
 622      int code;
 623      char *scp;
 624      char *addr;
 625 {
 626   saved_state.asregs.exception = SIGINT;
 627 }
 628
 629 static int
 630 div1 (R, iRn2, iRn1, T)
 631      int *R;
 632      int iRn1;
 633      int iRn2;
 634      int T;
 635 {
 636   unsigned long tmp0;
 637   unsigned char old_q, tmp1;
 638
 639   old_q = Q;
 640   Q = (unsigned char) ((0x80000000 & R[iRn1]) != 0);
 641   R[iRn1] <<= 1;
 642   R[iRn1] |= (unsigned long) T;
 643
 644   switch (old_q)
 645     {
 646     case 0:
 647       switch (M)
 648         {
 649         case 0:
 650           tmp0 = R[iRn1];
 651           R[iRn1] -= R[iRn2];
 652           tmp1 = (R[iRn1] > tmp0);
 653           switch (Q)
 654             {
 655             case 0:
 656               Q = tmp1;
 657               break;
 658             case 1:
 659               Q = (unsigned char) (tmp1 == 0);
 660               break;
 661             }
 662           break;
 663         case 1:
 664           tmp0 = R[iRn1];
 665           R[iRn1] += R[iRn2];
 666           tmp1 = (R[iRn1] < tmp0);
 667           switch (Q)
 668             {
 669             case 0:
 670               Q = (unsigned char) (tmp1 == 0);
 671               break;
 672             case 1:
 673               Q = tmp1;
 674               break;
 675             }
 676           break;
 677         }
 678       break;
 679     case 1:
 680       switch (M)
 681         {
 682         case 0:
 683           tmp0 = R[iRn1];
 684           R[iRn1] += R[iRn2];
 685           tmp1 = (R[iRn1] < tmp0);
 686           switch (Q)
 687             {
 688             case 0:
 689               Q = tmp1;
 690               break;
 691             case 1:
 692               Q = (unsigned char) (tmp1 == 0);
 693               break;
 694             }
 695           break;
 696         case 1:
 697           tmp0 = R[iRn1];
 698           R[iRn1] -= R[iRn2];
 699           tmp1 = (R[iRn1] > tmp0);
 700           switch (Q)
 701             {
 702             case 0:
 703               Q = (unsigned char) (tmp1 == 0);
 704               break;
 705             case 1:
 706               Q = tmp1;
 707               break;
 708             }
 709           break;
 710         }
 711       break;
 712     }
 713   T = (Q == M);
 714   return T;
 715 }
 716
 717 static void
 718 dmul (sign, rm, rn)
 719      int sign;
 720      unsigned int rm;
 721      unsigned int rn;
 722 {
 723   unsigned long RnL, RnH;
 724   unsigned long RmL, RmH;
 725   unsigned long temp0, temp1, temp2, temp3;
 726   unsigned long Res2, Res1, Res0;
 727
 728   RnL = rn & 0xffff;
 729   RnH = (rn >> 16) & 0xffff;
 730   RmL = rm & 0xffff;
 731   RmH = (rm >> 16) & 0xffff;
 732   temp0 = RmL * RnL;
 733   temp1 = RmH * RnL;
 734   temp2 = RmL * RnH;
 735   temp3 = RmH * RnH;
 736   Res2 = 0;
 737   Res1 = temp1 + temp2;
 738   if (Res1 < temp1)
 739     Res2 += 0x00010000;
 740   temp1 = (Res1 << 16) & 0xffff0000;
 741   Res0 = temp0 + temp1;
 742   if (Res0 < temp0)
 743     Res2 += 1;
 744   Res2 += ((Res1 >> 16) & 0xffff) + temp3;
 745
 746   if (sign)
 747     {
 748       if (rn & 0x80000000)
 749         Res2 -= rm;
 750       if (rm & 0x80000000)
 751         Res2 -= rn;
 752     }
 753
 754   MACH = Res2;
 755   MACL = Res0;
 756 }
 757
 758 static void
 759 macw (regs, memory, n, m)
 760      int *regs;
 761      unsigned char *memory;
 762      int m, n;
 763 {
 764   long tempm, tempn;
 765   long prod, macl, sum;
 766
 767   tempm=RSWAT(regs[m]); regs[m]+=2;
 768   tempn=RSWAT(regs[n]); regs[n]+=2;
 769
 770   macl = MACL;
 771   prod = (long)(short) tempm * (long)(short) tempn;
 772   sum = prod + macl;
 773   if (S)
 774     {
 775       if ((~(prod ^ macl) & (sum ^ prod)) < 0)
 776         {
 777           /* MACH's lsb is a sticky overflow bit.  */
 778           MACH |= 1;
 779           /* Store the smallest negative number in MACL if prod is
 780              negative, and the largest positive number otherwise.  */
 781           sum = 0x7fffffff + (prod < 0);
 782         }
 783     }
 784   else
 785     {
 786       long mach;
 787       /* Add to MACH the sign extended product, and carry from low sum.  */
 788       mach = MACH + (-(prod < 0)) + ((unsigned long) sum < prod);
 789       /* Sign extend at 10:th bit in MACH.  */
 790       MACH = (mach & 0x1ff) | -(mach & 0x200);
 791     }
 792   MACL = sum;
 793 }
 794
 795 /* Set the memory size to the power of two provided. */
 796
 797 void
 798 sim_size (power)
 799      int power;
 800
 801 {
 802   saved_state.asregs.msize = 1 << power;
 803
 804   sim_memory_size = power;
 805
 806   if (saved_state.asregs.memory)
 807     {
 808       free (saved_state.asregs.memory);
 809     }
 810
 811   saved_state.asregs.memory =
 812     (unsigned char *) calloc (64, saved_state.asregs.msize / 64);
 813
 814   if (!saved_state.asregs.memory)
 815     {
 816       fprintf (stderr,
 817                "Not enough VM for simulation of %d bytes of RAM\n",
 818                saved_state.asregs.msize);
 819
 820       saved_state.asregs.msize = 1;
 821       saved_state.asregs.memory = (unsigned char *) calloc (1, 1);
 822     }
 823 }
 824
 825 static void
 826 set_static_little_endian (x)
 827      int x;
 828 {
 829   little_endian = x;
 830 }
 831
 832 static void
 833 init_pointers ()
 834 {
 835   int little_endian = little_endian_p;
 836
 837   set_static_little_endian (little_endian);
 838
 839   if (saved_state.asregs.msize != 1 << sim_memory_size)
 840     {
 841       sim_size (sim_memory_size);
 842     }
 843
 844   if (saved_state.asregs.profile && !profile_file)
 845     {
 846       profile_file = fopen ("gmon.out", "wb");
 847       /* Seek to where to put the call arc data */
 848       nsamples = (1 << sim_profile_size);
 849
 850       fseek (profile_file, nsamples * 2 + 12, 0);
 851
 852       if (!profile_file)
 853         {
 854           fprintf (stderr, "Can't open gmon.out\n");
 855         }
 856       else
 857         {
 858           saved_state.asregs.profile_hist =
 859             (unsigned short *) calloc (64, (nsamples * sizeof (short) / 64));
 860         }
 861     }
 862 }
 863
 864 static void
 865 dump_profile ()
 866 {
 867   unsigned int minpc;
 868   unsigned int maxpc;
 869   unsigned short *p;
 870   int i;
 871
 872   p = saved_state.asregs.profile_hist;
 873   minpc = 0;
 874   maxpc = (1 << sim_profile_size);
 875
 876   fseek (profile_file, 0L, 0);
 877   swapout (minpc << PROFILE_SHIFT);
 878   swapout (maxpc << PROFILE_SHIFT);
 879   swapout (nsamples * 2 + 12);
 880   for (i = 0; i < nsamples; i++)
 881     swapout16 (saved_state.asregs.profile_hist[i]);
 882
 883 }
 884
 885 static void
 886 gotcall (from, to)
 887      int from;
 888      int to;
 889 {
 890   swapout (from);
 891   swapout (to);
 892   swapout (1);
 893 }
 894
 895 #define MMASKB ((saved_state.asregs.msize -1) & ~0)
 896
 897 int
 898 sim_stop (sd)
 899      SIM_DESC sd;
 900 {
 901   saved_state.asregs.exception = SIGINT;
 902   return 1;
 903 }
 904
 905 void
 906 sim_resume (sd, step, siggnal)
 907      SIM_DESC sd;
 908      int step, siggnal;
 909 {
 910   register unsigned int pc;
 911   register int cycles = 0;
 912   register int stalls = 0;
 913   register int memstalls = 0;
 914   register int insts = 0;
 915   register int prevlock;
 916   register int thislock;
 917   register unsigned int doprofile;
 918   register int pollcount = 0;
 919   register int little_endian = little_endian_p;
 920
 921   int tick_start = get_now ();
 922   void (*prev) ();
 923   extern unsigned char sh_jump_table0[];
 924
 925   register unsigned char *jump_table = sh_jump_table0;
 926
 927   register int *R = &(saved_state.asregs.regs[0]);
 928   register float *F = &(saved_state.asregs.fregs[0]);
 929   register int T;
 930   register int PR;
 931
 932   register int maskb = ((saved_state.asregs.msize - 1) & ~0);
 933   register int maskw = ((saved_state.asregs.msize - 1) & ~1);
 934   register int maskl = ((saved_state.asregs.msize - 1) & ~3);
 935   register unsigned char *memory;
 936   register unsigned int sbit = ((unsigned int) 1 << 31);
 937
 938   prev = signal (SIGINT, control_c);
 939
 940   init_pointers ();
 941
 942   memory = saved_state.asregs.memory;
 943
 944   if (step)
 945     {
 946       saved_state.asregs.exception = SIGTRAP;
 947     }
 948   else
 949     {
 950       saved_state.asregs.exception = 0;
 951     }
 952
 953   pc = saved_state.asregs.pc;
 954   PR = saved_state.asregs.pr;
 955   T = saved_state.asregs.sr.bits.t;
 956   prevlock = saved_state.asregs.prevlock;
 957   thislock = saved_state.asregs.thislock;
 958   doprofile = saved_state.asregs.profile;
 959
 960   /* If profiling not enabled, disable it by asking for
 961      profiles infrequently. */
 962   if (doprofile == 0)
 963     doprofile = ~0;
 964
 965   do
 966     {
 967       register unsigned int iword = RUWAT (pc);
 968       register unsigned int ult;
 969 #ifndef ACE_FAST
 970       insts++;
 971 #endif
 972     top:
 973
 974 #include "code.c"
 975
 976
 977       pc += 2;
 978
 979       pollcount++;
 980       if (pollcount > 1000)
 981         {
 982           pollcount = 0;
 983           if ((*callback->poll_quit) != NULL
 984               && (*callback->poll_quit) (callback))
 985             {
 986               sim_stop (sd);
 987             }
 988         }
 989
 990 #ifndef ACE_FAST
 991       prevlock = thislock;
 992       thislock = 30;
 993       cycles++;
 994
 995       if (cycles >= doprofile)
 996         {
 997
 998           saved_state.asregs.cycles += doprofile;
 999           cycles -= doprofile;
1000           if (saved_state.asregs.profile_hist)
1001             {
1002               int n = pc >> PROFILE_SHIFT;
1003               if (n < nsamples)
1004                 {
1005                   int i = saved_state.asregs.profile_hist[n];
1006                   if (i < 65000)
1007                     saved_state.asregs.profile_hist[n] = i + 1;
1008                 }
1009
1010             }
1011         }
1012 #endif
1013     }
1014   while (!saved_state.asregs.exception);
1015
1016   if (saved_state.asregs.exception == SIGILL
1017       || saved_state.asregs.exception == SIGBUS)
1018     {
1019       pc -= 2;
1020     }
1021
1022   saved_state.asregs.ticks += get_now () - tick_start;
1023   saved_state.asregs.cycles += cycles;
1024   saved_state.asregs.stalls += stalls;
1025   saved_state.asregs.memstalls += memstalls;
1026   saved_state.asregs.insts += insts;
1027   saved_state.asregs.pc = pc;
1028   saved_state.asregs.sr.bits.t = T;
1029   saved_state.asregs.pr = PR;
1030
1031   saved_state.asregs.prevlock = prevlock;
1032   saved_state.asregs.thislock = thislock;
1033
1034   if (profile_file)
1035     {
1036       dump_profile ();
1037     }
1038
1039   signal (SIGINT, prev);
1040 }
1041
1042 int
1043 sim_write (sd, addr, buffer, size)
1044      SIM_DESC sd;
1045      SIM_ADDR addr;
1046      unsigned char *buffer;
1047      int size;
1048 {
1049   int i;
1050
1051   init_pointers ();
1052
1053   for (i = 0; i < size; i++)
1054     {
1055       saved_state.asregs.memory[MMASKB & (addr + i)] = buffer[i];
1056     }
1057   return size;
1058 }
1059
1060 int
1061 sim_read (sd, addr, buffer, size)
1062      SIM_DESC sd;
1063      SIM_ADDR addr;
1064      unsigned char *buffer;
1065      int size;
1066 {
1067   int i;
1068
1069   init_pointers ();
1070
1071   for (i = 0; i < size; i++)
1072     {
1073       buffer[i] = saved_state.asregs.memory[MMASKB & (addr + i)];
1074     }
1075   return size;
1076 }
1077
1078 void
1079 sim_store_register (sd, rn, memory)
1080      SIM_DESC sd;
1081      int rn;
1082      unsigned char *memory;
1083 {
1084   init_pointers ();
1085   saved_state.asregs.regs[rn] = RLAT(0);
1086 }
1087
1088 void
1089 sim_fetch_register (sd, rn, memory)
1090      SIM_DESC sd;
1091      int rn;
1092      unsigned char *memory;
1093 {
1094   init_pointers ();
1095   WLAT (0, saved_state.asregs.regs[rn]);
1096 }
1097
1098 int
1099 sim_trace (sd)
1100      SIM_DESC sd;
1101 {
1102   return 0;
1103 }
1104
1105 void
1106 sim_stop_reason (sd, reason, sigrc)
1107      SIM_DESC sd;
1108      enum sim_stop *reason;
1109      int *sigrc;
1110 {
1111   /* The SH simulator uses SIGQUIT to indicate that the program has
1112      exited, so we must check for it here and translate it to exit.  */
1113   if (saved_state.asregs.exception == SIGQUIT)
1114     {
1115       *reason = sim_exited;
1116       *sigrc = saved_state.asregs.regs[5];
1117     }
1118   else
1119     {
1120       *reason = sim_stopped;
1121       *sigrc = saved_state.asregs.exception;
1122     }
1123 }
1124
1125 void
1126 sim_info (sd, verbose)
1127      SIM_DESC sd;
1128      int verbose;
1129 {
1130   double timetaken = (double) saved_state.asregs.ticks / (double) now_persec ();
1131   double virttime = saved_state.asregs.cycles / 36.0e6;
1132
1133   callback->printf_filtered (callback, "\n\n# instructions executed  %10d\n",
1134                              saved_state.asregs.insts);
1135   callback->printf_filtered (callback, "# cycles                 %10d\n",
1136                              saved_state.asregs.cycles);
1137   callback->printf_filtered (callback, "# pipeline stalls        %10d\n",
1138                              saved_state.asregs.stalls);
1139   callback->printf_filtered (callback, "# misaligned load/store  %10d\n",
1140                              saved_state.asregs.memstalls);
1141   callback->printf_filtered (callback, "# real time taken        %10.4f\n",
1142                              timetaken);
1143   callback->printf_filtered (callback, "# virtual time taken     %10.4f\n",
1144                              virttime);
1145   callback->printf_filtered (callback, "# profiling size         %10d\n",
1146                              sim_profile_size);
1147   callback->printf_filtered (callback, "# profiling frequency    %10d\n",
1148                              saved_state.asregs.profile);
1149   callback->printf_filtered (callback, "# profile maxpc          %10x\n",
1150                              (1 << sim_profile_size) << PROFILE_SHIFT);
1151
1152   if (timetaken != 0)
1153     {
1154       callback->printf_filtered (callback, "# cycles/second          %10d\n",
1155                                  (int) (saved_state.asregs.cycles / timetaken));
1156       callback->printf_filtered (callback, "# simulation ratio       %10.4f\n",
1157                                  virttime / timetaken);
1158     }
1159 }
1160
1161 void
1162 sim_set_profile (n)
1163      int n;
1164 {
1165   saved_state.asregs.profile = n;
1166 }
1167
1168 void
1169 sim_set_profile_size (n)
1170      int n;
1171 {
1172   sim_profile_size = n;
1173 }
1174
1175 SIM_DESC
1176 sim_open (kind, cb, abfd, argv)
1177      SIM_OPEN_KIND kind;
1178      host_callback *cb;
1179      struct _bfd *abfd;
1180      char **argv;
1181 {
1182   char **p;
1183
1184   sim_kind = kind;
1185   myname = argv[0];
1186   callback = cb;
1187
1188   for (p = argv + 1; *p != NULL; ++p)
1189     {
1190       if (strcmp (*p, "-E") == 0)
1191         {
1192           ++p;
1193           if (*p == NULL)
1194             {
1195               /* FIXME: This doesn't use stderr, but then the rest of the
1196                  file doesn't either.  */
1197               callback->printf_filtered (callback, "Missing argument to `-E'.\n");
1198               return 0;
1199             }
1200           little_endian_p = strcmp (*p, "big") != 0;
1201         }
1202       else if (isdigit (**p))
1203         parse_and_set_memory_size (*p);
1204     }
1205
1206   /* fudge our descriptor for now */
1207   return (SIM_DESC) 1;
1208 }
1209
1210 static void
1211 parse_and_set_memory_size (str)
1212      char *str;
1213 {
1214   int n;
1215
1216   n = strtol (str, NULL, 10);
1217   if (n > 0 && n <= 24)
1218     sim_memory_size = n;
1219   else
1220     callback->printf_filtered (callback, "Bad memory size %d; must be 1 to 24, inclusive\n", n);
1221 }
1222
1223 void
1224 sim_close (sd, quitting)
1225      SIM_DESC sd;
1226      int quitting;
1227 {
1228   /* nothing to do */
1229 }
1230
1231 SIM_RC
1232 sim_load (sd, prog, abfd, from_tty)
1233      SIM_DESC sd;
1234      char *prog;
1235      bfd *abfd;
1236      int from_tty;
1237 {
1238   extern bfd *sim_load_file (); /* ??? Don't know where this should live.  */
1239   bfd *prog_bfd;
1240
1241   prog_bfd = sim_load_file (sd, myname, callback, prog, abfd,
1242                             sim_kind == SIM_OPEN_DEBUG);
1243   if (prog_bfd == NULL)
1244     return SIM_RC_FAIL;
1245   if (abfd == NULL)
1246     bfd_close (prog_bfd);
1247   return SIM_RC_OK;
1248 }
1249
1250 SIM_RC
1251 sim_create_inferior (sd, abfd, argv, env)
1252      SIM_DESC sd;
1253      struct _bfd *abfd;
1254      char **argv;
1255      char **env;
1256 {
1257   if (abfd != NULL)
1258     saved_state.asregs.pc = bfd_get_start_address (abfd);
1259   else
1260     saved_state.asregs.pc = 0;
1261   return SIM_RC_OK;
1262 }
1263
1264 void
1265 sim_do_command (sd, cmd)
1266      SIM_DESC sd;
1267      char *cmd;
1268 {
1269   char *sms_cmd = "set-memory-size";
1270   int cmdsize;
1271
1272   if (cmd == NULL || *cmd == '\0')
1273     {
1274       cmd = "help";
1275     }
1276
1277   cmdsize = strlen (sms_cmd);
1278   if (strncmp (cmd, sms_cmd, cmdsize) == 0 && strchr (" \t", cmd[cmdsize]) != NULL)
1279     {
1280       parse_and_set_memory_size (cmd + cmdsize + 1);
1281     }
1282   else if (strcmp (cmd, "help") == 0)
1283     {
1284       (callback->printf_filtered) (callback, "List of SH simulator commands:\n\n");
1285       (callback->printf_filtered) (callback, "set-memory-size <n> -- Set the number of address bits to use\n");
1286       (callback->printf_filtered) (callback, "\n");
1287     }
1288   else
1289     {
1290       (callback->printf_filtered) (callback, "Error: \"%s\" is not a valid SH simulator command.\n", cmd);
1291     }
1292 }
1293
1294 void
1295 sim_set_callbacks (p)
1296      host_callback *p;
1297 {
1298   callback = p;
1299 }