sim/sh64/sh64-sim.h

   1 /* collection of junk waiting time to sort out
   2    Copyright (C) 2000, 2006, 2008, 2009, 2010, 2011
   3    Free Software Foundation, Inc.
   4    Contributed by Red Hat, Inc.
   5
   6 This file is part of the GNU Simulators.
   7
   8 This program is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 3 of the License, or
  11 (at your option) any later version.
  12
  13 This program is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef SH64_SIM_H
  22 #define SH64_SIM_H
  23
  24 #define GETTWI GETTSI
  25 #define SETTWI SETTSI
  26 \f
  27
  28 enum {
  29   ISM_COMPACT, ISM_MEDIA
  30 };
  31
  32 /* Hardware/device support.  */
  33 extern device sh5_devices;
  34
  35 /* FIXME: Temporary, until device support ready.  */
  36 struct _device { int foo; };
  37
  38 extern IDESC * sh64_idesc_media;
  39 extern IDESC * sh64_idesc_compact;
  40
  41 /* Function prototypes from sh64.c.  */
  42
  43 BI sh64_endian (SIM_CPU *);
  44 VOID sh64_break (SIM_CPU *, PCADDR);
  45 SI sh64_movua (SIM_CPU *, PCADDR, SI);
  46 VOID sh64_trapa (SIM_CPU *, DI, PCADDR);
  47 VOID sh64_compact_trapa (SIM_CPU *, UQI, PCADDR);
  48
  49 SF sh64_fldi0 (SIM_CPU *);
  50 SF sh64_fldi1 (SIM_CPU *);
  51 DF sh64_fcnvsd (SIM_CPU *, SF);
  52 SF sh64_fcnvds (SIM_CPU *, DF);
  53
  54 DF sh64_fabsd (SIM_CPU *, DF);
  55 SF sh64_fabss (SIM_CPU *, SF);
  56 DF sh64_faddd (SIM_CPU *, DF, DF);
  57 SF sh64_fadds (SIM_CPU *, SF, SF);
  58 DF sh64_fdivd (SIM_CPU *, DF, DF);
  59 SF sh64_fdivs (SIM_CPU *, SF, SF);
  60 DF sh64_floatld (SIM_CPU *, SF);
  61 SF sh64_floatls (SIM_CPU *, SF);
  62 DF sh64_floatqd (SIM_CPU *, DF);
  63 SF sh64_floatqs (SIM_CPU *, DF);
  64 SF sh64_fmacs(SIM_CPU *, SF, SF, SF);
  65 DF sh64_fmuld (SIM_CPU *, DF, DF);
  66 SF sh64_fmuls (SIM_CPU *, SF, SF);
  67 DF sh64_fnegd (SIM_CPU *, DF);
  68 SF sh64_fnegs (SIM_CPU *, SF);
  69 DF sh64_fsqrtd (SIM_CPU *, DF);
  70 SF sh64_fsqrts (SIM_CPU *, SF);
  71 DF sh64_fsubd (SIM_CPU *, DF, DF);
  72 SF sh64_fsubs (SIM_CPU *, SF, SF);
  73 SF sh64_ftrcdl (SIM_CPU *, DF);
  74 DF sh64_ftrcdq (SIM_CPU *, DF);
  75 SF sh64_ftrcsl (SIM_CPU *, SF);
  76 DF sh64_ftrcsq (SIM_CPU *, SF);
  77 VOID sh64_ftrvs (SIM_CPU *, unsigned, unsigned, unsigned);
  78 VOID sh64_fipr (SIM_CPU *cpu, unsigned m, unsigned n);
  79 SF sh64_fiprs (SIM_CPU *cpu, unsigned g, unsigned h);
  80 VOID sh64_fldp (SIM_CPU *cpu, PCADDR pc, DI rm, DI rn, unsigned f);
  81 VOID sh64_fstp (SIM_CPU *cpu, PCADDR pc, DI rm, DI rn, unsigned f);
  82 VOID sh64_ftrv (SIM_CPU *cpu, UINT ignored);
  83 VOID sh64_pref (SIM_CPU *cpu, SI addr);
  84 BI sh64_fcmpeqs (SIM_CPU *, SF, SF);
  85 BI sh64_fcmpeqd (SIM_CPU *, DF, DF);
  86 BI sh64_fcmpges (SIM_CPU *, SF, SF);
  87 BI sh64_fcmpged (SIM_CPU *, DF, DF);
  88 BI sh64_fcmpgts (SIM_CPU *, SF, SF);
  89 BI sh64_fcmpgtd (SIM_CPU *, DF, DF);
  90 BI sh64_fcmpund (SIM_CPU *, DF, DF);
  91 BI sh64_fcmpuns (SIM_CPU *, SF, SF);
  92
  93 DI sh64_nsb (SIM_CPU *, DI);
  94
  95 #endif /* SH64_SIM_H */