1 Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
3 * sim/m32r/bcl24.cgs: Test long version of BCL instruction
4 * sim/m32r/sra.cgs: Test SRA instruction.
5 * sim/m32r/sra3.cgs: Test SRA3 instruction.
6 * sim/m32r/srai.cgs: Test SRAI instruction.
7 * sim/m32r/srl.cgs: Test SRL instruction.
8 * sim/m32r/srl3.cgs: Test SRL3 instruction.
9 * sim/m32r/srli.cgs: Test SRLI instruction.
10 * sim/m32r/xor3.cgs: Test XOR3 instruction.
11 * sim/m32r/xor.cgs: Test XOR instruction.
13 Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
15 * config/default.exp: New file.
16 * lib/sim-defs.exp: New file.
17 * sim/m32r/*: m32r dejagnu simulator testsuite.
19 * Makefile.in (build_alias): Define.
21 (RUNTEST_FOR_TARGET): Delete.
23 (SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS): Define.
24 (check): Depend on site.exp. Run dejagnu.
25 (site.exp): New target.
27 * configure.in: Call AC_CHECK_PROG(SCHEME) if using cgen.
28 (arch): Define from target_cpu.
29 * configure: Regenerate.
31 Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
33 * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
36 * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
37 (calc): Add support for 8 bit version of macros.
38 (main): Add tests for 8 bit versions of macros.
39 (check_sext): Check SEXT of zero clears bits.
41 * common/bits-gen.c (main): Generate tests for 8 bit versions of
44 Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
46 * common/Make-common.in: New file, provide generic rules for
49 Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
51 * configure.in (configdirs): Test for the target directory instead
52 of matching on a target.
55 Tue Jul 15 13:43:20 1997 Andrew Cagney <cagney@sendai.cygnus.com>
57 * configure.in (configdirs): Configure mips64vr5900el
59 * configure: Regenerate.