sim/testsuite/ChangeLog

   1 Thu May 14 11:48:35 1998  Doug Evans  <devans@canuck.cygnus.com>
   2
   3 start-sanitize-sky
   4         * sim/sky/sky.exp: Add runtest_file_p support.  Don't print
   5         unsupported message if not sky.
   6         * sim/sky/sky_sce.exp: Likewise.
   7
   8 end-sanitize-sky
   9         * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
  10         New arg prog_opts.  All callers updated.
  11
  12 Fri May  8 18:10:28 1998  Jillian Ye <jillian@cygnus.com>
  13
  14         * Makefile.in: Made "check" the target of two
  15           dependencies (test1, test2) so that test2 get a chance to
  16           run even when test1 failed if "make -k check" is used.
  17
  18 Fri May  8 14:41:28 1998  Doug Evans  <devans@canuck.cygnus.com>
  19
  20         * lib/sim-defs.exp (sim_version): Simplify.
  21         (sim_run): Implement.
  22         (run_sim_test): Use sim_run.
  23         (sim_compile): New proc.
  24
  25 Mon May  4 17:59:11 1998  Frank Ch. Eigler  <fche@cygnus.com>
  26
  27 start-sanitize-sky
  28         * configure.in (testdir): Don't use old sky test directory.
  29         * configure: Regenerated
  30         * sky/Makefile.in: swallow stderr on buggy tests
  31 end-sanitize-sky
  32         * config/default.exp: Added C compiler settings.
  33
  34 Wed Apr 22 12:26:28 1998  Doug Evans  <devans@canuck.cygnus.com>
  35
  36         * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
  37
  38 Tue Apr 21 10:49:03 1998  Doug Evans  <devans@canuck.cygnus.com>
  39
  40         * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
  41         try all machs.
  42
  43         * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
  44
  45 Fri Apr 17 16:00:52 1998  Doug Evans  <devans@canuck.cygnus.com>
  46
  47         * sim/m32r/mv[ft]achi.cgs: Fix expected result
  48         (sign extension of top 8 bits).
  49 start-sanitize-m32rx
  50         * sim/m32r/mv[ft]achi-a.cgs: Ditto.
  51 end-sanitize-m32rx
  52
  53 start-sanitize-m32rx
  54 Tue Apr 14 14:06:34 1998  Doug Evans  <devans@canuck.cygnus.com>
  55
  56         * sim/m32r/maclh1.cgs: Fix testcase.
  57         * sim/m32r/maclh1-2.cgs: New testcase.
  58
  59 Tue Mar  3 19:09:09 1998  Doug Evans  <devans@canuck.cygnus.com>
  60
  61         * sim/m32r/sat.cgs: Change sath to sat.
  62
  63 end-sanitize-m32rx
  64 Wed Feb 25 11:01:17 1998  Doug Evans  <devans@canuck.cygnus.com>
  65
  66         * Makefile.in (RUNTEST): Fix path to runtest.
  67
  68 start-sanitize-sky
  69 Tue Feb 24 19:47:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
  70
  71         * configure.in (testdir): Added sky subdir for mips64r5900-sky-elf
  72         target.
  73         * configure: Regenerate.
  74 end-sanitize-sky
  75
  76 Fri Feb 20 11:00:02 1998  Nick Clifton  <nickc@cygnus.com>
  77
  78         * sim/m32r/unlock.cgs: Fixed test.
  79         * sim/m32r/mvfc.cgs: Fixed test.
  80         * sim/m32r/remu.cgs: Fixed test.
  81
  82         * sim/m32r/bnc24.cgs: Test long BNC instruction.
  83         * sim/m32r/bnc8.cgs: Test short BNC instruction.
  84         * sim/m32r/ld-plus.cgs: Test LD instruction.
  85         * sim/m32r/macwhi.cgs: Test MACWHI instruction.
  86         * sim/m32r/macwlo.cgs: Test MACWLO instruction.
  87         * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
  88         * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
  89         * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
  90         * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
  91         * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
  92         * sim/m32r/addv.cgs: Test ADDV instruction.
  93         * sim/m32r/addv3.cgs: Test ADDV3 instruction.
  94         * sim/m32r/addx.cgs: Test ADDX instruction.
  95         * sim/m32r/lock.cgs: Test LOCK instruction.
  96         * sim/m32r/neg.cgs: Test NEG instruction.
  97         * sim/m32r/not.cgs: Test NOT instruction.
  98         * sim/m32r/unlock.cgs: Test UNLOCK instruction.
  99 start-sanitize-m32rx
 100         * sim/m32r/mvfachi-a.cgs: Test extended MVFACHI instruction.
 101         * sim/m32r/mvfaclo-a.cgs: Test extended MVFACLO instruction.
 102         * sim/m32r/mvtachi-a.cgs: Test extended MVTACHI instruction.
 103         * sim/m32r/mvtaclo-a.cgs: Test extended MVTACLO instruction.
 104 end-sanitize-m32rx
 105 Thu Feb 19 11:15:45 1998  Nick Clifton  <nickc@cygnus.com>
 106
 107         * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
 108         address into a general register.
 109
 110         * sim/m32r/or3.cgs: Test OR3 instruction.
 111         * sim/m32r/rach.cgs: Test RACH instruction.
 112         * sim/m32r/rem.cgs: Test REM instruction.
 113         * sim/m32r/sub.cgs: Test SUB instruction.
 114         * sim/m32r/mv.cgs: Test MV instruction.
 115         * sim/m32r/mul.cgs: Test MUL instruction.
 116         * sim/m32r/bl24.cgs: Test long BL instruction.
 117         * sim/m32r/bl8.cgs: Test short BL instruction.
 118         * sim/m32r/blez.cgs: Test BLEZ instruction.
 119         * sim/m32r/bltz.cgs: Test BLTZ instruction.
 120         * sim/m32r/bne.cgs: Test BNE instruction.
 121         * sim/m32r/bnez.cgs: Test BNEZ instruction.
 122         * sim/m32r/bra24.cgs: Test long BRA instruction.
 123         * sim/m32r/bra8.cgs: Test short BRA instruction.
 124         * sim/m32r/jl.cgs: Test JL instruction.
 125         * sim/m32r/or.cgs: Test OR instruction.
 126         * sim/m32r/jmp.cgs: Test JMP instruction.
 127         * sim/m32r/and.cgs: Test AND instruction.
 128         * sim/m32r/and3.cgs: Test AND3 instruction.
 129         * sim/m32r/beq.cgs: Test BEQ instruction.
 130         * sim/m32r/beqz.cgs: Test BEQZ instruction.
 131         * sim/m32r/bgez.cgs: Test BGEZ instruction.
 132         * sim/m32r/bgtz.cgs: Test BGTZ instruction.
 133         * sim/m32r/cmp.cgs: Test CMP instruction.
 134         * sim/m32r/cmpi.cgs: Test CMPI instruction.
 135         * sim/m32r/cmpu.cgs: Test CMPU instruction.
 136         * sim/m32r/cmpui.cgs: Test CMPUI instruction.
 137         * sim/m32r/div.cgs: Test DIV instruction.
 138         * sim/m32r/divu.cgs: Test DIVU instruction.
 139         * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
 140         * sim/m32r/sll.cgs: Test SLL instruction.
 141         * sim/m32r/sll3.cgs: Test SLL3 instruction.
 142         * sim/m32r/slli.cgs: Test SLLI instruction.
 143         * sim/m32r/sra.cgs: Test SRA instruction.
 144         * sim/m32r/sra3.cgs: Test SRA3 instruction.
 145         * sim/m32r/srai.cgs: Test SRAI instruction.
 146         * sim/m32r/srl.cgs: Test SRL instruction.
 147         * sim/m32r/srl3.cgs: Test SRL3 instruction.
 148         * sim/m32r/srli.cgs: Test SRLI instruction.
 149         * sim/m32r/xor3.cgs: Test XOR3 instruction.
 150         * sim/m32r/xor.cgs: Test XOR instruction.
 151 start-sanitize-m32rx
 152         * sim/m32r/jnc.cgs: Test JNC instruction.
 153         * sim/m32r/jc.cgs: Test JC instruction.
 154         * sim/m32r/cmpz.cgs: Test CMPZ instruction.
 155         * sim/m32r/bcl24.cgs: Test long version of BCL instruction
 156         * sim/m32r/bcl8.cgs: Test short BCL instruction.
 157         * sim/m32r/bncl24.cgs: Test long BNCL instruction.
 158         * sim/m32r/bncl8.cgs: Test short BNCL instruction.
 159         * sim/m32r/divh.cgs: Test DIVH instruction.
 160         * sim/m32r/rach-dsi.cgs: Test extended RACH instruction.
 161 end-sanitize-m32rx
 162 Tue Feb 17 12:46:05 1998  Doug Evans  <devans@seba.cygnus.com>
 163
 164         * config/default.exp: New file.
 165         * lib/sim-defs.exp: New file.
 166         * sim/m32r/*: m32r dejagnu simulator testsuite.
 167
 168         * Makefile.in (build_alias): Define.
 169         (arch): Define.
 170         (RUNTEST_FOR_TARGET): Delete.
 171         (RUNTEST): Fix.
 172         (SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS): Define.
 173         (check): Depend on site.exp.  Run dejagnu.
 174         (site.exp): New target.
 175         (cgen): New target.
 176         * configure.in: Call AC_CHECK_PROG(SCHEME) if using cgen.
 177         (arch): Define from target_cpu.
 178         * configure: Regenerate.
 179
 180 Wed Sep 17 10:21:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 181
 182         * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
 183         (gen_mask): Ditto.
 184
 185         * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
 186         (calc): Add support for 8 bit version of macros.
 187         (main): Add tests for 8 bit versions of macros.
 188         (check_sext): Check SEXT of zero clears bits.
 189
 190         * common/bits-gen.c (main): Generate tests for 8 bit versions of
 191         macros.
 192
 193 Thu Sep 11 13:04:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 194
 195         * common/Make-common.in: New file, provide generic rules for
 196         running checks.
 197
 198 Mon Sep  1 16:43:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 199
 200         * configure.in (configdirs): Test for the target directory instead
 201         of matching on a target.
 202
 203 start-sanitize-r5900
 204 Tue Jul 15 13:43:20 1997  Andrew Cagney  <cagney@sendai.cygnus.com>
 205
 206         * configure.in (configdirs): Configure mips64vr5900el
 207         directory.
 208         * configure: Regenerate.
 209
 210 end-sanitize-r5900