sim/testsuite/ChangeLog

   1 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
   2
   3         * sim/frv/fr400/scutss.cgs: Fix tests to account for rounding.
   4         Add some new ones.
   5
   6 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
   7
   8         * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
   9         * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
  10
  11 2004-01-26  Chris Demetriou  <cgd@broadcom.com>
  12
  13         * sim/mips: New directory.  Tests for the MIPS simulator.
  14
  15 2004-01-23  Ben Elliston  <bje@wasabisystems.com>
  16
  17         * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a
  18         test passes.
  19
  20 2003-10-10  Dave Brolley  <brolley@redhat.com>
  21
  22         * sim/frv/testutils.inc (or_gr_immed): New macro.
  23         * sim/frv/fp_exception-fr550.cgs: Write insns using
  24         unaligned registers into the program in order to
  25         cause the required exceptions.
  26         * sim/frv/fp_exception.cgs: Ditto.
  27         * sim/frv/regalign.cgs: Ditto.
  28
  29 2003-10-06  Dave Brolley  <brolley@redhat.com>
  30
  31         * sim/frv/fr550: New subdirectory.
  32         * sim/frv/fr400/*.cgs: Add fr550 as appropriate.
  33         * sim/frv/fr500/*.cgs: Add fr550 as appropriate.
  34         * sim/frv/interrupts/*.cgs: Add fr550 as appropriate.
  35         * sim/frv/interrupts/*-fr550.cgs: New test cases for fr550.
  36
  37 2003-09-19  Michael Snyder  <msnyder@redhat.com>
  38
  39         * sim/frv/nldqi.cgs: Remove.  This insn was never implemented
  40         by Fujitsu.
  41
  42 2003-09-19  Dave Brolley  <brolley@redhat.com>
  43
  44         * sim/frv/rstqf.cgs: Use nldq instead of nldqi.
  45         * sim/frv/rstq.cgs: Use nldq instead of nldqi.
  46
  47 2003-09-11  Michael Snyder  <msnyder@redhat.com>
  48
  49         * sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273],
  50         which according to the comments seems to be the intent.
  51
  52 2003-09-09  Dave Brolley  <brolley@redhat.com>
  53
  54         * sim/frv/maddaccs.cgs: move to fr400 subdirectory.
  55         * sim/frv/msubaccs.cgs: move to fr400 subdirectory.
  56         * sim/frv/masaccs.cgs: move to fr400 subdirectory.
  57
  58 2003-09-03  Michael Snyder  <msnyder@redhat.com>
  59
  60         * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be
  61         consistent with other tests in the directory.
  62
  63 2003-09-03  Michael Snyder  <msnyder@redhat.com>
  64
  65         * sim/frv/interrupts/Ipipe-fr400.cgs: New file.
  66         * sim/frv/interrupts/Ipipe-fr500.cgs: New file.
  67         * sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).
  68
  69 2003-08-20  Michael Snyder  <msnyder@redhat.com>
  70             On behalf of Dave Brolley
  71
  72         * sim/frv: New testsuite.
  73         * frv-elf: New testsuite.
  74
  75 2003-07-09  Michael Snyder  <msnyder@redhat.com>
  76
  77         * sim/sh: New directory.  Tests for Renesas sh family.
  78
  79 2003-04-13  Michael Snyder  <msnyder@redhat.com>
  80
  81         * sim/h8300: New directory.  Tests for Renesas h8/300 family.
  82
  83 2003-04-01  Nick Clifton  <nickc@redhat.com>
  84
  85         * sim/arm: New directory: Tests for ARM simulator.
  86         * sim/arm/allinsn.exp: New file: Test script.
  87         * sim/arm/testutils.inc: New file: Test macros.
  88         * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs,
  89         sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs,
  90         sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs,
  91         sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs,
  92         sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs,
  93         sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms,
  94         sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs,
  95         sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs,
  96         sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs,
  97         sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs,
  98         sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs,
  99         sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs,
 100         sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs,
 101         sim/arm/swpb.cgs, sim/arm/teq.cgs,  sim/arm/tst.cgs,
 102         sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests.
 103         * sim/arm/iwmmxt: New Directory: Tests for iWMMXt.
 104         * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script.
 105         * sim/arm/iwmmxt/testutils.inc: New file: Test macros.
 106         * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs,
 107         sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs,
 108         sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs,
 109         sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs,
 110         sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs,
 111         sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs,
 112         sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs,
 113         sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs,
 114         sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs,
 115         sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs,
 116         sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs,
 117         sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs,
 118         sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs,
 119         sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs,
 120         sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs,
 121         sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs,
 122         sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs,
 123         sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs,
 124         sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests.
 125         * sim/arm/thumb: New Directory: Thumb tests.
 126         * sim/arm/thumb/allthumb.exp: New file: Test script.
 127         * sim/arm/thumb/testutils.inc: New file: Test macros.
 128         * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs,
 129         sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs,
 130         sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs,
 131         sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs,
 132         sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs,
 133         sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs,
 134         sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs,
 135         sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs,
 136         sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs,
 137         sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs,
 138         sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs,
 139         sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs,
 140         sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs,
 141         sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs,
 142         sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs,
 143         sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs,
 144         sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs,
 145         sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs,
 146         sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs,
 147         sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs,
 148         sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs,
 149         sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs,
 150         sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs,
 151         sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs,
 152         sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs,
 153         sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs,
 154         sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs,
 155         sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs,
 156         sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs,
 157         sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs,
 158         sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs,
 159         sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs,
 160         sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs,
 161         sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs,
 162         sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs,
 163         sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs,
 164         sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs,
 165         sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs,
 166         sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb
 167         tests.
 168         * sim/arm/xscale: New directory.
 169         * sim/arm/xscale/xscale.exp: New file: Test script.
 170         * sim/arm/xscale/testutils.inc: New file: Test macros.
 171         * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs,
 172         sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs,
 173         sim/arm/xscale/mra.cgs: New files: XScale tests.
 174
 175 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 176
 177         * configure: Regenerated to track ../common/aclocal.m4 changes.
 178
 179 2001-07-31  Ben Elliston  <bje@redhat.com>
 180
 181         * lib/sim-defs.exp (run_sim_test): Include a description such as
 182         "assembling" or "linking" that identifies the phase a test fails
 183         in, for easier analysis of failures.
 184
 185 2000-11-01  Dave Brolley  <brolley@cygnus.com>
 186
 187         * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
 188         "xerror" options do not use a list of machines. Clear options from
 189         previous test case. Use "$cpu_option"  to identify the machine to the
 190         assembler, if specified.
 191
 192 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 193
 194         * configure: Regenerated to track ../common/aclocal.m4 changes.
 195
 196 1999-09-15  Doug Evans  <devans@casey.cygnus.com>
 197
 198         * sim/arm/b.cgs: New testcase.
 199         * sim/arm/bic.cgs: New testcase.
 200         * sim/arm/bl.cgs: New testcase.
 201
 202 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 203
 204         * configure: Regenerated to track ../common/aclocal.m4 changes.
 205
 206 1999-08-30  Doug Evans  <devans@casey.cygnus.com>
 207
 208         * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
 209         requested_machs, now is list of machs to run tests for.
 210         Delete locals AS,ASFLAGS,LD,LDFLAGS.  Use target_assemble
 211         and target_link instead.
 212
 213 1999-04-21  Doug Evans  <devans@casey.cygnus.com>
 214
 215         * sim/m32r/nop.cgs: Add missing nop insn.
 216
 217 Mon Mar 22 13:28:56 1999  Dave Brolley  <brolley@cygnus.com>
 218
 219         * sim/fr30/stb.cgs: Correct for unaligned access.
 220         * sim/fr30/sth.cgs: Correct for unaligned access.
 221         * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
 222         for unaligned access.
 223         * sim/fr30/and.cgs: Test unaligned access.
 224
 225 Fri Feb  5 12:41:11 1999  Doug Evans  <devans@canuck.cygnus.com>
 226
 227         * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
 228
 229 1999-01-05  Doug Evans  <devans@casey.cygnus.com>
 230
 231         * lib/sim-defs.exp (run_sim_test): New arg all_machs.
 232         * sim/fr30/allinsn.exp: Update.
 233         * sim/fr30/misc.exp: Update.
 234         * sim/m32r/allinsn.exp: Update.
 235         * sim/m32r/misc.exp: Update.
 236
 237 Fri Dec 18 17:19:34 1998  Dave Brolley  <brolley@cygnus.com>
 238
 239         * sim/fr30/ldres.cgs: New testcase.
 240         * sim/fr30/copld.cgs: New testcase.
 241         * sim/fr30/copst.cgs: New testcase.
 242         * sim/fr30/copsv.cgs: New testcase.
 243         * sim/fr30/nop.cgs: New testcase.
 244         * sim/fr30/andccr.cgs: New testcase.
 245         * sim/fr30/orccr.cgs: New testcase.
 246         * sim/fr30/addsp.cgs: New testcase.
 247         * sim/fr30/stilm.cgs: New testcase.
 248         * sim/fr30/extsb.cgs: New testcase.
 249         * sim/fr30/extub.cgs: New testcase.
 250         * sim/fr30/extsh.cgs: New testcase.
 251         * sim/fr30/extuh.cgs: New testcase.
 252         * sim/fr30/enter.cgs: New testcase.
 253         * sim/fr30/leave.cgs: New testcase.
 254         * sim/fr30/xchb.cgs: New testcase.
 255         * sim/fr30/dmovb.cgs: New testcase.
 256         * sim/fr30/dmov.cgs: New testcase.
 257         * sim/fr30/dmovh.cgs: New testcase.
 258
 259 Thu Dec 17 17:18:43 1998  Dave Brolley  <brolley@cygnus.com>
 260
 261         * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
 262         * sim/fr30/ret.cgs: Add tests fir ret:d.
 263         * sim/fr30/inte.cgs: New testcase.
 264         * sim/fr30/reti.cgs: New testcase.
 265         * sim/fr30/bra.cgs: New testcase.
 266         * sim/fr30/bno.cgs: New testcase.
 267         * sim/fr30/beq.cgs: New testcase.
 268         * sim/fr30/bne.cgs: New testcase.
 269         * sim/fr30/bc.cgs: New testcase.
 270         * sim/fr30/bnc.cgs: New testcase.
 271         * sim/fr30/bn.cgs: New testcase.
 272         * sim/fr30/bp.cgs: New testcase.
 273         * sim/fr30/bv.cgs: New testcase.
 274         * sim/fr30/bnv.cgs: New testcase.
 275         * sim/fr30/blt.cgs: New testcase.
 276         * sim/fr30/bge.cgs: New testcase.
 277         * sim/fr30/ble.cgs: New testcase.
 278         * sim/fr30/bgt.cgs: New testcase.
 279         * sim/fr30/bls.cgs: New testcase.
 280         * sim/fr30/bhi.cgs: New testcase.
 281
 282 Tue Dec 15 17:47:13 1998  Dave Brolley  <brolley@cygnus.com>
 283
 284         * sim/fr30/div.cgs (int): Add signed division scenario.
 285         * sim/fr30/int.cgs (int): Complete testcase.
 286         * sim/fr30/testutils.inc (_start): Initialize tbr.
 287         (test_s_user,test_s_system,set_i,test_i): New macros.
 288
 289 1998-12-14  Doug Evans  <devans@casey.cygnus.com>
 290
 291         * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
 292         errors.  Translate \n sequences in expected output to newline char.
 293         (slurp_options): Make parentheses optional.
 294         (sim_run): Look for board_info sim,options.
 295         * sim/fr30/hello.ms: Add trailing \n to expected output.
 296         * sim/m32r/hello.ms: Ditto.
 297         * sim/m32r/hw-trap.ms: Ditto.
 298
 299         * sim/m32r/trap.cgs: Properly align trap2_handler.
 300
 301         * sim/m32r/uread16.ms: New testcase.
 302         * sim/m32r/uread32.ms: New testcase.
 303         * sim/m32r/uwrite16.ms: New testcase.
 304         * sim/m32r/uwrite32.ms: New testcase.
 305
 306 1998-12-14  Dave Brolley  <brolley@cygnus.com>
 307
 308         * sim/fr30/call.cgs: Test ret here as well.
 309         * sim/fr30/ld.cgs: Remove bogus comment.
 310         * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
 311         * sim/fr30/div.ms: New testcase.
 312         * sim/fr30/st.cgs: New testcase.
 313         * sim/fr30/sth.cgs: New testcase.
 314         * sim/fr30/stb.cgs: New testcase.
 315         * sim/fr30/mov.cgs: New testcase.
 316         * sim/fr30/jmp.cgs: New testcase.
 317         * sim/fr30/ret.cgs: New testcase.
 318         * sim/fr30/int.cgs: New testcase.
 319
 320 Thu Dec 10 18:46:25 1998  Dave Brolley  <brolley@cygnus.com>
 321
 322         * sim/fr30/div0s.cgs: New testcase.
 323         * sim/fr30/div0u.cgs: New testcase.
 324         * sim/fr30/div1.cgs: New testcase.
 325         * sim/fr30/div2.cgs: New testcase.
 326         * sim/fr30/div3.cgs: New testcase.
 327         * sim/fr30/div4s.cgs: New testcase.
 328         * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
 329
 330 Tue Dec  8 13:16:53 1998  Dave Brolley  <brolley@cygnus.com>
 331
 332         * sim/fr30/testutils.inc (set_s_user): Correct Mask.
 333         (set_s_system): Correct Mask.
 334         * sim/fr30/ld.cgs (ld): Move previously failing test back
 335         into place.
 336         * sim/fr30/ldm0.cgs: New testcase.
 337         * sim/fr30/ldm1.cgs: New testcase.
 338         * sim/fr30/stm0.cgs: New testcase.
 339         * sim/fr30/stm1.cgs: New testcase.
 340
 341 Thu Dec  3 14:20:03 1998  Dave Brolley  <brolley@cygnus.com>
 342
 343         * sim/fr30/ld.cgs: Implement more loads.
 344         * sim/fr30/call.cgs: New testcase.
 345         * sim/fr30/testutils.inc (testr_h_dr): New macro.
 346         (set_s_user,set_s_system): New macros.
 347
 348         * sim/fr30: New Directory.
 349
 350 Wed Nov 18 10:50:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 351
 352         * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
 353         recent sim/common/sim-basics.h changes.
 354         * common/Makefile.in: Update.
 355
 356 Fri Oct 30 00:37:31 1998  Felix Lee  <flee@cygnus.com>
 357
 358         * lib/sim-defs.exp (sim_run): download target program to remote
 359         host, if necessary.  for unix-driven win32 testing.
 360
 361 Tue Sep 15 14:56:22 1998  Doug Evans  <devans@canuck.cygnus.com>
 362
 363         * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
 364         * sim/m32r/rte.cgs: Test bbpc,bbpsw.
 365         * sim/m32r/trap.cgs: Test bbpc,bbpsw.
 366
 367 Fri Jul 31 17:49:13 1998  Felix Lee  <flee@cygnus.com>
 368
 369         * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
 370         writeonly.
 371
 372 Fri Jul 24 09:40:34 1998  Doug Evans  <devans@canuck.cygnus.com>
 373
 374         * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
 375
 376 Wed Jul  1 15:57:54 1998  Doug Evans  <devans@seba.cygnus.com>
 377
 378         * sim/m32r/hw-trap.ms: New testcase.
 379
 380 Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
 381
 382         * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
 383
 384 Thu Jun 11 15:24:53 1998  Doug Evans  <devans@canuck.cygnus.com>
 385
 386         * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
 387         which is now a list of options controlling the behaviour of sim_run.
 388
 389 Wed Jun 10 10:53:20 1998  Doug Evans  <devans@seba.cygnus.com>
 390
 391         * sim/m32r/addx.cgs: Add another test.
 392         * sim/m32r/jmp.cgs: Add another test.
 393
 394 Mon Jun  8 16:08:27 1998  Doug Evans  <devans@canuck.cygnus.com>
 395
 396         * sim/m32r/trap.cgs: Test trap 2.
 397
 398 Mon Jun  1 18:54:22 1998  Frank Ch. Eigler  <fche@cygnus.com>
 399
 400         * lib/sim-defs.exp (sim_run): Add possible environment variable
 401         list to simulator run.
 402
 403 Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
 404
 405         * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
 406                        so that make check can be invoked recursively.
 407
 408 Thu May 14 11:48:35 1998  Doug Evans  <devans@canuck.cygnus.com>
 409
 410         * config/default.exp (CC,SIM): Delete.
 411
 412         * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
 413         New arg prog_opts.  All callers updated.
 414
 415 Fri May  8 18:10:28 1998  Jillian Ye <jillian@cygnus.com>
 416
 417         * Makefile.in: Made "check" the target of two
 418           dependencies (test1, test2) so that test2 get a chance to
 419           run even when test1 failed if "make -k check" is used.
 420
 421 Fri May  8 14:41:28 1998  Doug Evans  <devans@canuck.cygnus.com>
 422
 423         * lib/sim-defs.exp (sim_version): Simplify.
 424         (sim_run): Implement.
 425         (run_sim_test): Use sim_run.
 426         (sim_compile): New proc.
 427
 428 Mon May  4 17:59:11 1998  Frank Ch. Eigler  <fche@cygnus.com>
 429
 430         * config/default.exp: Added C compiler settings.
 431
 432 Wed Apr 22 12:26:28 1998  Doug Evans  <devans@canuck.cygnus.com>
 433
 434         * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
 435
 436 Tue Apr 21 10:49:03 1998  Doug Evans  <devans@canuck.cygnus.com>
 437
 438         * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
 439         try all machs.
 440
 441         * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
 442
 443 Fri Apr 17 16:00:52 1998  Doug Evans  <devans@canuck.cygnus.com>
 444
 445         * sim/m32r/mv[ft]achi.cgs: Fix expected result
 446         (sign extension of top 8 bits).
 447
 448 Wed Feb 25 11:01:17 1998  Doug Evans  <devans@canuck.cygnus.com>
 449
 450         * Makefile.in (RUNTEST): Fix path to runtest.
 451
 452 Fri Feb 20 11:00:02 1998  Nick Clifton  <nickc@cygnus.com>
 453
 454         * sim/m32r/unlock.cgs: Fixed test.
 455         * sim/m32r/mvfc.cgs: Fixed test.
 456         * sim/m32r/remu.cgs: Fixed test.
 457         * sim/m32r/bnc24.cgs: Test long BNC instruction.
 458         * sim/m32r/bnc8.cgs: Test short BNC instruction.
 459         * sim/m32r/ld-plus.cgs: Test LD instruction.
 460         * sim/m32r/macwhi.cgs: Test MACWHI instruction.
 461         * sim/m32r/macwlo.cgs: Test MACWLO instruction.
 462         * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
 463         * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
 464         * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
 465         * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
 466         * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
 467         * sim/m32r/addv.cgs: Test ADDV instruction.
 468         * sim/m32r/addv3.cgs: Test ADDV3 instruction.
 469         * sim/m32r/addx.cgs: Test ADDX instruction.
 470         * sim/m32r/lock.cgs: Test LOCK instruction.
 471         * sim/m32r/neg.cgs: Test NEG instruction.
 472         * sim/m32r/not.cgs: Test NOT instruction.
 473         * sim/m32r/unlock.cgs: Test UNLOCK instruction.
 474
 475 Thu Feb 19 11:15:45 1998  Nick Clifton  <nickc@cygnus.com>
 476
 477         * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
 478         address into a general register.
 479
 480         * sim/m32r/or3.cgs: Test OR3 instruction.
 481         * sim/m32r/rach.cgs: Test RACH instruction.
 482         * sim/m32r/rem.cgs: Test REM instruction.
 483         * sim/m32r/sub.cgs: Test SUB instruction.
 484         * sim/m32r/mv.cgs: Test MV instruction.
 485         * sim/m32r/mul.cgs: Test MUL instruction.
 486         * sim/m32r/bl24.cgs: Test long BL instruction.
 487         * sim/m32r/bl8.cgs: Test short BL instruction.
 488         * sim/m32r/blez.cgs: Test BLEZ instruction.
 489         * sim/m32r/bltz.cgs: Test BLTZ instruction.
 490         * sim/m32r/bne.cgs: Test BNE instruction.
 491         * sim/m32r/bnez.cgs: Test BNEZ instruction.
 492         * sim/m32r/bra24.cgs: Test long BRA instruction.
 493         * sim/m32r/bra8.cgs: Test short BRA instruction.
 494         * sim/m32r/jl.cgs: Test JL instruction.
 495         * sim/m32r/or.cgs: Test OR instruction.
 496         * sim/m32r/jmp.cgs: Test JMP instruction.
 497         * sim/m32r/and.cgs: Test AND instruction.
 498         * sim/m32r/and3.cgs: Test AND3 instruction.
 499         * sim/m32r/beq.cgs: Test BEQ instruction.
 500         * sim/m32r/beqz.cgs: Test BEQZ instruction.
 501         * sim/m32r/bgez.cgs: Test BGEZ instruction.
 502         * sim/m32r/bgtz.cgs: Test BGTZ instruction.
 503         * sim/m32r/cmp.cgs: Test CMP instruction.
 504         * sim/m32r/cmpi.cgs: Test CMPI instruction.
 505         * sim/m32r/cmpu.cgs: Test CMPU instruction.
 506         * sim/m32r/cmpui.cgs: Test CMPUI instruction.
 507         * sim/m32r/div.cgs: Test DIV instruction.
 508         * sim/m32r/divu.cgs: Test DIVU instruction.
 509         * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
 510         * sim/m32r/sll.cgs: Test SLL instruction.
 511         * sim/m32r/sll3.cgs: Test SLL3 instruction.
 512         * sim/m32r/slli.cgs: Test SLLI instruction.
 513         * sim/m32r/sra.cgs: Test SRA instruction.
 514         * sim/m32r/sra3.cgs: Test SRA3 instruction.
 515         * sim/m32r/srai.cgs: Test SRAI instruction.
 516         * sim/m32r/srl.cgs: Test SRL instruction.
 517         * sim/m32r/srl3.cgs: Test SRL3 instruction.
 518         * sim/m32r/srli.cgs: Test SRLI instruction.
 519         * sim/m32r/xor3.cgs: Test XOR3 instruction.
 520         * sim/m32r/xor.cgs: Test XOR instruction.
 521
 522 Tue Feb 17 12:46:05 1998  Doug Evans  <devans@seba.cygnus.com>
 523
 524         * config/default.exp: New file.
 525         * lib/sim-defs.exp: New file.
 526         * sim/m32r/*: m32r dejagnu simulator testsuite.
 527
 528         * Makefile.in (build_alias): Define.
 529         (arch): Define.
 530         (RUNTEST_FOR_TARGET): Delete.
 531         (RUNTEST): Fix.
 532         (check): Depend on site.exp.  Run dejagnu.
 533         (site.exp): New target.
 534         * configure.in (arch): Define from target_cpu.
 535         * configure: Regenerate.
 536
 537 Wed Sep 17 10:21:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 538
 539         * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
 540         (gen_mask): Ditto.
 541
 542         * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
 543         (calc): Add support for 8 bit version of macros.
 544         (main): Add tests for 8 bit versions of macros.
 545         (check_sext): Check SEXT of zero clears bits.
 546
 547         * common/bits-gen.c (main): Generate tests for 8 bit versions of
 548         macros.
 549
 550 Thu Sep 11 13:04:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 551
 552         * common/Make-common.in: New file, provide generic rules for
 553         running checks.
 554
 555 Mon Sep  1 16:43:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 556
 557         * configure.in (configdirs): Test for the target directory instead
 558         of matching on a target.
 559