sim/testsuite/bfin/c_cc_flagdreg_mvbrsft_s1.s

   1 //Original:/proj/frio/dv/testcases/core/c_cc_flagdreg_mvbrsft_s1/c_cc_flagdreg_mvbrsft_s1.dsp
   2 // Spec Reference: cc: set (ccflag & cc2dreg) used (ccmv & brcc & dsp32sft)
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         INIT_P_REGS 0;
   9
  10         imm32 r0, 0xa08d2311;
  11         imm32 r1, 0x10120040;
  12         imm32 r2, 0x62b61557;
  13         imm32 r3, 0x07300007;
  14         imm32 r4, 0x00740088;
  15         imm32 r5, 0x609950aa;
  16         imm32 r6, 0x20bb06cc;
  17         imm32 r7, 0xd90e108f;
  18
  19         ASTAT = R0;
  20
  21         CC = R1;                                        // cc2dreg
  22         R2.H = ( A1 = R2.L * R3.L ), A0 = R2.H * R3.L;  // dsp32mac
  23         IF CC R1 = R3;                                  // ccmov
  24         CC = ! CC;                                      // cc2dreg
  25         R4.H = R1.L + R0.L (S);                         // dsp32alu
  26         IF CC R3 = R2;                                  // ccmov
  27         CC = R0 < R1;                                   // ccflag
  28         R4.L = R5.L << 1;                               // dsp32shiftimm
  29         IF CC R4 = R5;                                  // ccmov
  30         CC = R2 == R3;                                  // ccflag
  31         R7 = R1.L * R4.L, R6 = R1.H * R4.H;             // dsp32mult
  32         IF CC R4 = R5;                                  // ccmov
  33         CC = R0;                                        // cc2dreg
  34         A1 = R2.L * R3.L, A0 += R2.L * R3.H;            // dsp32mac
  35         IF !CC JUMP LABEL1;                             // branch on
  36         CC = ! CC;                                      // cc2dreg
  37         P1.L = 0x3000;                                  // ldimmhalf
  38         IF !CC JUMP LABEL2 (BP);                        // branch
  39 LABEL1:
  40         R6 = R6 + R2;
  41         JUMP.S END;
  42 LABEL2:
  43         R7 = R5 - R7;
  44         CC = R0 < R1;   // ccflag
  45         P2 = A0.w;
  46         IF CC JUMP END (BP);    // branch
  47         P3 = A1.w;
  48         R5 = R5 + R7;
  49
  50 END:
  51
  52         CHECKREG r0, 0xA08D2311;
  53         CHECKREG r1, 0x07300007;
  54         CHECKREG r2, 0x00011557;
  55         CHECKREG r3, 0x07300007;
  56         CHECKREG r4, 0x609950AA;
  57         CHECKREG r5, 0x609950AA;
  58         CHECKREG r6, 0x056C9760;
  59         CHECKREG r7, 0x6094E75E;
  60         CHECKREG p1, 0x00003000;
  61         CHECKREG p2, 0x01382894;
  62         CHECKREG p3, 0x00000000;
  63
  64         imm32 r0, 0x408d2711;
  65         imm32 r1, 0x15124040;
  66         imm32 r2, 0x62661557;
  67         imm32 r3, 0x073b0007;
  68         imm32 r4, 0x01f49088;
  69         imm32 r5, 0x6e2959aa;
  70         imm32 r6, 0xa0b506cc;
  71         imm32 r7, 0x00000002;
  72
  73         CC = R1;        // cc2dreg
  74
  75         R2 = ROT R2 BY 1;       // dsp32shiftim_rot
  76         CC = ! CC;      // cc2dreg
  77         R3 >>= R7;      // alu2op sft
  78         R3 = ROT R0 BY -3;      // dsp32shiftim_rot
  79         CC = R0 < R1;   // ccflag
  80         R3 = ( A1 = R7.L * R4.L ),  R2 = ( A0 = R7.H * R4.H )  (S2RND); // dsp32mac pair
  81         R6 = ROT R4 BY 5;       // dsp32shiftim_rot
  82         CC = R2 == R3;  // ccflag
  83         P1 = R1;        // regmv
  84         IF CC R4 = R5;  // ccmov
  85         CC = R0;        // cc2dreg
  86         R1 = R0 +|- R1 , R6 = R0 -|+ R1 (ASR);  // dsp32alu sft
  87         R7 = ROT R6 BY R7.L;    // dsp32shiftim_rot
  88
  89         CHECKREG r0, 0x408D2711;
  90         CHECKREG r1, 0x2ACFF368;
  91         CHECKREG r2, 0x00000000;
  92         CHECKREG r3, 0xFFFC8440;
  93         CHECKREG r4, 0x01F49088;
  94         CHECKREG r5, 0x6E2959AA;
  95         CHECKREG r6, 0x15BD33A8;
  96         CHECKREG r7, 0x56F4CEA2;
  97         CHECKREG p1, 0x15124040;
  98
  99         pass