sim/testsuite/bfin/c_seq_wb_rtx_lsmmrj_mvp.S

   1 //Original:/proj/frio/dv/testcases/core/c_seq_wb_rtx_lsmmrj_mvp/c_seq_wb_rtx_lsmmrj_mvp.dsp
   2 // Spec Reference: sequencer:wb ( rtx ldst mmr jump regmv pushpopmultiple)
   3 # mach: bfin
   4 # sim: --environment operating
   5
   6 #include "test.h"
   7 .include "testutils.inc"
   8 start
   9
  10 include(std.inc)
  11 include(selfcheck.inc)
  12 include(gen_int.inc)
  13 INIT_R_REGS(0);
  14 INIT_P_REGS(0);
  15 INIT_I_REGS(0);     // initialize the dsp address regs
  16 INIT_M_REGS(0);
  17 INIT_L_REGS(0);
  18 INIT_B_REGS(0);
  19 //CHECK_INIT(p5, 0xe0000000);
  20 include(symtable.inc)
  21 CHECK_INIT_DEF(p5);
  22
  23 #ifndef STACKSIZE
  24 #define STACKSIZE 0x10
  25 #endif
  26 #ifndef EVT
  27 #define EVT  0xFFE02000
  28 #endif
  29 #ifndef EVT15
  30 #define EVT15  0xFFE0203C
  31 #endif
  32 #ifndef EVT_OVERRIDE
  33 #define EVT_OVERRIDE 0xFFE02100
  34 #endif
  35 #ifndef ITABLE
  36 #define ITABLE DATA_ADDR_1
  37 #endif
  38
  39 GEN_INT_INIT(ITABLE) // set location for interrupt table
  40
  41 //
  42 // Reset/Bootstrap Code
  43 //   (Here we should set the processor operating modes, initialize registers,
  44 //
  45
  46 BOOT:
  47
  48                               // in reset mode now
  49 LD32_LABEL(sp, KSTACK);   // setup the stack pointer
  50 FP = SP;        // and frame pointer
  51
  52 LD32(p0, EVT);      // Setup Event Vectors and Handlers
  53 LD32_LABEL(r0, EHANDLE);  // Emulation Handler (Int0)
  54     [ P0 ++ ] = R0;
  55
  56 LD32_LABEL(r0, RHANDLE);  // Reset Handler (Int1)
  57     [ P0 ++ ] = R0;
  58
  59 LD32_LABEL(r0, NHANDLE);  // NMI Handler (Int2)
  60     [ P0 ++ ] = R0;
  61
  62 LD32_LABEL(r0, XHANDLE);  // Exception Handler (Int3)
  63     [ P0 ++ ] = R0;
  64
  65     [ P0 ++ ] = R0;        // IVT4 not used
  66
  67 LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
  68     [ P0 ++ ] = R0;
  69
  70 LD32_LABEL(r0, THANDLE);  // Timer Handler (Int6)
  71     [ P0 ++ ] = R0;
  72
  73 LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
  74     [ P0 ++ ] = R0;
  75
  76 LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
  77     [ P0 ++ ] = R0;
  78
  79 LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
  80     [ P0 ++ ] = R0;
  81
  82 LD32_LABEL(r0, I10HANDLE);// IVG10 Handler
  83     [ P0 ++ ] = R0;
  84
  85 LD32_LABEL(r0, I11HANDLE);// IVG11 Handler
  86     [ P0 ++ ] = R0;
  87
  88 LD32_LABEL(r0, I12HANDLE);// IVG12 Handler
  89     [ P0 ++ ] = R0;
  90
  91 LD32_LABEL(r0, I13HANDLE);// IVG13 Handler
  92     [ P0 ++ ] = R0;
  93
  94 LD32_LABEL(r0, I14HANDLE);// IVG14 Handler
  95     [ P0 ++ ] = R0;
  96
  97 LD32_LABEL(r0, I15HANDLE);// IVG15 Handler
  98     [ P0 ++ ] = R0;
  99
 100 LD32(p0, EVT_OVERRIDE);
 101     R0 = 0;
 102     [ P0 ++ ] = R0;
 103     R0 = -1;     // Change this to mask interrupts (*)
 104     [ P0 ] = R0;   // IMASK
 105 CSYNC;
 106
 107 DUMMY:
 108
 109     R0 = 0 (Z);
 110
 111 LT0 = r0;       // set loop counters to something deterministic
 112 LB0 = r0;
 113 LC0 = r0;
 114 LT1 = r0;
 115 LB1 = r0;
 116 LC1 = r0;
 117
 118 ASTAT = r0;     // reset other internal regs
 119
 120 // The following code sets up the test for running in USER mode
 121
 122 LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a
 123                         // ReturnFromInterrupt (RTI)
 124 RETI = r0;      // We need to load the return address
 125
 126 // Comment the following line for a USER Mode test
 127
 128 JUMP    STARTSUP;   // jump to code start for SUPERVISOR mode
 129
 130 RTI;
 131
 132 STARTSUP:
 133 LD32_LABEL(p1, BEGIN);
 134
 135 LD32(p0, EVT15);
 136     [ P0 ] = P1;   // IVG15 (General) handler (Int 15) load with start
 137
 138 RAISE 15;   // after we RTI, INT 15 should be taken,& return to BEGIN in
 139                 // SUPERVISOR MODE & go to different RAISE in supervisor mode
 140                 // until the end of the test.
 141
 142 NOP;    // Workaround for Bug 217
 143 RTI;
 144
 145 //
 146 // The Main Program
 147 //
 148 STARTUSER:
 149 LD32_LABEL(sp, USTACK);   // setup the stack pointer
 150 FP = SP;            // set frame pointer
 151 JUMP BEGIN;
 152
 153 //*********************************************************************
 154
 155 BEGIN:
 156
 157                 // COMMENT the following line for USER MODE tests
 158     [ -- SP ] = RETI;  // enable interrupts in supervisor mode
 159
 160                 // **** YOUR CODE GOES HERE ****
 161
 162
 163
 164     // PUT YOUR TEST HERE!
 165 // PUSH
 166 LD32(p1, 0xFFE02034);       // wrt-rd     EVT13             = 0xFFE02034
 167 //LD32(p2, DATA_ADDR_1);
 168 loadsym P2, DATA;
 169 LD32(p3, 0xab5fd490);
 170 LD32(p4, 0xa581bd94);
 171
 172 LD32(r2, 0x14789232);
 173     [ P1 ] = R2;
 174         R0 = 0x01;
 175         R1 = 0x02;
 176         R2 = 0x03;
 177         R3 = 0x04;
 178         R4 = 0x05;
 179         R5 = 0x06;
 180         R6 = 0x07;
 181         R7 = 0x08;
 182         [ -- SP ] = ( R7:0 );
 183 RAISE 2;    // RTN
 184     R0 = [ P2 ++ ];
 185     R1 = [ P1 ];
 186 JUMP.S LABEL1;
 187     P3 = R7;
 188     R4 = P3;
 189         [ -- SP ] = ( R7:0 );
 190         R1 = 0x12;
 191         R2 = 0x13;
 192         R3 = 0x14;
 193         R4 = 0x15;
 194         R5 = 0x16;
 195         R6 = 0x17;
 196         R7 = 0x18;
 197
 198 LABEL1:
 199 RAISE 5;    // RTI
 200     R2 = [ P2 ++ ];
 201
 202     P4 = R6;
 203     R3 = P4;
 204
 205         [ -- SP ] = ( R7:0 );
 206
 207         R2 = 0x23;
 208         R3 = 0x24;
 209         R4 = 0x25;
 210         R5 = 0x26;
 211         R6 = 0x27;
 212         R7 = 0x28;
 213
 214 // wrt-rd     EVT5              = 0xFFE02034
 215 LD32(p1, 0xFFE02034);       // wrt-rd     EVT13             = 0xFFE02034
 216 RAISE 6;    // RTI
 217     R4 = [ P2 ++ ];
 218     R6 = [ P1 ];
 219 JUMP.S LABEL2;
 220     P3 = R3;
 221     R5 = P3;
 222         [ -- SP ] = ( R7:0 );
 223 // POP
 224         R0 = 0x00;
 225         R1 = 0x00;
 226         R2 = 0x00;
 227         R3 = 0x00;
 228         R4 = 0x00;
 229         R5 = 0x00;
 230         R6 = 0x00;
 231         R7 = 0x00;
 232
 233 LABEL2:
 234 CSYNC;
 235 CHECKREG(r0, 0x00010203);
 236 CHECKREG(r1, 0x14789234);
 237 CHECKREG(r2, 0x00000024);
 238 CHECKREG(r3, 0x00000025);
 239 CHECKREG(r4, 0x08090A0B);
 240 CHECKREG(r5, 0x00000027);
 241 CHECKREG(r6, 0x14789232);
 242 RAISE 7;    // RTI
 243     R0 = [ P2 ++ ];
 244     R1 = [ P1 ];
 245     P4 = R4;
 246     R2 = P4;
 247         ( R7:0 ) = [ SP ++ ];
 248
 249
 250
 251 CHECKREG(r0, 0x00010203);
 252 CHECKREG(r1, 0x14789233);
 253 CHECKREG(r2, 0x04050607);
 254 CHECKREG(r3, 0x00000008);
 255 //CHECKREG(r4, 0x000002CC);
 256 CHECKREG(r5, 0x00000007);
 257 CHECKREG(r6, 0x00000008);
 258 CHECKREG(r7, 0x00000009);
 259 // wrt-rd     EVT13             = 0xFFE02034
 260 LD32(p1, 0xFFE02034);
 261 RAISE 8;    // RTI
 262     R0 = [ P2 ++ ];
 263     R1 = [ P1 ];
 264 JUMP.S LABEL3;
 265     P1 = R5;
 266     R6 = P1;
 267         ( R7:0 ) = [ SP ++ ];
 268 //CHECKREG(r0, 0x000000a1);  // CHECKREG can not be skipped
 269 //CHECKREG(r1, 0x000000b2);  // so they cannot appear here
 270 //CHECKREG(r2, 0x000000c3);
 271 //CHECKREG(r3, 0x000000d4);
 272 //CHECKREG(r4, 0x000000e5);
 273 //CHECKREG(r5, 0x000000f6);
 274 //CHECKREG(r6, 0x00000017);
 275 //CHECKREG(r7, 0x00000028);
 276    R0 = 12;
 277    R1 = 13;
 278    R2 = 14;
 279    R3 = 15;
 280    R4 = 16;
 281    R5 = 17;
 282    R6 = 18;
 283    R7 = 19;
 284
 285
 286 LABEL3:
 287 CSYNC;
 288 CHECKREG(r0, 0x10111213);
 289 CHECKREG(r1, 0x14789232);
 290 CHECKREG(r2, 0x04050608);
 291 CHECKREG(r3, 0x00000009);
 292 //CHECKREG(r4, 0x000002E4);
 293 CHECKREG(r5, 0x00000008);
 294 CHECKREG(r6, 0x00000009);
 295 CHECKREG(r7, 0x0000000A);
 296 RAISE 9;    // RTI
 297     P3 = R6;
 298     R7 = P3;
 299         ( R7:0 ) = [ SP ++ ];
 300
 301 CHECKREG(r0, 0x00000001);
 302 CHECKREG(r1, 0x00000002);
 303 CHECKREG(r2, 0x00000003);
 304 CHECKREG(r3, 0x00000004);
 305 CHECKREG(r4, 0x00000005);
 306 CHECKREG(r5, 0x00000006);
 307 CHECKREG(r6, 0x00000007);
 308 CHECKREG(r7, 0x00000008);
 309 R0 = I0;
 310 R1 = I1;
 311 R2 = I2;
 312 R3 = I3;
 313 CHECKREG(r0, 0x00000006);
 314 CHECKREG(r1, 0x00000002);
 315 CHECKREG(r2, 0x00000002);
 316 CHECKREG(r3, 0x00000002);
 317
 318
 319 END:
 320 dbg_pass;            // End the test
 321
 322 //*********************************************************************
 323
 324 //
 325 // Handlers for Events
 326 //
 327
 328 EHANDLE:            // Emulation Handler 0
 329 RTE;
 330
 331 RHANDLE:            // Reset Handler 1
 332 RTI;
 333
 334 NHANDLE:            // NMI Handler 2
 335     I0 += 2;
 336 RTN;
 337
 338 XHANDLE:            // Exception Handler 3
 339 R4 = RETX;   // error handler: RETX has the address of the same Illegal instr
 340     R1 += 1;
 341     R2 += 1;
 342     R3 += 1;
 343     R5 += 1;
 344     R6 += 1;
 345     R7 += 1;
 346 R4 += 4;     // we have to add 4 to point to next instr after return
 347 RETX = R4;
 348 RTX;
 349     //  ***********
 350     R0 = [ P2 ++ ];
 351     R1 = [ P1 ];
 352 JUMP.S LABEL3;
 353     P1 = R5;
 354     R6 = P1;
 355         ( R7:0 ) = [ SP ++ ];
 356     //  ***********
 357
 358 HWHANDLE:           // HW Error Handler 5
 359 .dd 0xFFFFFFFF
 360     I1 += 2;
 361 RTI;
 362
 363 THANDLE:            // Timer Handler 6
 364 .dd 0xFFFFFFFF
 365     I2 += 2;
 366 RTI;
 367
 368 I7HANDLE:           // IVG 7 Handler
 369 .dd 0xFFFFFFFF
 370     I3 += 2;
 371 RTI;
 372 I8HANDLE:           // IVG 8 Handler
 373 .dd 0xFFFFFFFF
 374     I0 += 2;
 375 RTI;
 376
 377 I9HANDLE:           // IVG 9 Handler
 378 .dd 0xFFFFFFFF
 379     I0 += 2;
 380 RTI;
 381
 382 I10HANDLE:          // IVG 10 Handler
 383     R7 = 10;
 384 RTI;
 385
 386 I11HANDLE:          // IVG 11 Handler
 387     I0 = R0;
 388     I1 = R1;
 389     I2 = R2;
 390     I3 = R3;
 391     M0 = R4;
 392     R0 = 11;
 393 RTI;
 394
 395 I12HANDLE:          // IVG 12 Handler
 396     R1 = 12;
 397 RTI;
 398
 399 I13HANDLE:          // IVG 13 Handler
 400     R2 = 13;
 401 RTI;
 402
 403 I14HANDLE:          // IVG 14 Handler
 404     R3 = 14;
 405 RTI;
 406
 407 I15HANDLE:          // IVG 15 Handler
 408     R4 = 15;
 409 RTI;
 410
 411 NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug
 412
 413 //
 414 // Data Segment
 415 //
 416
 417 .section MEM_DATA_ADDR_1,"aw"
 418 DATA:
 419 //  .space (0x10);
 420 .dd 0x00010203
 421 .dd 0x04050607
 422 .dd 0x08090A0B
 423 .dd 0x0C0D0E0F
 424 .dd 0x10111213
 425 .dd 0x14151617
 426 .dd 0x18191A1B
 427 .dd 0x1C1D1E1F
 428 .dd 0x11223344
 429 .dd 0x55667788
 430 .dd 0x99717273
 431 .dd 0x74757677
 432 .dd 0x82838485
 433 .dd 0x86878889
 434 .dd 0x80818283
 435 .dd 0x84858687
 436 .dd 0x01020304
 437 .dd 0x05060708
 438 .dd 0x09101112
 439 .dd 0x14151617
 440 .dd 0x18192021
 441
 442
 443 // Stack Segments (Both Kernel and User)
 444
 445     .space (STACKSIZE);
 446 KSTACK:
 447
 448     .space (STACKSIZE);
 449 USTACK:
 450
 451 .section MEM_DATA_ADDR_2,"aw"
 452 .dd 0x20212223
 453 .dd 0x24252627
 454 .dd 0x28292A2B
 455 .dd 0x2C2D2E2F
 456 .dd 0x30313233
 457 .dd 0x34353637
 458 .dd 0x38393A3B
 459 .dd 0x3C3D3E3F
 460 .dd 0x91929394
 461 .dd 0x95969798
 462 .dd 0x99A1A2A3
 463 .dd 0xA5A6A7A8
 464 .dd 0xA9B0B1B2
 465 .dd 0xB3B4B5B6
 466 .dd 0xB7B8B9C0