sim: example-synacor: a simple implementation for reference
[deliverable/binutils-gdb.git] / sim / testsuite / example-synacor / mem.s
1 # check the RMEM & WMEM insns.
2 # mach: example
3
4 .include "testutils.inc"
5
6 start
7 JMP 14
8 HALT
9 pass
10
11 # Read a constant address.
12 RMEM r0, 1
13 EQ r1, r0, 14
14 JF r1, 2
15
16 # Change the first JMP to skip HALT and hit the pass.
17 WMEM 1, 3
18
19 # Read an address in a register.
20 SET r2, 1
21 RMEM r0, r2
22 EQ r1, r0, 3
23 JF r1, 2
24
25 JMP 0
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