sim/testsuite/sim/bfin/c_br_preg_killed_ex1.s

   1 //Original:/testcases/seq/c_br_preg_killed_ex1/c_br_preg_killed_ex1.dsp
   2 // Spec Reference: brcc kills  data cache hits
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         imm32 r0, 0x00000000;
   9         imm32 r1, 0x00000001;
  10         imm32 r2, 0x00000002;
  11         imm32 r3, 0x00000003;
  12         imm32 r4, 0x00000004;
  13         imm32 r5, 0x00000005;
  14         imm32 r6, 0x00000006;
  15         imm32 r7, 0x00000007;
  16         imm32 p1, 0x00000011;
  17         imm32 p2, 0x00000012;
  18 .ifndef BFIN_HOST
  19         imm32 p3, 0x00000013;
  20 .endif
  21         imm32 p4, 0x00000014;
  22
  23         P2 = 4;
  24         loadsym p5, DATA0;
  25         loadsym I0, DATA1;
  26
  27 begin:
  28         ASTAT = R0;     // clear CC
  29         IF !CC JUMP LABEL1;     // (bp);
  30         CC = R4 < R5;   // CC FLAG   killed
  31         R1 = 21;
  32 LABEL1:
  33         JUMP ( PC + P2 );       //brf LABEL2;  // (bp);
  34         CC = ! CC;
  35 LABEL2:
  36         IF !CC JUMP LABEL3;     //  (bp);
  37         R2 = - R2;      // ALU2op    killed
  38 LABEL3:
  39         IF !CC JUMP LABEL4;
  40         R3 <<= 2;       // LOGI2op   killed
  41 LABEL4:
  42         IF !CC JUMP LABEL5;
  43         R0 = R1 + R2;   // COMP3op   killed
  44 LABEL5:
  45         IF !CC JUMP LABEL6;
  46         R4 += 3;        // COMPI2opD killed
  47 LABEL6:
  48         IF !CC JUMP LABEL7;     // (bp);
  49         R5 = 25;        // LDIMMHALF killed
  50 LABEL7:
  51         IF !CC JUMP LABEL8;
  52         R6 = CC;        // CC2REG    killed
  53 LABEL8:
  54         IF !CC JUMP LABEL9;
  55         JUMP.S BAD1;    // UJUMP     killed
  56 LABEL9:
  57         IF !CC JUMP LABELCHK1;
  58 BAD1:
  59         R7 = [ P5 ];    // LDST      killed
  60
  61 LABELCHK1:
  62         CHECKREG r0, 0x00000000;
  63         CHECKREG r1, 0x00000001;
  64         CHECKREG r2, 0x00000002;
  65         CHECKREG r3, 0x00000003;
  66         CHECKREG r4, 0x00000004;
  67         CHECKREG r5, 0x00000005;
  68         CHECKREG r6, 0x00000006;
  69         CHECKREG r7, 0x00000007;
  70
  71         pass
  72
  73         .data
  74 DATA0:
  75         .dd 0x000a0000
  76         .dd 0x000b0001
  77         .dd 0x000c0002
  78         .dd 0x000d0003
  79         .dd 0x000e0004
  80
  81 DATA1:
  82         .dd 0x00f00100
  83         .dd 0x00e00101
  84         .dd 0x00d00102
  85         .dd 0x00c00103