sim: bfin: import testsuite
[deliverable/binutils-gdb.git] / sim / testsuite / sim / bfin / c_dsp32alu_rl_rnd12_m.s
1 //Original:/proj/frio/dv/testcases/core/c_dsp32alu_rl_rnd12_m/c_dsp32alu_rl_rnd12_m.dsp
2 // Spec Reference: dsp32alu dreg (half)
3 # mach: bfin
4
5 .include "testutils.inc"
6 start
7
8 R0 = 0;
9 ASTAT = R0;
10
11 imm32 r0, 0x85678911;
12 imm32 r1, 0x9189ab1d;
13 imm32 r2, 0xa4245515;
14 imm32 r3, 0xb6637717;
15 imm32 r4, 0xc678491b;
16 imm32 r5, 0x6789a51d;
17 imm32 r6, 0xe4445565;
18 imm32 r7, 0x86667777;
19 R0.L = R0 - R0 (RND12);
20 R1.L = R0 - R1 (RND12);
21 R2.L = R0 - R2 (RND12);
22 R3.L = R0 - R3 (RND12);
23 R4.L = R0 - R4 (RND12);
24 R5.L = R0 - R5 (RND12);
25 R6.L = R0 - R6 (RND12);
26 R7.L = R0 - R7 (RND12);
27 CHECKREG r0, 0x85670000;
28 CHECKREG r1, 0x91898000;
29 CHECKREG r2, 0xA4248000;
30 CHECKREG r3, 0xB6638000;
31 CHECKREG r4, 0xC6788000;
32 CHECKREG r5, 0x67898000;
33 CHECKREG r6, 0xE4448000;
34 CHECKREG r7, 0x8666F009;
35
36 imm32 r0, 0x75678921;
37 imm32 r1, 0x2789ab14;
38 imm32 r2, 0xd4745515;
39 imm32 r3, 0x4d677767;
40 imm32 r4, 0x56d8791b;
41 imm32 r5, 0x678dab1d;
42 imm32 r6, 0x74445515;
43 imm32 r7, 0x86a6d777;
44 R0.L = R1 - R0 (RND12);
45 R1.L = R1 - R1 (RND12);
46 R2.L = R1 - R2 (RND12);
47 R3.L = R1 - R3 (RND12);
48 R4.L = R1 - R4 (RND12);
49 R5.L = R1 - R5 (RND12);
50 R6.L = R1 - R6 (RND12);
51 R7.L = R1 - R7 (RND12);
52 CHECKREG r0, 0x75678000;
53 CHECKREG r1, 0x27890000;
54 CHECKREG r2, 0xD4747FFF;
55 CHECKREG r3, 0x4D678000;
56 CHECKREG r4, 0x56D88000;
57 CHECKREG r5, 0x678D8000;
58 CHECKREG r6, 0x74448000;
59 CHECKREG r7, 0x86A67fff;
60
61 imm32 r0, 0x55678911;
62 imm32 r1, 0x2689ab1d;
63 imm32 r2, 0x3d445515;
64 imm32 r3, 0x46967717;
65 imm32 r4, 0xa67a891b;
66 imm32 r5, 0x6789bb1d;
67 imm32 r6, 0x7444d515;
68 imm32 r7, 0x8666c777;
69 R0.L = R2 - R0 (RND12);
70 R1.L = R2 - R1 (RND12);
71 R2.L = R2 - R2 (RND12);
72 R3.L = R2 - R3 (RND12);
73 R4.L = R2 - R4 (RND12);
74 R5.L = R2 - R5 (RND12);
75 R6.L = R2 - R6 (RND12);
76 R7.L = R2 - R7 (RND12);
77 CHECKREG r0, 0x55678000;
78 CHECKREG r1, 0x26897fff;
79 CHECKREG r2, 0x3D440000;
80 CHECKREG r3, 0x46968000;
81 CHECKREG r4, 0xA67A7fff;
82 CHECKREG r5, 0x67898000;
83 CHECKREG r6, 0x74448000;
84 CHECKREG r7, 0x86667fff;
85
86 imm32 r0, 0xf5678911;
87 imm32 r1, 0xd789ab1d;
88 imm32 r2, 0x34445515;
89 imm32 r3, 0xe6667717;
90 imm32 r4, 0x5678891b;
91 imm32 r5, 0x6d89ab1d;
92 imm32 r6, 0x7444d515;
93 imm32 r7, 0xe6667b77;
94 R0.L = R3 - R0 (RND12);
95 R1.L = R3 - R1 (RND12);
96 R2.L = R3 - R2 (RND12);
97 R3.L = R3 - R3 (RND12);
98 R4.L = R3 - R4 (RND12);
99 R5.L = R3 - R5 (RND12);
100 R6.L = R3 - R6 (RND12);
101 R7.L = R3 - R7 (RND12);
102 CHECKREG r0, 0xF5678000;
103 CHECKREG r1, 0xD7897fff;
104 CHECKREG r2, 0x34448000;
105 CHECKREG r3, 0xE6660000;
106 CHECKREG r4, 0x56788000;
107 CHECKREG r5, 0x6D898000;
108 CHECKREG r6, 0x74448000;
109 CHECKREG r7, 0xE666FFF8;
110
111 imm32 r0, 0xa5678911;
112 imm32 r1, 0x2b89ab1d;
113 imm32 r2, 0x34c45515;
114 imm32 r3, 0x46d67717;
115 imm32 r4, 0x56e8891b;
116 imm32 r5, 0x67f9ab1d;
117 imm32 r6, 0x74445515;
118 imm32 r7, 0x86687777;
119 R0.L = R4 - R0 (RND12);
120 R1.L = R4 - R1 (RND12);
121 R2.L = R4 - R2 (RND12);
122 R3.L = R4 - R3 (RND12);
123 R4.L = R4 - R4 (RND12);
124 R5.L = R4 - R5 (RND12);
125 R6.L = R4 - R6 (RND12);
126 R7.L = R4 - R7 (RND12);
127 CHECKREG r0, 0xa5677fff;
128 CHECKREG r1, 0x2b897fff;
129 CHECKREG r2, 0x34c47fff;
130 CHECKREG r3, 0x46d67fff;
131 CHECKREG r4, 0x56E80000;
132 CHECKREG r5, 0x67F98000;
133 CHECKREG r6, 0x74448000;
134 CHECKREG r7, 0x86687fff;
135
136 imm32 r0, 0xe5678911;
137 imm32 r1, 0x2789ab1d;
138 imm32 r2, 0x34445515;
139 imm32 r3, 0xd6667717;
140 imm32 r4, 0x5ff8891b;
141 imm32 r5, 0x6789ab1d;
142 imm32 r6, 0x744e5515;
143 imm32 r7, 0x8666a7b7;
144 R0.L = R5 - R0 (RND12);
145 R1.L = R5 - R1 (RND12);
146 R2.L = R5 - R2 (RND12);
147 R3.L = R5 - R3 (RND12);
148 R4.L = R5 - R4 (RND12);
149 R5.L = R5 - R5 (RND12);
150 R6.L = R5 - R6 (RND12);
151 R7.L = R5 - R7 (RND12);
152 CHECKREG r0, 0xE5677fff;
153 CHECKREG r1, 0x27897fff;
154 CHECKREG r2, 0x34447fff;
155 CHECKREG r3, 0xD6667fff;
156 CHECKREG r4, 0x5FF87912;
157 CHECKREG r5, 0x67890000;
158 CHECKREG r6, 0x744E8000;
159 CHECKREG r7, 0x86667fff;
160
161 imm32 r0, 0x15678911;
162 imm32 r1, 0x2789ae1d;
163 imm32 r2, 0x344455e5;
164 imm32 r3, 0x4666771d;
165 imm32 r4, 0x5678891b;
166 imm32 r5, 0x6789abdd;
167 imm32 r6, 0x74a45515;
168 imm32 r7, 0x866c77b7;
169 R0.L = R6 - R0 (RND12);
170 R1.L = R6 - R1 (RND12);
171 R2.L = R6 - R2 (RND12);
172 R3.L = R6 - R3 (RND12);
173 R4.L = R6 - R4 (RND12);
174 R5.L = R6 - R5 (RND12);
175 R6.L = R6 - R6 (RND12);
176 R7.L = R6 - R7 (RND12);
177 CHECKREG r0, 0x15677fff;
178 CHECKREG r1, 0x27897fff;
179 CHECKREG r2, 0x34447fff;
180 CHECKREG r3, 0x46667fff;
181 CHECKREG r4, 0x56787fff;
182 CHECKREG r5, 0x67897fff;
183 CHECKREG r6, 0x74A40000;
184 CHECKREG r7, 0x866C7fff;
185
186 imm32 r0, 0x25678911;
187 imm32 r1, 0x2389ab1d;
188 imm32 r2, 0x34445515;
189 imm32 r3, 0x46567717;
190 imm32 r4, 0x5678891b;
191 imm32 r5, 0x678dab1d;
192 imm32 r6, 0x7444b515;
193 imm32 r7, 0xb666a777;
194 R0.L = R7 - R0 (RND12);
195 R1.L = R7 - R1 (RND12);
196 R2.L = R7 - R2 (RND12);
197 R3.L = R7 - R3 (RND12);
198 R4.L = R7 - R4 (RND12);
199 R5.L = R7 - R5 (RND12);
200 R6.L = R7 - R6 (RND12);
201 R7.L = R7 - R7 (RND12);
202 CHECKREG r0, 0x25678000;
203 CHECKREG r1, 0x23898000;
204 CHECKREG r2, 0x34448000;
205 CHECKREG r3, 0x46568000;
206 CHECKREG r4, 0x56788000;
207 CHECKREG r5, 0x678D8000;
208 CHECKREG r6, 0x74448000;
209 CHECKREG r7, 0xB6660000;
210
211 imm32 r0, 0xaa678911;
212 imm32 r1, 0x27ddab1d;
213 imm32 r2, 0x344bb515;
214 imm32 r3, 0x46667717;
215 imm32 r4, 0x56dd891b;
216 imm32 r5, 0x6789ab1d;
217 imm32 r6, 0x7444bb15;
218 imm32 r7, 0x86ff7777;
219 R6.L = R2 - R3 (RND12);
220 R1.L = R4 - R5 (RND12);
221 R5.L = R7 - R2 (RND12);
222 R3.L = R0 - R0 (RND12);
223 R0.L = R3 - R4 (RND12);
224 R2.L = R5 - R7 (RND12);
225 R7.L = R6 - R7 (RND12);
226 R4.L = R1 - R6 (RND12);
227 CHECKREG r0, 0xAA678000;
228 CHECKREG r1, 0x27DD8000;
229 CHECKREG r2, 0x344B7fff;
230 CHECKREG r3, 0x46660000;
231 CHECKREG r4, 0x56DD8000;
232 CHECKREG r5, 0x67898000;
233 CHECKREG r6, 0x74448000;
234 CHECKREG r7, 0x86FF7fff;
235
236 imm32 r0, 0x95678911;
237 imm32 r1, 0x2d89ab1d;
238 imm32 r2, 0x34b45515;
239 imm32 r3, 0x46c67717;
240 imm32 r4, 0x567e891b;
241 imm32 r5, 0x678fab1d;
242 imm32 r6, 0x744e5515;
243 imm32 r7, 0x8b66a777;
244 R3.L = R4 - R0 (RND12);
245 R1.L = R6 - R3 (RND12);
246 R4.L = R3 - R2 (RND12);
247 R6.L = R7 - R1 (RND12);
248 R2.L = R5 - R4 (RND12);
249 R7.L = R2 - R7 (RND12);
250 R0.L = R1 - R6 (RND12);
251 R5.L = R0 - R5 (RND12);
252 CHECKREG r0, 0x95678000;
253 CHECKREG r1, 0x2D897fff;
254 CHECKREG r2, 0x34B47fff;
255 CHECKREG r3, 0x46C67fff;
256 CHECKREG r4, 0x567E7fff;
257 CHECKREG r5, 0x678F8000;
258 CHECKREG r6, 0x744E8000;
259 CHECKREG r7, 0x8B667FFF;
260
261 pass
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