1 //Original:/testcases/core/c_dsp32mac_dr_a0_m/c_dsp32mac_dr_a0_m.dsp
2 // Spec Reference: dsp32mac dr_a0 m
5 .include "testutils.inc"
22 // The result accumulated in A1 , and stored to a reg half
31 A1 -= R1.L * R0.L, R0.L = ( A0 = R1.L * R0.L );
33 A1 = R2.L * R3.H, R2.L = ( A0 -= R2.H * R3.L );
35 A1 = R4.H * R5.L, R4.L = ( A0 += R4.H * R5.H );
37 A1 = R6.H * R7.H, R6.L = ( A0 = R6.L * R7.H );
39 CHECKREG r0, 0x1354FF22;
40 CHECKREG r1, 0xFF221DD6;
41 CHECKREG r2, 0xA124FF27;
42 CHECKREG r3, 0xFF274DDE;
43 CHECKREG r4, 0xEFBCFCD7;
44 CHECKREG r5, 0xFCD701B6;
45 CHECKREG r6, 0x000C000B;
46 CHECKREG r7, 0x000A846C;
48 // The result accumulated in A1, and stored to a reg half (MNOP)
57 R0.L = ( A0 += R6.L * R7.L );
59 R2.L = ( A0 -= R2.L * R3.H );
61 R4.L = ( A0 += R4.H * R5.L );
63 R6.L = ( A0 = R0.H * R1.H );
65 CHECKREG r0, 0x1354000B;
66 CHECKREG r1, 0x000A85F2;
67 CHECKREG r2, 0xA1240006;
68 CHECKREG r3, 0x00067846;
69 CHECKREG r4, 0xEFBC0005;
70 CHECKREG r5, 0x0005126E;
71 CHECKREG r6, 0x000C0002;
72 CHECKREG r7, 0x00018290;
74 // The result accumulated in A1 , and stored to a reg half (MNOP)
83 R0.L = ( A0 = R1.L * R0.L );
85 R2.L = ( A0 += R2.H * R3.L );
87 R4.L = ( A0 += R4.H * R5.H );
89 R6.L = ( A0 += R6.L * R7.H );
91 CHECKREG r0, 0x1354FF22;
92 CHECKREG r1, 0xFF221DD6;
93 CHECKREG r2, 0xA124FF1D;
94 CHECKREG r3, 0xFF1CEDCE;
95 CHECKREG r4, 0xEFBCFCCD;
96 CHECKREG r5, 0xFCCCA1A6;
97 CHECKREG r6, 0x000CFCD7;
98 CHECKREG r7, 0xFCD72612;
100 // The result accumulated in A1 , and stored to a reg half
101 imm32 r0, 0x13545abd;
102 imm32 r1, 0xadbcfec7;
103 imm32 r2, 0xa1245679;
104 imm32 r3, 0x00060007;
105 imm32 r4, 0xefbc4569;
106 imm32 r5, 0x1235000b;
107 imm32 r6, 0x000c000d;
108 imm32 r7, 0x678e000f;
109 A1 = R1.L * R0.L (M), R6.L = ( A0 -= R1.L * R0.L );
111 A1 -= R2.L * R3.H (M), R2.L = ( A0 += R2.H * R3.L );
113 A1 = R4.H * R5.L (M), R4.L = ( A0 = R4.H * R5.H );
115 A1 -= R6.H * R7.H (M), R0.L = ( A0 = R6.L * R7.H );
117 CHECKREG r0, 0x1354000B;
118 CHECKREG r1, 0x000A83F2;
119 CHECKREG r2, 0xA124FDB0;
120 CHECKREG r3, 0xFDAFD834;
121 CHECKREG r4, 0xEFBCFDB0;
122 CHECKREG r5, 0xFDAFB3D8;
123 CHECKREG r6, 0x000CFDB5;
124 CHECKREG r7, 0xFDB5083C;