1 //Original:/testcases/core/c_dsp32mac_dr_a1_m/c_dsp32mac_dr_a1_m.dsp
2 // Spec Reference: dsp32mac dr a1 m
5 .include "testutils.inc"
22 // The result accumulated in A1 , and stored to a reg half
31 R0.H = ( A1 += R1.L * R0.L ), A0 = R1.L * R0.L;
33 R2.H = ( A1 = R2.L * R3.H ), A0 = R2.H * R3.L;
35 R4.H = ( A1 = R4.H * R5.L ), A0 += R4.H * R5.H;
37 R6.H = ( A1 += R6.H * R7.H ), A0 += R6.L * R7.H;
39 CHECKREG r0, 0xFF225ABD;
40 CHECKREG r1, 0xFF221DD6;
41 CHECKREG r2, 0x00045679;
42 CHECKREG r3, 0x00040DAC;
43 CHECKREG r4, 0xFFFF4569;
44 CHECKREG r5, 0xFFFE9A28;
45 CHECKREG r6, 0x0008000D;
46 CHECKREG r7, 0x00084F78;
48 // The result accumulated in A1, and stored to a reg half (MNOP)
57 R0.H = ( A1 += R1.L * R0.L );
59 R2.H = ( A1 = R2.L * R3.H );
61 R4.H = ( A1 += R4.H * R5.L );
63 R6.H = ( A1 = R6.H * R7.H );
65 CHECKREG r0, 0xFF2A5ABD;
66 CHECKREG r1, 0xFF2A6D4E;
67 CHECKREG r2, 0x00045679;
68 CHECKREG r3, 0x00040DAC;
69 CHECKREG r4, 0x00034569;
70 CHECKREG r5, 0x0002A7D4;
71 CHECKREG r6, 0x000A000D;
72 CHECKREG r7, 0x0009B550;
74 // The result accumulated in A1 , and stored to a reg half (MNOP)
83 R0.H = A1 , A0 += R1.L * R0.L;
85 R2.H = A1 , A0 = R2.H * R3.L;
87 R4.H = A1 , A0 = R4.H * R5.H;
89 R6.H = A1 , A0 += R6.L * R7.H;
91 CHECKREG r0, 0x000A5ABD;
92 CHECKREG r1, 0x0009B550;
93 CHECKREG r2, 0x000A5679;
94 CHECKREG r3, 0x0009B550;
95 CHECKREG r4, 0x000A4569;
96 CHECKREG r5, 0x0009B550;
97 CHECKREG r6, 0x000A000D;
98 CHECKREG r7, 0x0009B550;
100 // The result accumulated in A1 , and stored to a reg half
101 imm32 r0, 0x13545abd;
102 imm32 r1, 0xadbcfec7;
103 imm32 r2, 0xa1245679;
104 imm32 r3, 0x00060007;
105 imm32 r4, 0xefbc4569;
106 imm32 r5, 0x1235000b;
107 imm32 r6, 0x000c000d;
108 imm32 r7, 0x678e000f;
109 R4.H = ( A1 += R1.L * R0.L ) (M), A0 = R1.L * R0.L;
111 R6.H = ( A1 = R2.L * R3.H ) (M), A0 += R2.H * R3.L;
113 R0.H = ( A1 = R4.H * R5.L ) (M), A0 = R4.H * R5.H;
115 R2.H = ( A1 = R6.H * R7.H ) (M), A0 += R6.L * R7.H;
117 CHECKREG r0, 0xFFB35ABD;
118 CHECKREG r1, 0xFFB294B9;
119 CHECKREG r2, 0x00005679;
120 CHECKREG r3, 0x00000004;
121 CHECKREG r4, 0xFF9B4569;
122 CHECKREG r5, 0xFF9AC43B;
123 CHECKREG r6, 0x0002000D;
125 CHECKREG r7, 0x000206D6;
127 // The result accumulated in A1 MM=0, and stored to a reg half (MNOP)
128 imm32 r0, 0x83545abd;
129 imm32 r1, 0xa8bcfec7;
130 imm32 r2, 0xc1845679;
131 imm32 r3, 0x1c080007;
132 imm32 r4, 0xe1cc8569;
133 imm32 r5, 0x121c080b;
134 imm32 r6, 0x7001008d;
135 imm32 r7, 0x678e1008;
136 R6.H = ( A1 += R1.L * R0.L ) (M);
138 R2.H = ( A1 = R2.L * R3.H ) (M);
140 R0.H = ( A1 += R4.H * R5.L ) (M);
142 R4.H = ( A1 = R6.H * R7.H ) (M);
144 CHECKREG r0, 0x08855ABD;
145 CHECKREG r1, 0x0885038C;
146 CHECKREG r2, 0x09785679;
147 CHECKREG r3, 0x0977EFC8;
148 CHECKREG r4, 0xFF918569;
149 CHECKREG r5, 0xFF913021;
150 CHECKREG r6, 0xFF91008D;
151 CHECKREG r7, 0xFF910EEF;
153 imm32 r0, 0x03545abd;
154 imm32 r1, 0xa0bcfec7;
155 imm32 r2, 0xa1045679;
156 imm32 r3, 0x00000007;
157 imm32 r4, 0xefbc0569;
158 imm32 r5, 0x1235100b;
159 imm32 r6, 0x000c020d;
160 imm32 r7, 0x678e003f;
161 R4.H = ( A1 -= R1.L * R0.L ) (M), A0 -= R1.L * R0.L;
163 R6.H = ( A1 -= R2.L * R3.H ) (M), A0 += R2.H * R3.L;
165 R0.H = ( A1 += R4.H * R5.L ) (M), A0 -= R4.H * R5.H;
167 R2.H = ( A1 -= R6.H * R7.H ) (M), A0 -= R6.L * R7.H;
169 CHECKREG r0, 0x00005ABD;
170 CHECKREG r1, 0x00002136;
171 CHECKREG r2, 0x00005679;
172 CHECKREG r3, 0x00002136;
173 CHECKREG r4, 0x00000569;
174 CHECKREG r5, 0x00002136;
175 CHECKREG r6, 0x0000020D;
176 CHECKREG r7, 0x00002136;
178 // The result accumulated in A1 MM=0, and stored to a reg half (MNOP)
179 imm32 r0, 0x83545abd;
180 imm32 r1, 0xa8bcfec7;
181 imm32 r2, 0xc1845679;
182 imm32 r3, 0x1c080007;
183 imm32 r4, 0xe1cc8569;
184 imm32 r5, 0x121c080b;
185 imm32 r6, 0x7001008d;
186 imm32 r7, 0x678e1008;
187 R6.H = ( A1 -= R1.L * R0.L ) (M);
189 R2.H = ( A1 -= R2.L * R3.H ) (M);
191 R0.H = ( A1 -= R4.H * R5.L ) (M);
193 R4.H = ( A1 -= R6.H * R7.H ) (M);
195 CHECKREG r0, 0xF7EA5ABD;
196 CHECKREG r1, 0xF7EA0EBF;
197 CHECKREG r2, 0xF6F75679;
198 CHECKREG r3, 0xF6F72283;
199 CHECKREG r4, 0xF7EA8569;
200 CHECKREG r5, 0xF7E9DE9E;
201 CHECKREG r6, 0x006F008D;
202 CHECKREG r7, 0x006F124B;