sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0_i.s

   1 //Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1a0_i/c_dsp32mac_pair_a1a0_i.dsp
   2 // Spec Reference: dsp32mac pair a1a0 I
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         A1 = A0 = 0;
   9
  10 // The result accumulated in A       , and stored to a reg half
  11         imm32 r0, 0x63545abd;
  12         imm32 r1, 0x86bcfec7;
  13         imm32 r2, 0xa8645679;
  14         imm32 r3, 0x00860007;
  15         imm32 r4, 0xefb86569;
  16         imm32 r5, 0x1235860b;
  17         imm32 r6, 0x000c086d;
  18         imm32 r7, 0x678e0086;
  19         R7 = ( A1 += R1.L * R0.L ),  R6 = ( A0 = R1.L * R0.L )  (IS);
  20         P1 = A1.w;
  21         P2 = A0.w;
  22         R1 = ( A1 = R2.L * R3.L ),  R0 = ( A0 = R2.H * R3.L )  (IS);
  23         P3 = A1.w;
  24         P4 = A0.w;
  25         R3 = ( A1 = R7.L * R4.L ),  R2 = ( A0 += R7.H * R4.H )  (IS);
  26         P5 = A1.w;
  27         SP = A0.w;
  28         R5 = ( A1 += R6.L * R5.L ),  R4 = ( A0 += R6.L * R5.H )  (IS);
  29         FP = A1.w;
  30         CHECKREG r0, 0xFFFD9ABC;
  31         CHECKREG r1, 0x00025D4F;
  32         CHECKREG r2, 0x0004A9F4;
  33         CHECKREG r3, 0x05E8D563;
  34         CHECKREG r4, 0x0114469B;
  35         CHECKREG r5, 0xFECD7B7C;
  36         CHECKREG r6, 0xFF910EEB;
  37         CHECKREG r7, 0xFF910EEB;
  38         CHECKREG p1, 0xFF910EEB;
  39         CHECKREG p2, 0xFF910EEB;
  40         CHECKREG p3, 0x00025D4F;
  41         CHECKREG p4, 0xFFFD9ABC;
  42         CHECKREG p5, 0x05E8D563;
  43         CHECKREG sp, 0x0004A9F4;
  44         CHECKREG fp, 0xFECD7B7C;
  45
  46         imm32 r0, 0x98764abd;
  47         imm32 r1, 0xa1bcf4c7;
  48         imm32 r2, 0xa1145649;
  49         imm32 r3, 0x00010005;
  50         imm32 r4, 0xefbc1569;
  51         imm32 r5, 0x1235010b;
  52         imm32 r6, 0x000c001d;
  53         imm32 r7, 0x678e0001;
  54         R5 = ( A1 += R1.L * R0.H ),  R4 = ( A0 = R1.L * R0.L )  (IS);
  55         P1 = A1.w;
  56         P2 = A0.w;
  57         R1 = ( A1 = R2.L * R3.H ),  R0 = ( A0 -= R2.H * R3.L )  (IS);
  58         P2 = A0.w;
  59         P3 = A1.w;
  60         P4 = A0.w;
  61         R3 = ( A1 -= R4.L * R5.H ),  R2 = ( A0 += R4.H * R5.H )  (IS);
  62         P5 = A1.w;
  63         SP = A0.w;
  64         R1 = ( A1 += R6.L * R7.H ),  R0 = ( A0 += R6.L * R7.H )  (IS);
  65         FP = A0.w;
  66         CHECKREG r0, 0xFCBBE07C;
  67         CHECKREG r1, 0xFF409C82;
  68         CHECKREG r2, 0xFCB02566;
  69         CHECKREG r3, 0xFF34E16C;
  70         CHECKREG r4, 0xFCB93CEB;
  71         CHECKREG r5, 0x03577736;
  72         CHECKREG r6, 0x000C001D;
  73         CHECKREG r7, 0x678E0001;
  74         CHECKREG p1, 0x03577736;
  75         CHECKREG p2, 0xFCBB1787;
  76         CHECKREG p3, 0x00005649;
  77         CHECKREG p4, 0xFCBB1787;
  78         CHECKREG p5, 0xFF34E16C;
  79         CHECKREG sp, 0xFCB02566;
  80         CHECKREG fp, 0xFCBBE07C;
  81
  82         imm32 r0, 0x7136459d;
  83         imm32 r1, 0xabd69ec7;
  84         imm32 r2, 0x71145679;
  85         imm32 r3, 0x08010007;
  86         imm32 r4, 0xef9c1569;
  87         imm32 r5, 0x1225010b;
  88         imm32 r6, 0x0003401d;
  89         imm32 r7, 0x678e0561;
  90         R5 = ( A1 += R1.H * R0.L ),  R4 = ( A0 = R1.L * R0.L )  (IS);
  91         P1 = A1.w;
  92         P2 = A0.w;
  93         R7 = ( A1 = R2.H * R3.L ),  R6 = ( A0 = R2.H * R3.L )  (IS);
  94         P3 = A1.w;
  95         P4 = A0.w;
  96         R1 = ( A1 -= R4.H * R5.L ),  R0 = ( A0 += R4.H * R5.H )  (IS);
  97         P5 = A1.w;
  98         SP = A0.w;
  99         R5 = ( A1 += R6.H * R7.L ),  R4 = ( A0 += R6.L * R7.H )  (IS);
 100         FP = A0.w;
 101         CHECKREG r0, 0x0273FCDC;
 102         CHECKREG r1, 0xF76A2B8C;
 103         CHECKREG r2, 0x71145679;
 104         CHECKREG r3, 0x08010007;
 105         CHECKREG r4, 0x02744380;
 106         CHECKREG r5, 0xF76A7230;
 107         CHECKREG r6, 0x0003178C;
 108         CHECKREG r7, 0x0003178C;
 109         CHECKREG p1, 0xE85DACC0;
 110         CHECKREG p2, 0xE590030B;
 111         CHECKREG p3, 0x0003178C;
 112         CHECKREG p5, 0xF76A2B8C;
 113         CHECKREG p4, 0x0003178C;
 114         CHECKREG sp, 0x0273FCDC;
 115         CHECKREG fp, 0x02744380;
 116
 117         imm32 r0, 0x123489bd;
 118         imm32 r1, 0x91bcfec7;
 119         imm32 r2, 0xa9145679;
 120         imm32 r3, 0xd0910007;
 121         imm32 r4, 0xedb91569;
 122         imm32 r5, 0xd235910b;
 123         imm32 r6, 0x0d0c0999;
 124         imm32 r7, 0x67de0009;
 125         R1 = ( A1 += R5.H * R3.H ),  R0 = ( A0 = R5.L * R3.L )  (IS);
 126         P1 = A1.w;
 127         P2 = A0.w;
 128         R3 = ( A1 = R2.H * R1.H ),  R2 = ( A0 -= R2.H * R1.L )  (IS);
 129         P3 = A1.w;
 130         P4 = A0.w;
 131         R5 = ( A1 = R7.H * R0.H ),  R4 = ( A0 += R7.H * R0.H )  (IS);
 132         P5 = A1.w;
 133         SP = A0.w;
 134         R7 = ( A1 += R4.H * R6.H ),  R6 = ( A0 += R4.L * R6.H )  (IS);
 135         FP = A0.w;
 136         CHECKREG r0, 0xFFFCF74D;
 137         CHECKREG r1, 0xFFE69235;
 138         CHECKREG r2, 0xDAB58E29;
 139         CHECKREG r3, 0x0008D3F8;
 140         CHECKREG r4, 0xDAB3EEB1;
 141         CHECKREG r5, 0xFFFE6088;
 142         CHECKREG r6, 0xD9D21BFD;
 143         CHECKREG r7, 0xFE17B7EC;
 144         CHECKREG p1, 0xFFE69235;
 145         CHECKREG p2, 0xFFFCF74D;
 146         CHECKREG p3, 0x0008D3F8;
 147         CHECKREG p4, 0xDAB58E29;
 148         CHECKREG p5, 0xFFFE6088;
 149         CHECKREG sp, 0xDAB3EEB1;
 150         CHECKREG fp, 0xD9D21BFD;
 151
 152         imm32 r0, 0x63545abd;
 153         imm32 r1, 0x86bcfec7;
 154         imm32 r2, 0xa8645679;
 155         imm32 r3, 0x00860007;
 156         imm32 r4, 0xefb86569;
 157         imm32 r5, 0x1235860b;
 158         imm32 r6, 0x000c086d;
 159         imm32 r7, 0x678e0086;
 160         R7 = ( A1 += R1.L * R0.L ) (M),  R6 = ( A0 = R1.L * R0.L )  (IS);
 161         P1 = A1.w;
 162         P2 = A0.w;
 163         R1 = ( A1 = R2.L * R3.L ) (M),  R0 = ( A0 = R2.H * R3.L )  (IS);
 164         P3 = A1.w;
 165         P4 = A0.w;
 166         R3 = ( A1 -= R7.L * R4.L ) (M),  R2 = ( A0 -= R7.H * R4.H )  (IS);
 167         P5 = A1.w;
 168         SP = A0.w;
 169         R5 = ( A1 += R6.L * R5.L ) (M),  R4 = ( A0 += R6.L * R5.H )  (IS);
 170         FP = A0.w;
 171         CHECKREG r0, 0xFFFD9ABC;
 172         CHECKREG r1, 0x00025D4F;
 173         CHECKREG r2, 0xFFD771FC;
 174         CHECKREG r3, 0x16A6FC20;
 175         CHECKREG r4, 0x00E70EA3;
 176         CHECKREG r5, 0x1E76A239;
 177         CHECKREG r6, 0xFF910EEB;
 178         CHECKREG r7, 0xFDA8C6D7;
 179         CHECKREG p1, 0xFDA8C6D7;
 180         CHECKREG p2, 0xFF910EEB;
 181         CHECKREG p3, 0x00025D4F;
 182         CHECKREG p4, 0xFFFD9ABC;
 183         CHECKREG p5, 0x16A6FC20;
 184         CHECKREG sp, 0xFFD771FC;
 185         CHECKREG fp, 0x00E70EA3;
 186
 187         imm32 r0, 0x98764abd;
 188         imm32 r1, 0xa1bcf4c7;
 189         imm32 r2, 0xa1145649;
 190         imm32 r3, 0x00010005;
 191         imm32 r4, 0xefbc1569;
 192         imm32 r5, 0x1235010b;
 193         imm32 r6, 0x000c001d;
 194         imm32 r7, 0x678e0001;
 195         R5 = A1,  R4 = ( A0 = R1.L * R0.L )  (IS);
 196         P1 = A1.w;
 197         P2 = A0.w;
 198         R1 = A1,  R0 = ( A0 = R2.H * R3.L )  (IS);
 199         P3 = A1.w;
 200         P4 = A0.w;
 201         R3 = A1,  R2 = ( A0 -= R4.H * R5.H )  (IS);
 202         P5 = A1.w;
 203         SP = A0.w;
 204         R1 = A1,  R0 = ( A0 += R6.L * R7.H )  (IS);
 205         FP = A1.w;
 206         CHECKREG r0, 0x006DB534;
 207         CHECKREG r1, 0x1E76A239;
 208         CHECKREG r2, 0x0061FA1E;
 209         CHECKREG r3, 0x1E76A239;
 210         CHECKREG r4, 0xFCB93CEB;
 211         CHECKREG r5, 0x1E76A239;
 212         CHECKREG r6, 0x000C001D;
 213         CHECKREG r7, 0x678E0001;
 214         CHECKREG p1, 0x1E76A239;
 215         CHECKREG p2, 0xFCB93CEB;
 216         CHECKREG p3, 0x1E76A239;
 217         CHECKREG p4, 0xFFFE2564;
 218         CHECKREG p5, 0x1E76A239;
 219         CHECKREG sp, 0x0061FA1E;
 220         CHECKREG fp, 0x1E76A239;
 221
 222         imm32 r0, 0x7136459d;
 223         imm32 r1, 0xabd69ec7;
 224         imm32 r2, 0x71145679;
 225         imm32 r3, 0x08010007;
 226         imm32 r4, 0xef9c1569;
 227         imm32 r5, 0x1225010b;
 228         imm32 r6, 0x0003401d;
 229         imm32 r7, 0x678e0561;
 230         R5 = ( A1 += R1.H * R0.L ) (M),  R4 = ( A0 = R1.L * R0.L )  (IS);
 231         P1 = A1.w;
 232         P2 = A0.w;
 233         R7 = A1,  R6 = ( A0 = R2.H * R3.L )  (IS);
 234         P3 = A1.w;
 235         P4 = A0.w;
 236         R1 = ( A1 = R4.H * R5.L ) (M),  R0 = ( A0 += R4.H * R5.H )  (IS);
 237         P5 = A1.w;
 238         SP = A0.w;
 239         R5 = A1,  R4 = ( A0 -= R6.L * R7.H )  (IS);
 240         FP = A1.w;
 241         CHECKREG r0, 0xFF3AD93C;
 242         CHECKREG r1, 0xED91D5F0;
 243         CHECKREG r2, 0x71145679;
 244         CHECKREG r3, 0x08010007;
 245         CHECKREG r4, 0xFE887FD8;
 246         CHECKREG r5, 0xED91D5F0;
 247         CHECKREG r6, 0x0003178C;
 248         CHECKREG r7, 0x0793B277;
 249         CHECKREG p1, 0x0793B277;
 250         CHECKREG p2, 0xE590030B;
 251         CHECKREG p3, 0x0793B277;
 252         CHECKREG p4, 0x0003178C;
 253         CHECKREG p5, 0xED91D5F0;
 254         CHECKREG sp, 0xFF3AD93C;
 255         CHECKREG fp, 0xED91D5F0;
 256
 257         imm32 r0, 0x123489bd;
 258         imm32 r1, 0x91bcfec7;
 259         imm32 r2, 0xa9145679;
 260         imm32 r3, 0xd0910007;
 261         imm32 r4, 0xedb91569;
 262         imm32 r5, 0xd235910b;
 263         imm32 r6, 0x0d0c0999;
 264         imm32 r7, 0x67de0009;
 265         R1 = A1,  R0 = ( A0 = R5.L * R3.L )  (IS);
 266         P1 = A1.w;
 267         P2 = A0.w;
 268         R3 = ( A1 = R2.H * R1.H ) (M),  R2 = ( A0 = R2.H * R1.L )  (IS);
 269         P3 = A1.w;
 270         P4 = A0.w;
 271         R5 = ( A1 = R7.H * R0.H ) (M),  R4 = ( A0 += R7.H * R0.H )  (IS);
 272         P5 = A0.w;
 273         SP = A1.w;
 274         R7 = A1,  R6 = ( A0 += R4.L * R6.H )  (IS);
 275         FP = A0.w;
 276         CHECKREG r0, 0xFFFCF74D;
 277         CHECKREG r1, 0xED91D5F0;
 278         CHECKREG r2, 0x0E4826C0;
 279         CHECKREG r3, 0xAF564854;
 280         CHECKREG r4, 0x0E468748;
 281         CHECKREG r5, 0x67DC6088;
 282         CHECKREG r6, 0x081F86A8;
 283         CHECKREG r7, 0x67DC6088;
 284         CHECKREG p1, 0xED91D5F0;
 285         CHECKREG p2, 0xFFFCF74D;
 286         CHECKREG p3, 0xAF564854;
 287         CHECKREG p4, 0x0E4826C0;
 288         CHECKREG p5, 0x0E468748;
 289         CHECKREG sp, 0x67DC6088;
 290         CHECKREG fp, 0x081F86A8;
 291
 292         pass