sim/testsuite/sim/bfin/random_0033.S

   1 # Verify registers saturate and ASTAT bits are updated correctly
   2 # with the RND12 subtract insn
   3 # mach: bfin
   4 #include "test.h"
   5 .include "testutils.inc"
   6
   7         start
   8
   9         dmm32 ASTAT, (0x24a00410 | _VS | _AV1S | _AV0 | _AC0 | _AC0_COPY | _AN);
  10         imm32 R5, 0x0fb35119;
  11         imm32 R6, 0xffffffff;
  12         imm32 R7, 0x80000000;
  13         R6.H = R5 - R7 (RND12);
  14         checkreg R6, 0x7fffffff;
  15         checkreg ASTAT, (0x24a00410 | _VS | _V | _AV1S | _AV0 | _AC0 | _V_COPY | _AC0_COPY);
  16
  17         dmm32 ASTAT, (0x08c08000 | _VS | _AV0S | _AC0 | _AQ | _CC | _AC0_COPY);
  18         imm32 R3, 0x80003f8f;
  19         imm32 R5, 0x6267c92c;
  20         imm32 R6, 0x80000000;
  21         R5.L = R3 - R6 (RND12);
  22         checkreg R5, 0x62670004;
  23         checkreg ASTAT, (0x08c08000 | _VS | _AV0S | _AC0 | _AQ | _CC | _AC0_COPY);
  24
  25         dmm32 ASTAT, (0x04200c10 | _VS | _V | _AV1S | _AV0S | _AC1 | _AC0 | _AQ | _V_COPY);
  26         imm32 R1, 0x7fff0000;
  27         imm32 R5, 0x80000000;
  28         R1.L = R5 - R5 (RND12);
  29         checkreg ASTAT, (0x04200c10 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AQ | _AZ);
  30         checkreg R1, 0x7fff0000;
  31         checkreg R5, 0x80000000;
  32
  33         dmm32 ASTAT, (0x40600e90 | _VS | _AV1S | _AV0S | _AQ | _CC);
  34         imm32 R1, 0x80000000;
  35         imm32 R5, 0x00008000;
  36         imm32 R6, 0x00000000;
  37         R5.L = R6 - R1 (RND12);
  38         checkreg R5, 0x00007fff;
  39         checkreg ASTAT, (0x40600e90 | _VS | _V | _AV1S | _AV0S | _AQ | _CC | _V_COPY);
  40
  41         dmm32 ASTAT, (0x68300880 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AQ | _AC0_COPY | _AZ);
  42         imm32 R1, 0xf8ed0000;
  43         imm32 R6, 0x80000000;
  44         R1.H = R1 - R6 (RND12);
  45         checkreg R1, 0x7fff0000;
  46         checkreg ASTAT, (0x68300880 | _VS | _V | _AV1S | _AV0S | _AC1 | _AC0 | _AQ | _V_COPY | _AC0_COPY);
  47
  48         dmm32 ASTAT, (0x70d0c410 | _VS | _AV0S | _AQ);
  49         imm32 R0, 0x80000000;
  50         imm32 R1, 0x71455f95;
  51         imm32 R4, 0xd4871012;
  52         R4.H = R1 - R0 (RND12);
  53         checkreg R4, 0x7fff1012;
  54         checkreg ASTAT, (0x70d0c410 | _VS | _V | _AV0S | _AQ | _V_COPY);
  55
  56         dmm32 ASTAT, (0x34500e00 | _VS | _AV0S | _AC1 | _CC | _AZ);
  57         imm32 R2, 0x00000000;
  58         imm32 R5, 0x00000000;
  59         imm32 R6, 0x80000000;
  60         R2.L = R5 - R6 (RND12);
  61         checkreg R2, 0x00007fff;
  62         checkreg ASTAT, (0x34500e00 | _VS | _V | _AV0S | _AC1 | _CC | _V_COPY);
  63
  64         pass