sim/testsuite/sim/cris/asm/raw17.ms

   1 ; Checking read-after-write: different read-after-write combinations.
   2 #mach: crisv32
   3 #output: Basic clock cycles, total @: 11\n
   4 #output: Memory source stall cycles: 0\n
   5 #output: Memory read-after-write stall cycles: 8\n
   6 #output: Movem source stall cycles: 0\n
   7 #output: Movem destination stall cycles: 0\n
   8 #output: Movem address stall cycles: 0\n
   9 #output: Multiplication source stall cycles: 0\n
  10 #output: Jump source stall cycles: 0\n
  11 #output: Branch misprediction stall cycles: 0\n
  12 #output: Jump target stall cycles: 0\n
  13 #sim: --cris-cycles=basic
  14  .include "testutils.inc"
  15  startnostack
  16  .lcomm x,4
  17  .lcomm y,4
  18  move.d x,$r0
  19  move.d y,$r1
  20  move.d $r1,[$r0]
  21  move.d [$r1],$r2
  22  move.d [$r1],$r2
  23  clear.d [$r0]
  24  move.d [$r1],$r2
  25  movem $r0,[$r1]
  26  movem [$r1],$r0
  27  move $srp,[$r1]
  28  move.d [$r1],$r0
  29  break 15