sim/testsuite/sim/cris/asm/tjmpsrv32-2.ms

   1 #mach: crisv32
   2 #output: Basic clock cycles, total @: 37\n
   3 #output: Memory source stall cycles: 0\n
   4 #output: Memory read-after-write stall cycles: 0\n
   5 #output: Movem source stall cycles: 0\n
   6 #output: Movem destination stall cycles: 0\n
   7 #output: Movem address stall cycles: 0\n
   8 #output: Multiplication source stall cycles: 0\n
   9 #output: Jump source stall cycles: 6\n
  10 #output: Branch misprediction stall cycles: 0\n
  11 #output: Jump target stall cycles: 0\n
  12 #sim: --cris-cycles=basic
  13
  14 ; Check that we correctly account for that a "jas N,Pn",
  15 ; "jasc N,Pn", "bas N,Pn" and "basc N,Pn" sets the specific
  16 ; special register and causes a pipeline hazard.  The amount
  17 ; of nops below is a bit inflated, in an attempt to make
  18 ; errors more discernible.  For special registers, we just
  19 ; check SRP.
  20
  21  .include "testutils.inc"
  22  startnostack
  23  move.d 0f,$r0
  24  jsr 0f
  25  nop
  26  nop
  27  nop
  28  jsrc 0f
  29  nop
  30  .dword -1
  31  nop
  32  nop
  33  jsr $r0
  34  nop
  35  nop
  36  nop
  37  jsrc $r0
  38  nop
  39  .dword -1
  40  nop
  41  nop
  42  bsr 0f
  43  nop
  44  nop
  45  nop
  46  bsrc 0f
  47  nop
  48  .dword -1
  49  nop
  50  nop
  51  break 15
  52
  53 0:
  54  ret            ; 1 cycle penalty.
  55  nop