1 # fr30 testcase for div0u $Ri
4 .include "testutils.inc"
12 ; operand register has no effect
13 mvi_h_gr 0xdeadbeef,r2
14 mvi_h_dr 0xdeadbeef,mdh
15 mvi_h_dr 0x0ffffff0,mdl
16 set_dbits 0x3 ; Set opposite of expected
17 set_cc 0x0f ; Condition codes should not change
20 test_h_gr 0xdeadbeef,r2
21 test_h_dr 0x00000000,mdh
22 test_h_dr 0x0ffffff0,mdl