New sim testsuite for Fujitsu FRV. Contributed by Red Hat.
[deliverable/binutils-gdb.git] / sim / testsuite / sim / frv / bcvlr.cgs
1 # frv testcase for bcvlr $ICCi,$ccond,$hint
2 # mach: all
3
4 .include "testutils.inc"
5
6 start
7
8 .global bcvlr
9 bcvlr:
10 ; ccond is true
11 set_spr_immed 128,lcr
12 set_spr_addr bad,lr
13 set_icc 0x0 0
14 bcvlr icc0,0,0
15
16 set_spr_addr bad,lr
17 set_icc 0x1 1
18 bcvlr icc1,0,1
19
20 set_spr_addr ok3,lr
21 set_icc 0x2 2
22 bcvlr icc2,0,2
23 fail
24 ok3:
25 set_spr_addr ok4,lr
26 set_icc 0x3 3
27 bcvlr icc3,0,3
28 fail
29 ok4:
30 set_spr_addr bad,lr
31 set_icc 0x4 0
32 bcvlr icc0,0,0
33
34 set_spr_addr bad,lr
35 set_icc 0x5 1
36 bcvlr icc1,0,1
37
38 set_spr_addr ok7,lr
39 set_icc 0x6 2
40 bcvlr icc2,0,2
41 fail
42 ok7:
43 set_spr_addr ok8,lr
44 set_icc 0x7 3
45 bcvlr icc3,0,3
46 fail
47 ok8:
48 set_spr_addr bad,lr
49 set_icc 0x8 0
50 bcvlr icc0,0,0
51
52 set_spr_addr bad,lr
53 set_icc 0x9 1
54 bcvlr icc1,0,1
55
56 set_spr_addr okb,lr
57 set_icc 0xa 2
58 bcvlr icc2,0,2
59 fail
60 okb:
61 set_spr_addr okc,lr
62 set_icc 0xb 3
63 bcvlr icc3,0,3
64 fail
65 okc:
66 set_spr_addr bad,lr
67 set_icc 0xc 0
68 bcvlr icc0,0,0
69
70 set_spr_addr bad,lr
71 set_icc 0xd 1
72 bcvlr icc1,0,1
73
74 set_spr_addr okf,lr
75 set_icc 0xe 2
76 bcvlr icc2,0,2
77 fail
78 okf:
79 set_spr_addr okg,lr
80 set_icc 0xf 3
81 bcvlr icc3,0,3
82 fail
83 okg:
84
85 ; ccond is true
86 set_spr_immed 1,lcr
87 set_spr_addr bad,lr
88 set_icc 0x0 0
89 bcvlr icc0,1,0
90
91 set_spr_immed 1,lcr
92 set_spr_addr bad,lr
93 set_icc 0x1 1
94 bcvlr icc1,1,1
95
96 set_spr_immed 1,lcr
97 set_spr_addr okj,lr
98 set_icc 0x2 2
99 bcvlr icc2,1,2
100 fail
101 okj:
102 set_spr_immed 1,lcr
103 set_spr_addr okk,lr
104 set_icc 0x3 3
105 bcvlr icc3,1,3
106 fail
107 okk:
108 set_spr_immed 1,lcr
109 set_spr_addr bad,lr
110 set_icc 0x4 0
111 bcvlr icc0,1,0
112
113 set_spr_immed 1,lcr
114 set_spr_addr bad,lr
115 set_icc 0x5 1
116 bcvlr icc1,1,1
117
118 set_spr_immed 1,lcr
119 set_spr_addr okn,lr
120 set_icc 0x6 2
121 bcvlr icc2,1,2
122 fail
123 okn:
124 set_spr_immed 1,lcr
125 set_spr_addr oko,lr
126 set_icc 0x7 3
127 bcvlr icc3,1,3
128 fail
129 oko:
130 set_spr_immed 1,lcr
131 set_spr_addr bad,lr
132 set_icc 0x8 0
133 bcvlr icc0,1,0
134
135 set_spr_immed 1,lcr
136 set_spr_addr bad,lr
137 set_icc 0x9 1
138 bcvlr icc1,1,1
139
140 set_spr_immed 1,lcr
141 set_spr_addr okr,lr
142 set_icc 0xa 2
143 bcvlr icc2,1,2
144 fail
145 okr:
146 set_spr_immed 1,lcr
147 set_spr_addr oks,lr
148 set_icc 0xb 3
149 bcvlr icc3,1,3
150 fail
151 oks:
152 set_spr_immed 1,lcr
153 set_spr_addr bad,lr
154 set_icc 0xc 0
155 bcvlr icc0,1,0
156
157 set_spr_immed 1,lcr
158 set_spr_addr bad,lr
159 set_icc 0xd 1
160 bcvlr icc1,1,1
161
162 set_spr_immed 1,lcr
163 set_spr_addr okv,lr
164 set_icc 0xe 2
165 bcvlr icc2,1,2
166 fail
167 okv:
168 set_spr_immed 1,lcr
169 set_spr_addr okw,lr
170 set_icc 0xf 3
171 bcvlr icc3,1,3
172 fail
173 okw:
174 ; ccond is false
175 set_spr_immed 128,lcr
176 set_spr_addr bad,lr
177 set_icc 0x0 0
178 bcvlr icc0,1,0
179
180 set_icc 0x1 1
181 bcvlr icc1,1,1
182
183 set_icc 0x2 2
184 bcvlr icc2,1,2
185
186 set_icc 0x3 3
187 bcvlr icc3,1,3
188
189 set_icc 0x4 0
190 bcvlr icc0,1,0
191
192 set_icc 0x5 1
193 bcvlr icc1,1,1
194
195 set_icc 0x6 2
196 bcvlr icc2,1,2
197
198 set_icc 0x7 3
199 bcvlr icc3,1,3
200
201 set_icc 0x8 0
202 bcvlr icc0,1,0
203
204 set_icc 0x9 1
205 bcvlr icc1,1,1
206
207 set_icc 0xa 2
208 bcvlr icc2,1,2
209
210 set_icc 0xb 3
211 bcvlr icc3,1,3
212
213 set_icc 0xc 0
214 bcvlr icc0,1,0
215
216 set_icc 0xd 1
217 bcvlr icc1,1,1
218
219 set_icc 0xe 2
220 bcvlr icc2,1,2
221
222 set_icc 0xf 3
223 bcvlr icc3,1,3
224
225 ; ccond is false
226 set_spr_immed 1,lcr
227 set_spr_addr bad,lr
228 set_icc 0x0 0
229 bcvlr icc0,0,0
230
231 set_spr_immed 1,lcr
232 set_icc 0x1 1
233 bcvlr icc1,0,1
234
235 set_spr_immed 1,lcr
236 set_icc 0x2 2
237 bcvlr icc2,0,2
238
239 set_spr_immed 1,lcr
240 set_icc 0x3 3
241 bcvlr icc3,0,3
242
243 set_spr_immed 1,lcr
244 set_icc 0x4 0
245 bcvlr icc0,0,0
246
247 set_spr_immed 1,lcr
248 set_icc 0x5 1
249 bcvlr icc1,0,1
250
251 set_spr_immed 1,lcr
252 set_icc 0x6 2
253 bcvlr icc2,0,2
254
255 set_spr_immed 1,lcr
256 set_icc 0x7 3
257 bcvlr icc3,0,3
258
259 set_spr_immed 1,lcr
260 set_icc 0x8 0
261 bcvlr icc0,0,0
262
263 set_spr_immed 1,lcr
264 set_icc 0x9 1
265 bcvlr icc1,0,1
266
267 set_spr_immed 1,lcr
268 set_icc 0xa 2
269 bcvlr icc2,0,2
270
271 set_spr_immed 1,lcr
272 set_icc 0xb 3
273 bcvlr icc3,0,3
274
275 set_spr_immed 1,lcr
276 set_icc 0xc 0
277 bcvlr icc0,0,0
278
279 set_spr_immed 1,lcr
280 set_icc 0xd 1
281 bcvlr icc1,0,1
282
283 set_spr_immed 1,lcr
284 set_icc 0xe 2
285 bcvlr icc2,0,2
286
287 set_spr_immed 1,lcr
288 set_icc 0xf 3
289 bcvlr icc3,0,3
290
291 pass
292 bad:
293 fail
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