sim/testsuite/sim/frv/interrupts/timer.cgs

   1 # frv testcase to generate timer interrupt for st $GRk,@($GRi,$GRj)
   2 # mach: fr500 fr400
   3 # sim: --timer 200,14
   4         .include "testutils.inc"
   5
   6         start
   7
   8         .global align
   9 align:
  10         and_spr_immed   -4081,tbr               ; clear tbr.tt
  11         set_gr_spr      tbr,gr17
  12         inc_gr_immed    0x2e0,gr17              ; address of exception handler
  13         set_bctrlr_0_0  gr17
  14         set_spr_immed   0x7fffffff,lcr
  15         set_spr_addr    ok1,lr
  16         and_spr_immed   0xffffff87,psr ; enable external interrupts
  17         or_spr_immed    0x00000069,psr ; enable external interrupts
  18
  19         set_gr_immed    10,gr16
  20         set_gr_immed    0,gr15
  21
  22 again:  cmp             gr15,gr16,icc0
  23         blt             icc0,0,again
  24
  25         pass
  26
  27 ; exception handler
  28 ok1:
  29         inc_gr_immed    1,gr15
  30         rett            0
  31         fail