sim/testsuite/sim/frv/lddcu.cgs

   1 # frv testcase for lddcu @($GRi,$GRj),$GRk
   2 # mach: frv
   3 # as(frv): -mcpu=frv
   4
   5         .include "testutils.inc"
   6
   7         start
   8
   9         .global lddcu
  10 lddcu:
  11         set_mem_limmed  0xdead,0xbeef,sp
  12         inc_gr_immed    -4,sp
  13         set_mem_limmed  0xbeef,0xdead,sp
  14         set_gr_gr       sp,gr20
  15         set_cpr_limmed  0xdead,0xbeef,cpr8
  16         set_cpr_limmed  0xbeef,0xdead,cpr9
  17
  18         set_gr_immed    0,gr7
  19         lddcu           @(sp,gr7),cpr8
  20         test_cpr_limmed 0xbeef,0xdead,cpr8
  21         test_cpr_limmed 0xdead,0xbeef,cpr9
  22         test_gr_gr      sp,gr20
  23
  24         set_cpr_limmed  0xdead,0xbeef,cpr8
  25         set_cpr_limmed  0xbeef,0xdead,cpr9
  26         inc_gr_immed    -8,sp
  27         set_gr_immed    8,gr7
  28         lddcu           @(sp,gr7),cpr8
  29         test_cpr_limmed 0xbeef,0xdead,cpr8
  30         test_cpr_limmed 0xdead,0xbeef,cpr9
  31         test_gr_gr      sp,gr20
  32
  33         set_cpr_limmed  0xdead,0xbeef,cpr8
  34         set_cpr_limmed  0xbeef,0xdead,cpr9
  35         inc_gr_immed    8,sp
  36         set_gr_immed    -8,gr7
  37         lddcu           @(sp,gr7),cpr8
  38         test_cpr_limmed 0xbeef,0xdead,cpr8
  39         test_cpr_limmed 0xdead,0xbeef,cpr9
  40         test_gr_gr      sp,gr20
  41
  42         pass