sim/testsuite/sim/frv/rst.cgs

   1 # frv testcase for rst $GRk,@($GRi,$GRj)
   2 # mach: frv
   3 # as(frv): -mcpu=frv
   4
   5         .include "testutils.inc"
   6
   7         start
   8
   9         .global rst
  10 rst:
  11         ; No nesr's active
  12         set_gr_gr       sp,gr10
  13         set_gr_gr       sp,gr24
  14         set_mem_limmed  0x2222,0x2222,gr24
  15         set_gr_gr       gr24,gr27
  16         inc_gr_immed    -4,gr27
  17         set_mem_limmed  0x3333,0x3333,gr27
  18         set_gr_gr       gr27,gr26
  19         inc_gr_immed    -4,gr26
  20         set_mem_limmed  0x4444,0x4444,gr26
  21         set_gr_gr       gr26,gr25
  22         inc_gr_immed    -4,gr25
  23         set_mem_limmed  0x5555,0x5555,gr25
  24         set_gr_limmed   0x1111,0x1111,gr20
  25         set_gr_immed    0,gr7
  26         set_gr_limmed   0xffff,0xffff,gr8
  27         rst             gr8,@(sp,gr7)
  28         test_mem_limmed 0xffff,0xffff,gr24
  29         test_mem_limmed 0x3333,0x3333,gr27
  30         test_mem_limmed 0x4444,0x4444,gr26
  31         test_mem_limmed 0x5555,0x5555,gr25
  32         test_gr_limmed  0x1111,0x1111,gr20
  33
  34         ; 1 nesr active with the incorrect address in neear for gr
  35         nldi            @(sp,0),gr20
  36         test_spr_gr     neear0,gr10
  37         set_mem_limmed  0x2222,0x2222,gr24
  38         set_mem_limmed  0x3333,0x3333,gr27
  39         set_mem_limmed  0x4444,0x4444,gr26
  40         set_mem_limmed  0x5555,0x5555,gr25
  41         set_gr_limmed   0x1111,0x1111,gr20
  42         set_gr_limmed   0xffff,0xffff,gr8
  43         set_gr_immed    -4,gr7
  44         rst             gr8,@(sp,gr7)
  45         test_mem_limmed 0x2222,0x2222,gr24
  46         test_mem_limmed 0xffff,0xffff,gr27
  47         test_mem_limmed 0x4444,0x4444,gr26
  48         test_mem_limmed 0x5555,0x5555,gr25
  49         test_gr_limmed  0x1111,0x1111,gr20
  50
  51         ; 1 nesr active with the incorrect address in neear for fr
  52         inc_gr_immed    -4,gr10
  53         nldfi           @(sp,-4),fr20
  54         test_spr_gr     neear1,gr10
  55         set_mem_limmed  0x2222,0x2222,gr24
  56         set_mem_limmed  0x3333,0x3333,gr27
  57         set_mem_limmed  0x4444,0x4444,gr26
  58         set_mem_limmed  0x5555,0x5555,gr25
  59         set_fr_iimmed   0x1111,0x1111,fr20
  60         set_gr_limmed   0xffff,0xffff,gr8
  61         inc_gr_immed    -4,sp
  62         set_gr_immed    4,gr7
  63         rst             gr8,@(sp,gr7)
  64         test_mem_limmed 0xffff,0xffff,gr24
  65         test_mem_limmed 0x3333,0x3333,gr27
  66         test_mem_limmed 0x4444,0x4444,gr26
  67         test_mem_limmed 0x5555,0x5555,gr25
  68         test_fr_limmed  0x1111,0x1111,fr20
  69
  70         ; 1 nesr active with the correct address in neear for gr
  71         inc_gr_immed    -4,gr10
  72         nldi            @(sp,-4),gr20
  73         test_spr_gr     neear2,gr10
  74         set_mem_limmed  0x2222,0x2222,gr24
  75         set_mem_limmed  0x3333,0x3333,gr27
  76         set_mem_limmed  0x4444,0x4444,gr26
  77         set_mem_limmed  0x5555,0x5555,gr25
  78         set_gr_limmed   0x1111,0x1111,gr20
  79         set_gr_limmed   0xffff,0xffff,gr8
  80         inc_gr_immed    -4,sp
  81         set_gr_immed    0,gr7
  82         rst             gr8,@(sp,gr7)
  83         test_mem_limmed 0x2222,0x2222,gr24
  84         test_mem_limmed 0x3333,0x3333,gr27
  85         test_mem_limmed 0xffff,0xffff,gr26
  86         test_mem_limmed 0x5555,0x5555,gr25
  87         test_gr_limmed  0xffff,0xffff,gr20
  88
  89         ; 1 nesr active with the correct address in neear for fr
  90         inc_gr_immed    -4,gr10
  91         nldfi           @(sp,-4),fr20
  92         test_spr_gr     neear3,gr10
  93         set_mem_limmed  0x2222,0x2222,gr24
  94         set_mem_limmed  0x3333,0x3333,gr27
  95         set_mem_limmed  0x4444,0x4444,gr26
  96         set_mem_limmed  0x5555,0x5555,gr25
  97         set_fr_iimmed   0x1111,0x1111,fr20
  98         set_gr_limmed   0xffff,0xffff,gr8
  99         set_gr_immed    -4,gr7
 100         rst             gr8,@(sp,gr7)
 101         test_mem_limmed 0x2222,0x2222,gr24
 102         test_mem_limmed 0x3333,0x3333,gr27
 103         test_mem_limmed 0x4444,0x4444,gr26
 104         test_mem_limmed 0xffff,0xffff,gr25
 105         test_fr_limmed  0xffff,0xffff,fr20
 106
 107         pass