sim/testsuite/sim/frv/stdf.pcgs

   1 # frv parallel testcase for stdf $GRk,@($GRi,$GRj)
   2 # mach: fr500 fr550 frv
   3
   4         .include "testutils.inc"
   5
   6         start
   7
   8         .global stdf
   9 stdf:
  10         set_mem_limmed  0xbeef,0xdead,sp
  11         inc_gr_immed    -4,sp
  12         set_mem_limmed  0xdead,0xbeef,sp
  13         set_gr_immed    0,gr7
  14         set_fr_iimmed   0xbeef,0xdead,fr8
  15         set_fr_iimmed   0xdead,0xbeef,fr9
  16         stdf            fr8,@(sp,gr7)           ; non parallel
  17         test_mem_limmed 0xbeef,0xdead,sp
  18         inc_gr_immed    4,sp
  19         test_mem_limmed 0xdead,0xbeef,sp
  20
  21         set_mem_limmed  0xbeef,0xdead,sp
  22         inc_gr_immed    -4,sp
  23         set_mem_limmed  0xdead,0xbeef,sp
  24         set_gr_immed    4,gr7
  25         set_fr_iimmed   0xbeef,0xdead,fr8
  26         set_fr_iimmed   0xdead,0xbeef,fr9
  27         stdf.p          fr8,@(sp,gr0)           ; parallel
  28         fnegs           fr8,fr8
  29         ldf             @(sp,gr0),fr10
  30         ldf             @(sp,gr7),fr11          ; memory is set
  31         test_mem_limmed 0xbeef,0xdead,sp
  32         inc_gr_immed    4,sp
  33         test_mem_limmed 0xdead,0xbeef,sp
  34         test_fr_iimmed  0xbeefdead,fr10         ; regs were pre-loaded
  35         test_fr_iimmed  0xdeadbeef,fr11         ; not this one
  36
  37         pass