sim/testsuite/sim/sh64/misc/fr-dr.s

   1 # sh testcase for floating point register shared state (see below).
   2 # mach: all
   3 # as: -isa=shmedia
   4 # ld: -m shelf64
   5
   6 # (fr, dr, fp, fv amd mtrx provide different views of the same architecrual state).
   7 # Hitachi SH-5 CPU volume 1, p. 15.
   8
   9         .include "media/testutils.inc"
  10
  11         start
  12
  13         movi 42, r0
  14         fmov.ls r0, fr12
  15         # save this reg.
  16         fmov.s fr12, fr14
  17
  18         movi 42, r0
  19         fmov.qd r0, dr12
  20
  21 okay:
  22         pass