Watchpoint interface.
[deliverable/binutils-gdb.git] / sim / tic80 / ChangeLog
1 Tue May 20 09:33:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * sim-calls.c (sim_load): Set STATE_LOADED_P.
4
5 * sim-main.h: Include <unistd.h>.
6
7 * sim-calls.c (sim_set_callback): Delete.
8 (sim_open): Add/install callback argument.
9 (sim_size): Delete.
10
11 Mon May 19 18:59:33 1997 Mike Meissner <meissner@cygnus.com>
12
13 * configure.in: Check for getpid, kill functions.
14 * config{.in,ure}: Regenerate.
15
16 * insns (do_trap): Add support for kill, getpid system calls.
17
18 * sim-main.h (errno.h): Include.
19 (getpid,kill): Define as NOPs if the host doesn't have them.
20
21 Mon May 19 14:58:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
22
23 * sim-calls.c (sim_open): Set the simulator base magic number.
24 (sim_load): Delete prototype of sim_load_file.
25 (sim_open): Define sd to be &simulation.
26
27 Fri May 16 14:35:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
28
29 * insns (illegal, fp_unavailable): Halt instead of abort the
30 simulator.
31
32 * insns: Replace calls to engine_error with sim_engine_abort.
33 Ditto for engine_halt V sim_engine_halt.
34
35 Tue May 13 15:24:12 1997 Andrew Cagney <cagney@b2.cygnus.com>
36
37 * interp.c (engine_run_until_stop): Delete. Moved to common.
38 (engine_step): Ditto.
39 (engine_step): Ditto.
40 (engine_halt): Ditto.
41 (engine_restart): Ditto.
42 (engine_halt): Ditto.
43 (engine_error): Ditto.
44
45 * sim-calls.c (sim_stop): Delete. Moved to common.
46 (sim_stop_reason): Ditto.
47 (sim_resume): Ditto.
48
49 * Makefile.in (SIM_OBJS): Link in generic sim-engine, sim-run,
50 sim-resume, sim-reason, sim-stop modules.
51
52 Fri May 16 11:57:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
53
54 * ic (compute): Drop check for REG == 0, now always forced to
55 zero.
56
57 * cpu.h (GPR_SET): New macro update the gpr.
58 * insns (do_add): Use GPR_SET to update the GPR register.
59
60 * sim-calls.c (sim_fetch_register): Pretend that r0 is zero.
61
62 * Makefile.in (tmp-igen): Specify zero-r0 so that every
63 instruction clears r0.
64
65 * interp.c (engine_run_until_stop): Igen now generates code to
66 clear r0.
67 (engine_step): Ditto.
68
69 Thu May 15 11:45:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
70
71 * insns (do_shift): When rot==0 and zero/sign merge treat it as
72 32.
73 (set_fp_reg): For interger conversion, use sim-fpu fpu2i
74 functions.
75 (do_fmpy): Perform iii and uuu using integer arithmetic.
76
77 * Makefile.in (ENGINE_H): Assume everything depends on the fpu.
78
79 * insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned
80 conversion.
81 (do_fcmp): Update to use new fp compare functions. Make reg nr arg
82 instead of reg. Stops fp overflow.
83 (get_fp_reg): Assume val is valid when reg == 0.
84 (set_fp_reg): Fix double conversion.
85
86 * misc.c (tic80_trace_fpu1): New function, trace simple fp op.
87
88 * insns (do_frnd): Add tracing.
89
90 * cpu.h (TRACE_FPU1): Ditto.
91
92 * insns (do_trap): Printf formatting.
93
94 Wed May 14 18:05:50 1997 Mike Meissner <meissner@cygnus.com>
95
96 * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other
97 insns. Use %g to print floating point instead of %f in case the
98 numbers are real large.
99
100 Tue May 13 18:00:10 1997 Mike Meissner <meissner@cygnus.com>
101
102 * insns (do_trap): For system calls that are defined, but not
103 provided return EINVAL. Temporarily add traps 74-79 to just print
104 the register state.
105
106 * interp.c (engine_{run_until_stop,step}): Before executing
107 instructions, make sure r0 == 0.
108
109 Tue May 13 16:39:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
110
111 * alu.h (IMEM): Take full cia not just IP as argument.
112
113 * interp.c (engine_run_until_stop): Delete handling of annuled
114 instructions.
115 (engine_step): Ditto.
116
117 * insn (do_branch): New function.
118 (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle
119 annuled branches.
120
121 Mon May 12 17:15:52 1997 Mike Meissner <meissner@cygnus.com>
122
123 * insns (do_{ld,st}): Fix tracing for ld/st.
124
125 Mon May 12 11:12:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
126
127 * sim-calls.c (sim_stop_reason): Restore keep_running after a
128 CNTRL-C, don't re-clear it.
129
130 * interp.c (engine_error): stop rather than signal with SIGABRT
131 when an error.
132
133 * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in
134 rDest + 1. Also done by Michael Meissner <meissner@cygnus.com>
135 (do_st): Converse for store.
136
137 * misc.c (tic80_trace_fpu2i): Correct printf format for int type.
138
139 Sun May 11 11:02:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
140
141 * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running
142 was cleared.
143
144 * interp.c (engine_step): New function. Single step the simulator
145 taking care of cntrl-c during a step.
146
147 * sim-calls.c (sim_resume): Differentiate between stepping and
148 running so that a cntrl-c during a step is reported.
149
150 Sun May 11 10:54:31 1997 Mark Alexander <marka@cygnus.com>
151
152 * sim-calls.c (sim_fetch_register): Use correct reg base.
153 (sim_store_register): Ditto.
154
155 Sun May 11 10:25:14 1997 Michael Meissner <meissner@cygnus.com>
156
157 * cpu.h (tic80_trace_shift): Add declaration.
158 (TRACE_SHIFT): New macro to trace shift instructions.
159
160 * misc.c (tic80_trace_alu2): Align spacing.
161 (tic80_trace_shift): New function to trace shifts.
162
163 * insns (lmo): Add missing 0b prefix to bits.
164 (do_shift): Use ~ (unsigned32)0, instead of -1. Use TRACE_SHIFT
165 instead of TRACE_ALU2.
166 (sl r): Use EndMask as is, instead of using Source+1 register.
167 (subu): Operands are unsigned, not signed.
168 (do_{ld,st}): Fix endian problems with ld.d/st.d.
169
170 Sat May 10 12:35:47 1997 Michael Meissner <meissner@cygnus.com>
171
172 * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
173 signed.
174
175 Fri May 9 15:47:36 1997 Mike Meissner <meissner@cygnus.com>
176
177 * insns (cmp_vals,do_cmp): Produce the correct bits as specified
178 by the architecture.
179 (xor): Fix xor immediate patterns to use the correct bits.
180
181 Fri May 9 09:55:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
182
183 * alu.h (long_immediate): Adjust the CIA delay-pointer as well as
184 the NIA when a 64bit insn.
185
186 Thu May 8 11:57:47 1997 Michael Meissner <meissner@cygnus.com>
187
188 * insns (jsr,bsr): For non-allulled calls, set r31 so that the
189 return address does not reexecute the instruction in the delay
190 slot.
191 (bbo,bbz): Complement bit number to reverse the one's complement
192 that the assembler is required to do.
193
194 * misc.c (tic80_trace_*): Change format slightly to accomidate
195 real large decimal values.
196
197 Thu May 8 14:07:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
198
199 * sim-calls.c (sim_do_command): Implement.
200 (sim_store_register): Fix typo T2H v H2T.
201
202 Wed May 7 11:48:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
203
204 * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
205 * insn: Clean up fpu tracing.
206
207 * sim-calls.c (sim_create_inferior): Start out with interrupts
208 enabled.
209
210 * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
211 sink
212
213 * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
214
215 * insns (do_*): Remove MY_INDEX/indx argument from support functions,
216 igen now handles this.
217
218 * cpu.h (CR): New macro - access TIc80 control registers.
219
220 * misc.c: New file.
221 (tic80_cr2index): New function, map control register opcode index
222 into the internal CR enum.
223
224 * interp.c
225 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
226 here
227 * misc.c: to here.
228
229 * Makefile.in (SIM_OBJS): Add misc.o.
230
231 Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com>
232
233 * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
234 big endian hosts.
235 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
236 new functions.
237 (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
238 trace various instruction types.
239
240 * insns: Modify all instructions to support semantic tracing.
241
242 * interp.c (toplevel): Include itable.h.
243 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
244 functions to provide semantic level tracing information.
245
246 Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
247
248 * alu.h: Update usage of core object to reflect recent changes in
249 ../common/sim-*core.
250 * sim-calls.c (sim_open): Ditto.
251
252 Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
253
254 * insn (cmnd): No-op cache flushes.
255
256 * insns (do_trap): Allow writes to STDERR.
257
258 * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
259 (SIM_EXTRA_LIBS): Link in the math library.
260
261 * alu.h: Add support for floating point unit using sim-alu.
262
263 * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
264
265 Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
266
267 * sim-calls.c: Include sim-utils.h and sim-options.h.
268
269 * sim-main.h (sim_state): Drop sim_events and sim_core members,
270 moved to simulator base type.
271
272 * alu.h (IMEM, MEM, STORE): Update track changes in common
273 directory.
274
275 * insns: Drop cia argument from functions, igen now handles this.
276
277 * interp.c (engine_init): Include string.h/strings.h to define
278 memset et.al.
279
280 * sim-main.h (sim_cia): Delcare, tracking common dir changes.
281
282 * cpu.h (sim_cpu): Update instruction_address with sim_cia.
283
284 Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
285
286 * sim-main.h (signal.h): Include so that SIG* available to all
287 callers of sig_halt.
288
289 * insns (do_shift): New function, implement shift operations.
290 (do_trap): Add handler for trap 73 - SIGTRAP.
291
292 Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
293
294 * alu.h (MEM, STORE): Force addresses to be correctly aligned.
295
296 * insns (do_jsr): Fix.
297 (do_st, do_ld): Handle 64bit transfers.
298 (do_trap): Match libgloss.
299 (rdcr): Implement nop - Dest == r0 - variant.
300
301 * sim-calls.c (sim_create_inferior): Initialize SP.
302
303 * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
304 (support.o): Depends on ENGINE_H.
305
306 * cpu.h: Four accumulators.
307
308 * Makefile.in (tmp-igen): Include line number information in
309 generated files.
310
311 * insns (dld, dst): Fill in.
312
313 Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
314
315 * insns (vld): Fix instruction format wrong.
316
317 Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
318
319 * dc: Add additional rules so that minor opcode files are
320 detected.
321 * insns: Enable more instructions.
322
323 * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
324 Implement.
325
326 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
327
328 * configure: Regenerated to track ../common/aclocal.m4 changes.
329 * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
330 * sim-calls.c (sim_open): Call sim_module_uninstall if argument
331 parsing fails. Call sim_post_argv_init.
332 (sim_close): Call sim_module_uninstall.
333
334 Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
335
336 * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
337 * ic: Add fields for enabled instructions.
338
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