sim/tic80/ChangeLog

   1 Thu May 15 11:45:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * insns (do_shift): When rot==0 and zero/sign merge treat it as
   4         32.
   5         (set_fp_reg): For interger conversion, use sim-fpu fpu2i
   6         functions.
   7         (do_fmpy): Perform iii and uuu using integer arithmetic.
   8
   9         * Makefile.in (ENGINE_H): Assume everything depends on the fpu.
  10
  11         * insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned
  12         conversion.
  13         (do_fcmp): Update to use new fp compare functions. Make reg nr arg
  14         instead of reg.  Stops fp overflow.
  15         (get_fp_reg): Assume val is valid when reg == 0.
  16         (set_fp_reg): Fix double conversion.
  17
  18         * misc.c (tic80_trace_fpu1): New function, trace simple fp op.
  19
  20         * insns (do_frnd): Add tracing.
  21
  22         * cpu.h (TRACE_FPU1): Ditto.
  23
  24         * insns (do_trap): Printf formatting.
  25
  26 Wed May 14 18:05:50 1997  Mike Meissner  <meissner@cygnus.com>
  27
  28         * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other
  29         insns.  Use %g to print floating point instead of %f in case the
  30         numbers are real large.
  31
  32 Tue May 13 18:00:10 1997  Mike Meissner  <meissner@cygnus.com>
  33
  34         * insns (do_trap): For system calls that are defined, but not
  35         provided return EINVAL. Temporarily add traps 74-79 to just print
  36         the register state.
  37
  38         * interp.c (engine_{run_until_stop,step}): Before executing
  39         instructions, make sure r0 == 0.
  40
  41 Tue May 13 16:39:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  42
  43         * alu.h (IMEM): Take full cia not just IP as argument.
  44
  45         * interp.c (engine_run_until_stop): Delete handling of annuled
  46         instructions.
  47         (engine_step): Ditto.
  48
  49         * insn (do_branch): New function.
  50         (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle
  51         annuled branches.
  52
  53 Mon May 12 17:15:52 1997  Mike Meissner  <meissner@cygnus.com>
  54
  55         * insns (do_{ld,st}): Fix tracing for ld/st.
  56
  57 Mon May 12 11:12:24 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  58
  59         * sim-calls.c (sim_stop_reason): Restore keep_running after a
  60         CNTRL-C, don't re-clear it.
  61
  62         * interp.c (engine_error): stop rather than signal with SIGABRT
  63         when an error.
  64
  65         * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in
  66         rDest + 1. Also done by Michael Meissner  <meissner@cygnus.com>
  67         (do_st): Converse for store.
  68
  69         * misc.c (tic80_trace_fpu2i): Correct printf format for int type.
  70
  71 Sun May 11 11:02:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  72
  73         * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running
  74         was cleared.
  75
  76         * interp.c (engine_step): New function.  Single step the simulator
  77         taking care of cntrl-c during a step.
  78
  79         * sim-calls.c (sim_resume): Differentiate between stepping and
  80         running so that a cntrl-c during a step is reported.
  81
  82 Sun May 11 10:54:31 1997  Mark Alexander    <marka@cygnus.com>
  83
  84         * sim-calls.c (sim_fetch_register): Use correct reg base.
  85         (sim_store_register): Ditto.
  86
  87 Sun May 11 10:25:14 1997  Michael Meissner  <meissner@cygnus.com>
  88
  89         * cpu.h (tic80_trace_shift): Add declaration.
  90         (TRACE_SHIFT): New macro to trace shift instructions.
  91
  92         * misc.c (tic80_trace_alu2): Align spacing.
  93         (tic80_trace_shift): New function to trace shifts.
  94
  95         * insns (lmo): Add missing 0b prefix to bits.
  96         (do_shift): Use ~ (unsigned32)0, instead of -1.  Use TRACE_SHIFT
  97         instead of TRACE_ALU2.
  98         (sl r): Use EndMask as is, instead of using Source+1 register.
  99         (subu): Operands are unsigned, not signed.
 100         (do_{ld,st}): Fix endian problems with ld.d/st.d.
 101
 102 Sat May 10 12:35:47 1997  Michael Meissner  <meissner@cygnus.com>
 103
 104         * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
 105         signed.
 106
 107 Fri May  9 15:47:36 1997  Mike Meissner  <meissner@cygnus.com>
 108
 109         * insns (cmp_vals,do_cmp): Produce the correct bits as specified
 110         by the architecture.
 111         (xor): Fix xor immediate patterns to use the correct bits.
 112
 113 Fri May  9 09:55:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 114
 115         * alu.h (long_immediate): Adjust the CIA delay-pointer as well as
 116         the NIA when a 64bit insn.
 117
 118 Thu May  8 11:57:47 1997  Michael Meissner  <meissner@cygnus.com>
 119
 120         * insns (jsr,bsr): For non-allulled calls, set r31 so that the
 121         return address does not reexecute the instruction in the delay
 122         slot.
 123         (bbo,bbz): Complement bit number to reverse the one's complement
 124         that the assembler is required to do.
 125
 126         * misc.c (tic80_trace_*): Change format slightly to accomidate
 127         real large decimal values.
 128
 129 Thu May  8 14:07:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 130
 131         * sim-calls.c (sim_do_command): Implement.
 132         (sim_store_register): Fix typo T2H v H2T.
 133
 134 Wed May  7 11:48:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 135
 136         * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
 137         * insn: Clean up fpu tracing.
 138
 139         * sim-calls.c (sim_create_inferior): Start out with interrupts
 140         enabled.
 141
 142         * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
 143         sink
 144
 145         * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
 146
 147         * insns (do_*): Remove MY_INDEX/indx argument from support functions,
 148         igen now handles this.
 149
 150         * cpu.h (CR): New macro - access TIc80 control registers.
 151
 152         * misc.c: New file.
 153         (tic80_cr2index): New function, map control register opcode index
 154         into the internal CR enum.
 155
 156         * interp.c
 157         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
 158         here
 159         * misc.c: to here.
 160
 161         * Makefile.in (SIM_OBJS): Add misc.o.
 162
 163 Tue May  6 15:22:58 1997  Mike Meissner  <meissner@cygnus.com>
 164
 165         * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
 166         big endian hosts.
 167         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
 168         new functions.
 169         (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
 170         trace various instruction types.
 171
 172         * insns: Modify all instructions to support semantic tracing.
 173
 174         * interp.c (toplevel): Include itable.h.
 175         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
 176         functions to provide semantic level tracing information.
 177
 178 Mon May  5 11:50:43 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 179
 180         * alu.h: Update usage of core object to reflect recent changes in
 181         ../common/sim-*core.
 182         * sim-calls.c (sim_open): Ditto.
 183
 184 Mon May  5 14:10:17 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 185
 186         * insn (cmnd): No-op cache flushes.
 187
 188         * insns (do_trap): Allow writes to STDERR.
 189
 190         * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
 191         (SIM_EXTRA_LIBS): Link in the math library.
 192
 193         * alu.h: Add support for floating point unit using sim-alu.
 194
 195         * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
 196
 197 Fri May  2 14:57:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 198
 199         * sim-calls.c: Include sim-utils.h and sim-options.h.
 200
 201         * sim-main.h (sim_state): Drop sim_events and sim_core members,
 202         moved to simulator base type.
 203
 204         * alu.h (IMEM, MEM, STORE): Update track changes in common
 205         directory.
 206
 207         * insns: Drop cia argument from functions, igen now handles this.
 208
 209         * interp.c (engine_init): Include string.h/strings.h to define
 210         memset et.al.
 211
 212         * sim-main.h (sim_cia): Delcare, tracking common dir changes.
 213
 214         * cpu.h (sim_cpu): Update instruction_address with sim_cia.
 215
 216 Wed Apr 30 11:26:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 217
 218         * sim-main.h (signal.h): Include so that SIG* available to all
 219         callers of sig_halt.
 220
 221         * insns (do_shift): New function, implement shift operations.
 222         (do_trap): Add handler for trap 73 - SIGTRAP.
 223
 224 Tue Apr 29 10:58:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 225
 226         * alu.h (MEM, STORE): Force addresses to be correctly aligned.
 227
 228         * insns (do_jsr): Fix.
 229         (do_st, do_ld): Handle 64bit transfers.
 230         (do_trap): Match libgloss.
 231         (rdcr): Implement nop - Dest == r0 - variant.
 232
 233         * sim-calls.c (sim_create_inferior): Initialize SP.
 234
 235         * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
 236         (support.o): Depends on ENGINE_H.
 237
 238         * cpu.h: Four accumulators.
 239
 240         * Makefile.in (tmp-igen): Include line number information in
 241         generated files.
 242
 243         * insns (dld, dst): Fill in.
 244
 245 Mon Apr 28 13:02:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 246
 247         * insns (vld): Fix instruction format wrong.
 248
 249 Thu Apr 24 16:43:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 250
 251         * dc: Add additional rules so that minor opcode files are
 252         detected.
 253         * insns: Enable more instructions.
 254
 255         * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
 256         Implement.
 257
 258 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
 259
 260         * configure: Regenerated to track ../common/aclocal.m4 changes.
 261         * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
 262         * sim-calls.c (sim_open): Call sim_module_uninstall if argument
 263         parsing fails.  Call sim_post_argv_init.
 264         (sim_close): Call sim_module_uninstall.
 265
 266 Wed Apr 23 20:05:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 267
 268         * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
 269         * ic: Add fields for enabled instructions.
 270