1 Sat May 10 12:35:47 1997 Michael Meissner <meissner@cygnus.com>
3 * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
6 Fri May 9 15:47:36 1997 Mike Meissner <meissner@cygnus.com>
8 * insns (cmp_vals,do_cmp): Produce the correct bits as specified
10 (xor): Fix xor immediate patterns to use the correct bits.
12 Fri May 9 09:55:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
14 * alu.h (long_immediate): Adjust the CIA delay-pointer as well as
15 the NIA when a 64bit insn.
17 Thu May 8 11:57:47 1997 Michael Meissner <meissner@cygnus.com>
19 * insns (jsr,bsr): For non-allulled calls, set r31 so that the
20 return address does not reexecute the instruction in the delay
22 (bbo,bbz): Complement bit number to reverse the one's complement
23 that the assembler is required to do.
25 * misc.c (tic80_trace_*): Change format slightly to accomidate
26 real large decimal values.
28 Thu May 8 14:07:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
30 * sim-calls.c (sim_do_command): Implement.
31 (sim_store_register): Fix typo T2H v H2T.
33 Wed May 7 11:48:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
35 * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
36 * insn: Clean up fpu tracing.
38 * sim-calls.c (sim_create_inferior): Start out with interrupts
41 * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
44 * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
46 * insns (do_*): Remove MY_INDEX/indx argument from support functions,
47 igen now handles this.
49 * cpu.h (CR): New macro - access TIc80 control registers.
52 (tic80_cr2index): New function, map control register opcode index
53 into the internal CR enum.
56 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
60 * Makefile.in (SIM_OBJS): Add misc.o.
62 Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com>
64 * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
66 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
68 (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
69 trace various instruction types.
71 * insns: Modify all instructions to support semantic tracing.
73 * interp.c (toplevel): Include itable.h.
74 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
75 functions to provide semantic level tracing information.
77 Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
79 * alu.h: Update usage of core object to reflect recent changes in
81 * sim-calls.c (sim_open): Ditto.
83 Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
85 * insn (cmnd): No-op cache flushes.
87 * insns (do_trap): Allow writes to STDERR.
89 * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
90 (SIM_EXTRA_LIBS): Link in the math library.
92 * alu.h: Add support for floating point unit using sim-alu.
94 * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
96 Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
98 * sim-calls.c: Include sim-utils.h and sim-options.h.
100 * sim-main.h (sim_state): Drop sim_events and sim_core members,
101 moved to simulator base type.
103 * alu.h (IMEM, MEM, STORE): Update track changes in common
106 * insns: Drop cia argument from functions, igen now handles this.
108 * interp.c (engine_init): Include string.h/strings.h to define
111 * sim-main.h (sim_cia): Delcare, tracking common dir changes.
113 * cpu.h (sim_cpu): Update instruction_address with sim_cia.
115 Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
117 * sim-main.h (signal.h): Include so that SIG* available to all
120 * insns (do_shift): New function, implement shift operations.
121 (do_trap): Add handler for trap 73 - SIGTRAP.
123 Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
125 * alu.h (MEM, STORE): Force addresses to be correctly aligned.
127 * insns (do_jsr): Fix.
128 (do_st, do_ld): Handle 64bit transfers.
129 (do_trap): Match libgloss.
130 (rdcr): Implement nop - Dest == r0 - variant.
132 * sim-calls.c (sim_create_inferior): Initialize SP.
134 * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
135 (support.o): Depends on ENGINE_H.
137 * cpu.h: Four accumulators.
139 * Makefile.in (tmp-igen): Include line number information in
142 * insns (dld, dst): Fill in.
144 Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
146 * insns (vld): Fix instruction format wrong.
148 Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
150 * dc: Add additional rules so that minor opcode files are
152 * insns: Enable more instructions.
154 * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
157 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
159 * configure: Regenerated to track ../common/aclocal.m4 changes.
160 * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
161 * sim-calls.c (sim_open): Call sim_module_uninstall if argument
162 parsing fails. Call sim_post_argv_init.
163 (sim_close): Call sim_module_uninstall.
165 Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
167 * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
168 * ic: Add fields for enabled instructions.