1 Wed May 7 11:48:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
3 * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
4 * insn: Clean up fpu tracing.
6 * sim-calls.c (sim_create_inferior): Start out with interrupts
9 * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
12 * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
14 * insns (do_*): Remove MY_INDEX/indx argument from support functions,
15 igen now handles this.
17 * cpu.h (CR): New macro - access TIc80 control registers.
20 (tic80_cr2index): New function, map control register opcode index
21 into the internal CR enum.
24 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
28 * Makefile.in (SIM_OBJS): Add misc.o.
30 Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com>
32 * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
34 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
36 (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
37 trace various instruction types.
39 * insns: Modify all instructions to support semantic tracing.
41 * interp.c (toplevel): Include itable.h.
42 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
43 functions to provide semantic level tracing information.
45 Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
47 * alu.h: Update usage of core object to reflect recent changes in
49 * sim-calls.c (sim_open): Ditto.
51 Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
53 * insn (cmnd): No-op cache flushes.
55 * insns (do_trap): Allow writes to STDERR.
57 * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
58 (SIM_EXTRA_LIBS): Link in the math library.
60 * alu.h: Add support for floating point unit using sim-alu.
62 * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
64 Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
66 * sim-calls.c: Include sim-utils.h and sim-options.h.
68 * sim-main.h (sim_state): Drop sim_events and sim_core members,
69 moved to simulator base type.
71 * alu.h (IMEM, MEM, STORE): Update track changes in common
74 * insns: Drop cia argument from functions, igen now handles this.
76 * interp.c (engine_init): Include string.h/strings.h to define
79 * sim-main.h (sim_cia): Delcare, tracking common dir changes.
81 * cpu.h (sim_cpu): Update instruction_address with sim_cia.
83 Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
85 * sim-main.h (signal.h): Include so that SIG* available to all
88 * insns (do_shift): New function, implement shift operations.
89 (do_trap): Add handler for trap 73 - SIGTRAP.
91 Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
93 * alu.h (MEM, STORE): Force addresses to be correctly aligned.
95 * insns (do_jsr): Fix.
96 (do_st, do_ld): Handle 64bit transfers.
97 (do_trap): Match libgloss.
98 (rdcr): Implement nop - Dest == r0 - variant.
100 * sim-calls.c (sim_create_inferior): Initialize SP.
102 * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
103 (support.o): Depends on ENGINE_H.
105 * cpu.h: Four accumulators.
107 * Makefile.in (tmp-igen): Include line number information in
110 * insns (dld, dst): Fill in.
112 Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
114 * insns (vld): Fix instruction format wrong.
116 Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
118 * dc: Add additional rules so that minor opcode files are
120 * insns: Enable more instructions.
122 * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
125 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
127 * configure: Regenerated to track ../common/aclocal.m4 changes.
128 * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
129 * sim-calls.c (sim_open): Call sim_module_uninstall if argument
130 parsing fails. Call sim_post_argv_init.
131 (sim_close): Call sim_module_uninstall.
133 Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
135 * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
136 * ic: Add fields for enabled instructions.