1 Tue Aug 26 10:42:13 1997 Andrew Cagney <cagney@b1.cygnus.com>
3 * sim-calls.c (sim_kill): Delete.
5 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
7 * configure: Regenerated to track ../common/aclocal.m4 changes.
10 Mon Aug 25 16:33:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
12 * sim-calls.c (sim_open): Add ABFD argument.
13 (sim_open): Move sim_config call to just after argument
14 parsing. Check return status.
16 Fri Aug 8 21:52:27 1997 Mark Alexander <marka@cygnus.com>
18 * sim-calls.c (sim_store_register): Allow accumulators
19 other than A0 to be modified. Correct error message.
21 Thu May 29 14:02:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
23 * misc.c (tic80_trace_fpu3, tic80_trace_fpu2, tic80_trace_fpu1,
24 tic80_trace_fpu2i): Pass in function prefix.
25 (tic80_trace_ldst): Rewrite so it calls print_one_insn directly.
27 * Makefile.in (SIM_OBJS): Include sim-watch.o module.
29 * sim-main.h (WITH_WATCHPOINTS): Enable watchpoints.
31 * ic (bitnum): Compute bitnum from BITNUM.
32 * insn (bbo, bbz): Use.
34 * insn: Convert long immediate instructions to igen long immediate
36 * insn: Add disasembler information.
38 Thu May 29 12:09:13 1997 Andrew Cagney <cagney@b2.cygnus.com>
40 * alu.h (IMEM_IMMED): New macro, fetch 32bit immediate operand N.
42 * insns (subu i): Immediate is signed not unsigned.
44 Tue May 27 13:22:13 1997 Andrew Cagney <cagney@b1.cygnus.com>
46 * sim-calls.c (sim_read): Pass NULL cpu to sim_core_read_buffer.
47 (sim_write): Ditto for write.
49 Tue May 20 09:33:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
51 * sim-calls.c (sim_load): Set STATE_LOADED_P.
53 * sim-main.h: Include <unistd.h>.
55 * sim-calls.c (sim_set_callback): Delete.
56 (sim_open): Add/install callback argument.
59 Mon May 19 18:59:33 1997 Mike Meissner <meissner@cygnus.com>
61 * configure.in: Check for getpid, kill functions.
62 * config{.in,ure}: Regenerate.
64 * insns (do_trap): Add support for kill, getpid system calls.
66 * sim-main.h (errno.h): Include.
67 (getpid,kill): Define as NOPs if the host doesn't have them.
69 Mon May 19 14:58:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
71 * sim-calls.c (sim_open): Set the simulator base magic number.
72 (sim_load): Delete prototype of sim_load_file.
73 (sim_open): Define sd to be &simulation.
75 Fri May 16 14:35:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
77 * insns (illegal, fp_unavailable): Halt instead of abort the
80 * insns: Replace calls to engine_error with sim_engine_abort.
81 Ditto for engine_halt V sim_engine_halt.
83 Tue May 13 15:24:12 1997 Andrew Cagney <cagney@b2.cygnus.com>
85 * interp.c (engine_run_until_stop): Delete. Moved to common.
89 (engine_restart): Ditto.
91 (engine_error): Ditto.
93 * sim-calls.c (sim_stop): Delete. Moved to common.
94 (sim_stop_reason): Ditto.
97 * Makefile.in (SIM_OBJS): Link in generic sim-engine, sim-run,
98 sim-resume, sim-reason, sim-stop modules.
100 Fri May 16 11:57:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
102 * ic (compute): Drop check for REG == 0, now always forced to
105 * cpu.h (GPR_SET): New macro update the gpr.
106 * insns (do_add): Use GPR_SET to update the GPR register.
108 * sim-calls.c (sim_fetch_register): Pretend that r0 is zero.
110 * Makefile.in (tmp-igen): Specify zero-r0 so that every
111 instruction clears r0.
113 * interp.c (engine_run_until_stop): Igen now generates code to
115 (engine_step): Ditto.
117 Thu May 15 11:45:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
119 * insns (do_shift): When rot==0 and zero/sign merge treat it as
121 (set_fp_reg): For interger conversion, use sim-fpu fpu2i
123 (do_fmpy): Perform iii and uuu using integer arithmetic.
125 * Makefile.in (ENGINE_H): Assume everything depends on the fpu.
127 * insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned
129 (do_fcmp): Update to use new fp compare functions. Make reg nr arg
130 instead of reg. Stops fp overflow.
131 (get_fp_reg): Assume val is valid when reg == 0.
132 (set_fp_reg): Fix double conversion.
134 * misc.c (tic80_trace_fpu1): New function, trace simple fp op.
136 * insns (do_frnd): Add tracing.
138 * cpu.h (TRACE_FPU1): Ditto.
140 * insns (do_trap): Printf formatting.
142 Wed May 14 18:05:50 1997 Mike Meissner <meissner@cygnus.com>
144 * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other
145 insns. Use %g to print floating point instead of %f in case the
146 numbers are real large.
148 Tue May 13 18:00:10 1997 Mike Meissner <meissner@cygnus.com>
150 * insns (do_trap): For system calls that are defined, but not
151 provided return EINVAL. Temporarily add traps 74-79 to just print
154 * interp.c (engine_{run_until_stop,step}): Before executing
155 instructions, make sure r0 == 0.
157 Tue May 13 16:39:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
159 * alu.h (IMEM): Take full cia not just IP as argument.
161 * interp.c (engine_run_until_stop): Delete handling of annuled
163 (engine_step): Ditto.
165 * insn (do_branch): New function.
166 (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle
169 Mon May 12 17:15:52 1997 Mike Meissner <meissner@cygnus.com>
171 * insns (do_{ld,st}): Fix tracing for ld/st.
173 Mon May 12 11:12:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
175 * sim-calls.c (sim_stop_reason): Restore keep_running after a
176 CNTRL-C, don't re-clear it.
178 * interp.c (engine_error): stop rather than signal with SIGABRT
181 * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in
182 rDest + 1. Also done by Michael Meissner <meissner@cygnus.com>
183 (do_st): Converse for store.
185 * misc.c (tic80_trace_fpu2i): Correct printf format for int type.
187 Sun May 11 11:02:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
189 * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running
192 * interp.c (engine_step): New function. Single step the simulator
193 taking care of cntrl-c during a step.
195 * sim-calls.c (sim_resume): Differentiate between stepping and
196 running so that a cntrl-c during a step is reported.
198 Sun May 11 10:54:31 1997 Mark Alexander <marka@cygnus.com>
200 * sim-calls.c (sim_fetch_register): Use correct reg base.
201 (sim_store_register): Ditto.
203 Sun May 11 10:25:14 1997 Michael Meissner <meissner@cygnus.com>
205 * cpu.h (tic80_trace_shift): Add declaration.
206 (TRACE_SHIFT): New macro to trace shift instructions.
208 * misc.c (tic80_trace_alu2): Align spacing.
209 (tic80_trace_shift): New function to trace shifts.
211 * insns (lmo): Add missing 0b prefix to bits.
212 (do_shift): Use ~ (unsigned32)0, instead of -1. Use TRACE_SHIFT
213 instead of TRACE_ALU2.
214 (sl r): Use EndMask as is, instead of using Source+1 register.
215 (subu): Operands are unsigned, not signed.
216 (do_{ld,st}): Fix endian problems with ld.d/st.d.
218 Sat May 10 12:35:47 1997 Michael Meissner <meissner@cygnus.com>
220 * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
223 Fri May 9 15:47:36 1997 Mike Meissner <meissner@cygnus.com>
225 * insns (cmp_vals,do_cmp): Produce the correct bits as specified
227 (xor): Fix xor immediate patterns to use the correct bits.
229 Fri May 9 09:55:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
231 * alu.h (long_immediate): Adjust the CIA delay-pointer as well as
232 the NIA when a 64bit insn.
234 Thu May 8 11:57:47 1997 Michael Meissner <meissner@cygnus.com>
236 * insns (jsr,bsr): For non-allulled calls, set r31 so that the
237 return address does not reexecute the instruction in the delay
239 (bbo,bbz): Complement bit number to reverse the one's complement
240 that the assembler is required to do.
242 * misc.c (tic80_trace_*): Change format slightly to accomidate
243 real large decimal values.
245 Thu May 8 14:07:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
247 * sim-calls.c (sim_do_command): Implement.
248 (sim_store_register): Fix typo T2H v H2T.
250 Wed May 7 11:48:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
252 * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
253 * insn: Clean up fpu tracing.
255 * sim-calls.c (sim_create_inferior): Start out with interrupts
258 * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
261 * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
263 * insns (do_*): Remove MY_INDEX/indx argument from support functions,
264 igen now handles this.
266 * cpu.h (CR): New macro - access TIc80 control registers.
269 (tic80_cr2index): New function, map control register opcode index
270 into the internal CR enum.
273 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
277 * Makefile.in (SIM_OBJS): Add misc.o.
279 Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com>
281 * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
283 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
285 (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
286 trace various instruction types.
288 * insns: Modify all instructions to support semantic tracing.
290 * interp.c (toplevel): Include itable.h.
291 (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
292 functions to provide semantic level tracing information.
294 Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
296 * alu.h: Update usage of core object to reflect recent changes in
298 * sim-calls.c (sim_open): Ditto.
300 Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
302 * insn (cmnd): No-op cache flushes.
304 * insns (do_trap): Allow writes to STDERR.
306 * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
307 (SIM_EXTRA_LIBS): Link in the math library.
309 * alu.h: Add support for floating point unit using sim-alu.
311 * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
313 Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
315 * sim-calls.c: Include sim-utils.h and sim-options.h.
317 * sim-main.h (sim_state): Drop sim_events and sim_core members,
318 moved to simulator base type.
320 * alu.h (IMEM, MEM, STORE): Update track changes in common
323 * insns: Drop cia argument from functions, igen now handles this.
325 * interp.c (engine_init): Include string.h/strings.h to define
328 * sim-main.h (sim_cia): Delcare, tracking common dir changes.
330 * cpu.h (sim_cpu): Update instruction_address with sim_cia.
332 Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
334 * sim-main.h (signal.h): Include so that SIG* available to all
337 * insns (do_shift): New function, implement shift operations.
338 (do_trap): Add handler for trap 73 - SIGTRAP.
340 Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
342 * alu.h (MEM, STORE): Force addresses to be correctly aligned.
344 * insns (do_jsr): Fix.
345 (do_st, do_ld): Handle 64bit transfers.
346 (do_trap): Match libgloss.
347 (rdcr): Implement nop - Dest == r0 - variant.
349 * sim-calls.c (sim_create_inferior): Initialize SP.
351 * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
352 (support.o): Depends on ENGINE_H.
354 * cpu.h: Four accumulators.
356 * Makefile.in (tmp-igen): Include line number information in
359 * insns (dld, dst): Fill in.
361 Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
363 * insns (vld): Fix instruction format wrong.
365 Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
367 * dc: Add additional rules so that minor opcode files are
369 * insns: Enable more instructions.
371 * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
374 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
376 * configure: Regenerated to track ../common/aclocal.m4 changes.
377 * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
378 * sim-calls.c (sim_open): Call sim_module_uninstall if argument
379 parsing fails. Call sim_post_argv_init.
380 (sim_close): Call sim_module_uninstall.
382 Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
384 * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
385 * ic: Add fields for enabled instructions.