sim/tic80/ChangeLog

   1 Mon May 19 18:59:33 1997  Mike Meissner  <meissner@cygnus.com>
   2
   3         * configure.in: Check for getpid, kill functions.
   4         * config{.in,ure}: Regenerate.
   5
   6         * insns (do_trap): Add support for kill, getpid system calls.
   7
   8         * sim-main.h (errno.h): Include.
   9         (getpid,kill): Define as NOPs if the host doesn't have them.
  10
  11 Mon May 19 14:58:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  12
  13         * sim-calls.c (sim_open): Set the simulator base magic number.
  14         (sim_load): Delete prototype of sim_load_file.
  15         (sim_open): Define sd to be &simulation.
  16
  17 Fri May 16 14:35:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  18
  19         * insns (illegal, fp_unavailable): Halt instead of abort the
  20         simulator.
  21
  22         * insns: Replace calls to engine_error with sim_engine_abort.
  23         Ditto for engine_halt V sim_engine_halt.
  24
  25 Tue May 13 15:24:12 1997  Andrew Cagney  <cagney@b2.cygnus.com>
  26
  27         * interp.c (engine_run_until_stop): Delete. Moved to common.
  28         (engine_step): Ditto.
  29         (engine_step): Ditto.
  30         (engine_halt): Ditto.
  31         (engine_restart): Ditto.
  32         (engine_halt): Ditto.
  33         (engine_error): Ditto.
  34
  35         * sim-calls.c (sim_stop): Delete. Moved to common.
  36         (sim_stop_reason): Ditto.
  37         (sim_resume): Ditto.
  38
  39         * Makefile.in (SIM_OBJS): Link in generic sim-engine, sim-run,
  40         sim-resume, sim-reason, sim-stop modules.
  41
  42 Fri May 16 11:57:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  43
  44         * ic (compute): Drop check for REG == 0, now always forced to
  45         zero.
  46
  47         * cpu.h (GPR_SET): New macro update the gpr.
  48         * insns (do_add): Use GPR_SET to update the GPR register.
  49
  50         * sim-calls.c (sim_fetch_register): Pretend that r0 is zero.
  51
  52         * Makefile.in (tmp-igen): Specify zero-r0 so that every
  53         instruction clears r0.
  54
  55         * interp.c (engine_run_until_stop): Igen now generates code to
  56         clear r0.
  57         (engine_step): Ditto.
  58
  59 Thu May 15 11:45:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  60
  61         * insns (do_shift): When rot==0 and zero/sign merge treat it as
  62         32.
  63         (set_fp_reg): For interger conversion, use sim-fpu fpu2i
  64         functions.
  65         (do_fmpy): Perform iii and uuu using integer arithmetic.
  66
  67         * Makefile.in (ENGINE_H): Assume everything depends on the fpu.
  68
  69         * insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned
  70         conversion.
  71         (do_fcmp): Update to use new fp compare functions. Make reg nr arg
  72         instead of reg.  Stops fp overflow.
  73         (get_fp_reg): Assume val is valid when reg == 0.
  74         (set_fp_reg): Fix double conversion.
  75
  76         * misc.c (tic80_trace_fpu1): New function, trace simple fp op.
  77
  78         * insns (do_frnd): Add tracing.
  79
  80         * cpu.h (TRACE_FPU1): Ditto.
  81
  82         * insns (do_trap): Printf formatting.
  83
  84 Wed May 14 18:05:50 1997  Mike Meissner  <meissner@cygnus.com>
  85
  86         * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other
  87         insns.  Use %g to print floating point instead of %f in case the
  88         numbers are real large.
  89
  90 Tue May 13 18:00:10 1997  Mike Meissner  <meissner@cygnus.com>
  91
  92         * insns (do_trap): For system calls that are defined, but not
  93         provided return EINVAL. Temporarily add traps 74-79 to just print
  94         the register state.
  95
  96         * interp.c (engine_{run_until_stop,step}): Before executing
  97         instructions, make sure r0 == 0.
  98
  99 Tue May 13 16:39:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 100
 101         * alu.h (IMEM): Take full cia not just IP as argument.
 102
 103         * interp.c (engine_run_until_stop): Delete handling of annuled
 104         instructions.
 105         (engine_step): Ditto.
 106
 107         * insn (do_branch): New function.
 108         (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle
 109         annuled branches.
 110
 111 Mon May 12 17:15:52 1997  Mike Meissner  <meissner@cygnus.com>
 112
 113         * insns (do_{ld,st}): Fix tracing for ld/st.
 114
 115 Mon May 12 11:12:24 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 116
 117         * sim-calls.c (sim_stop_reason): Restore keep_running after a
 118         CNTRL-C, don't re-clear it.
 119
 120         * interp.c (engine_error): stop rather than signal with SIGABRT
 121         when an error.
 122
 123         * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in
 124         rDest + 1. Also done by Michael Meissner  <meissner@cygnus.com>
 125         (do_st): Converse for store.
 126
 127         * misc.c (tic80_trace_fpu2i): Correct printf format for int type.
 128
 129 Sun May 11 11:02:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 130
 131         * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running
 132         was cleared.
 133
 134         * interp.c (engine_step): New function.  Single step the simulator
 135         taking care of cntrl-c during a step.
 136
 137         * sim-calls.c (sim_resume): Differentiate between stepping and
 138         running so that a cntrl-c during a step is reported.
 139
 140 Sun May 11 10:54:31 1997  Mark Alexander    <marka@cygnus.com>
 141
 142         * sim-calls.c (sim_fetch_register): Use correct reg base.
 143         (sim_store_register): Ditto.
 144
 145 Sun May 11 10:25:14 1997  Michael Meissner  <meissner@cygnus.com>
 146
 147         * cpu.h (tic80_trace_shift): Add declaration.
 148         (TRACE_SHIFT): New macro to trace shift instructions.
 149
 150         * misc.c (tic80_trace_alu2): Align spacing.
 151         (tic80_trace_shift): New function to trace shifts.
 152
 153         * insns (lmo): Add missing 0b prefix to bits.
 154         (do_shift): Use ~ (unsigned32)0, instead of -1.  Use TRACE_SHIFT
 155         instead of TRACE_ALU2.
 156         (sl r): Use EndMask as is, instead of using Source+1 register.
 157         (subu): Operands are unsigned, not signed.
 158         (do_{ld,st}): Fix endian problems with ld.d/st.d.
 159
 160 Sat May 10 12:35:47 1997  Michael Meissner  <meissner@cygnus.com>
 161
 162         * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
 163         signed.
 164
 165 Fri May  9 15:47:36 1997  Mike Meissner  <meissner@cygnus.com>
 166
 167         * insns (cmp_vals,do_cmp): Produce the correct bits as specified
 168         by the architecture.
 169         (xor): Fix xor immediate patterns to use the correct bits.
 170
 171 Fri May  9 09:55:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 172
 173         * alu.h (long_immediate): Adjust the CIA delay-pointer as well as
 174         the NIA when a 64bit insn.
 175
 176 Thu May  8 11:57:47 1997  Michael Meissner  <meissner@cygnus.com>
 177
 178         * insns (jsr,bsr): For non-allulled calls, set r31 so that the
 179         return address does not reexecute the instruction in the delay
 180         slot.
 181         (bbo,bbz): Complement bit number to reverse the one's complement
 182         that the assembler is required to do.
 183
 184         * misc.c (tic80_trace_*): Change format slightly to accomidate
 185         real large decimal values.
 186
 187 Thu May  8 14:07:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 188
 189         * sim-calls.c (sim_do_command): Implement.
 190         (sim_store_register): Fix typo T2H v H2T.
 191
 192 Wed May  7 11:48:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 193
 194         * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
 195         * insn: Clean up fpu tracing.
 196
 197         * sim-calls.c (sim_create_inferior): Start out with interrupts
 198         enabled.
 199
 200         * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
 201         sink
 202
 203         * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
 204
 205         * insns (do_*): Remove MY_INDEX/indx argument from support functions,
 206         igen now handles this.
 207
 208         * cpu.h (CR): New macro - access TIc80 control registers.
 209
 210         * misc.c: New file.
 211         (tic80_cr2index): New function, map control register opcode index
 212         into the internal CR enum.
 213
 214         * interp.c
 215         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
 216         here
 217         * misc.c: to here.
 218
 219         * Makefile.in (SIM_OBJS): Add misc.o.
 220
 221 Tue May  6 15:22:58 1997  Mike Meissner  <meissner@cygnus.com>
 222
 223         * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
 224         big endian hosts.
 225         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
 226         new functions.
 227         (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
 228         trace various instruction types.
 229
 230         * insns: Modify all instructions to support semantic tracing.
 231
 232         * interp.c (toplevel): Include itable.h.
 233         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
 234         functions to provide semantic level tracing information.
 235
 236 Mon May  5 11:50:43 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 237
 238         * alu.h: Update usage of core object to reflect recent changes in
 239         ../common/sim-*core.
 240         * sim-calls.c (sim_open): Ditto.
 241
 242 Mon May  5 14:10:17 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 243
 244         * insn (cmnd): No-op cache flushes.
 245
 246         * insns (do_trap): Allow writes to STDERR.
 247
 248         * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
 249         (SIM_EXTRA_LIBS): Link in the math library.
 250
 251         * alu.h: Add support for floating point unit using sim-alu.
 252
 253         * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
 254
 255 Fri May  2 14:57:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 256
 257         * sim-calls.c: Include sim-utils.h and sim-options.h.
 258
 259         * sim-main.h (sim_state): Drop sim_events and sim_core members,
 260         moved to simulator base type.
 261
 262         * alu.h (IMEM, MEM, STORE): Update track changes in common
 263         directory.
 264
 265         * insns: Drop cia argument from functions, igen now handles this.
 266
 267         * interp.c (engine_init): Include string.h/strings.h to define
 268         memset et.al.
 269
 270         * sim-main.h (sim_cia): Delcare, tracking common dir changes.
 271
 272         * cpu.h (sim_cpu): Update instruction_address with sim_cia.
 273
 274 Wed Apr 30 11:26:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 275
 276         * sim-main.h (signal.h): Include so that SIG* available to all
 277         callers of sig_halt.
 278
 279         * insns (do_shift): New function, implement shift operations.
 280         (do_trap): Add handler for trap 73 - SIGTRAP.
 281
 282 Tue Apr 29 10:58:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 283
 284         * alu.h (MEM, STORE): Force addresses to be correctly aligned.
 285
 286         * insns (do_jsr): Fix.
 287         (do_st, do_ld): Handle 64bit transfers.
 288         (do_trap): Match libgloss.
 289         (rdcr): Implement nop - Dest == r0 - variant.
 290
 291         * sim-calls.c (sim_create_inferior): Initialize SP.
 292
 293         * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
 294         (support.o): Depends on ENGINE_H.
 295
 296         * cpu.h: Four accumulators.
 297
 298         * Makefile.in (tmp-igen): Include line number information in
 299         generated files.
 300
 301         * insns (dld, dst): Fill in.
 302
 303 Mon Apr 28 13:02:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 304
 305         * insns (vld): Fix instruction format wrong.
 306
 307 Thu Apr 24 16:43:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 308
 309         * dc: Add additional rules so that minor opcode files are
 310         detected.
 311         * insns: Enable more instructions.
 312
 313         * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
 314         Implement.
 315
 316 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
 317
 318         * configure: Regenerated to track ../common/aclocal.m4 changes.
 319         * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
 320         * sim-calls.c (sim_open): Call sim_module_uninstall if argument
 321         parsing fails.  Call sim_post_argv_init.
 322         (sim_close): Call sim_module_uninstall.
 323
 324 Wed Apr 23 20:05:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 325
 326         * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
 327         * ic: Add fields for enabled instructions.
 328