sim/tic80/ChangeLog

   1 Thu May 15 11:45:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned
   4         conversion.
   5         (do_fcmp): Update to use new fp compare functions. Make reg nr arg
   6         instead of reg.  Stops fp overflow.
   7         (get_fp_reg): Assume val is valid when reg == 0.
   8         (set_fp_reg): Fix double conversion.
   9
  10         * misc.c (tic80_trace_fpu1): New function, trace simple fp op.
  11
  12         * insns (do_frnd): Add tracing.
  13
  14         * cpu.h (TRACE_FPU1): Ditto.
  15
  16         * insns (do_trap): Printf formatting.
  17
  18 Wed May 14 18:05:50 1997  Mike Meissner  <meissner@cygnus.com>
  19
  20         * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other
  21         insns.  Use %g to print floating point instead of %f in case the
  22         numbers are real large.
  23
  24 Tue May 13 18:00:10 1997  Mike Meissner  <meissner@cygnus.com>
  25
  26         * insns (do_trap): For system calls that are defined, but not
  27         provided return EINVAL. Temporarily add traps 74-79 to just print
  28         the register state.
  29
  30         * interp.c (engine_{run_until_stop,step}): Before executing
  31         instructions, make sure r0 == 0.
  32
  33 Tue May 13 16:39:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  34
  35         * alu.h (IMEM): Take full cia not just IP as argument.
  36
  37         * interp.c (engine_run_until_stop): Delete handling of annuled
  38         instructions.
  39         (engine_step): Ditto.
  40
  41         * insn (do_branch): New function.
  42         (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle
  43         annuled branches.
  44
  45 Mon May 12 17:15:52 1997  Mike Meissner  <meissner@cygnus.com>
  46
  47         * insns (do_{ld,st}): Fix tracing for ld/st.
  48
  49 Mon May 12 11:12:24 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  50
  51         * sim-calls.c (sim_stop_reason): Restore keep_running after a
  52         CNTRL-C, don't re-clear it.
  53
  54         * interp.c (engine_error): stop rather than signal with SIGABRT
  55         when an error.
  56
  57         * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in
  58         rDest + 1. Also done by Michael Meissner  <meissner@cygnus.com>
  59         (do_st): Converse for store.
  60
  61         * misc.c (tic80_trace_fpu2i): Correct printf format for int type.
  62
  63 Sun May 11 11:02:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  64
  65         * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running
  66         was cleared.
  67
  68         * interp.c (engine_step): New function.  Single step the simulator
  69         taking care of cntrl-c during a step.
  70
  71         * sim-calls.c (sim_resume): Differentiate between stepping and
  72         running so that a cntrl-c during a step is reported.
  73
  74 Sun May 11 10:54:31 1997  Mark Alexander    <marka@cygnus.com>
  75
  76         * sim-calls.c (sim_fetch_register): Use correct reg base.
  77         (sim_store_register): Ditto.
  78
  79 Sun May 11 10:25:14 1997  Michael Meissner  <meissner@cygnus.com>
  80
  81         * cpu.h (tic80_trace_shift): Add declaration.
  82         (TRACE_SHIFT): New macro to trace shift instructions.
  83
  84         * misc.c (tic80_trace_alu2): Align spacing.
  85         (tic80_trace_shift): New function to trace shifts.
  86
  87         * insns (lmo): Add missing 0b prefix to bits.
  88         (do_shift): Use ~ (unsigned32)0, instead of -1.  Use TRACE_SHIFT
  89         instead of TRACE_ALU2.
  90         (sl r): Use EndMask as is, instead of using Source+1 register.
  91         (subu): Operands are unsigned, not signed.
  92         (do_{ld,st}): Fix endian problems with ld.d/st.d.
  93
  94 Sat May 10 12:35:47 1997  Michael Meissner  <meissner@cygnus.com>
  95
  96         * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
  97         signed.
  98
  99 Fri May  9 15:47:36 1997  Mike Meissner  <meissner@cygnus.com>
 100
 101         * insns (cmp_vals,do_cmp): Produce the correct bits as specified
 102         by the architecture.
 103         (xor): Fix xor immediate patterns to use the correct bits.
 104
 105 Fri May  9 09:55:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 106
 107         * alu.h (long_immediate): Adjust the CIA delay-pointer as well as
 108         the NIA when a 64bit insn.
 109
 110 Thu May  8 11:57:47 1997  Michael Meissner  <meissner@cygnus.com>
 111
 112         * insns (jsr,bsr): For non-allulled calls, set r31 so that the
 113         return address does not reexecute the instruction in the delay
 114         slot.
 115         (bbo,bbz): Complement bit number to reverse the one's complement
 116         that the assembler is required to do.
 117
 118         * misc.c (tic80_trace_*): Change format slightly to accomidate
 119         real large decimal values.
 120
 121 Thu May  8 14:07:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 122
 123         * sim-calls.c (sim_do_command): Implement.
 124         (sim_store_register): Fix typo T2H v H2T.
 125
 126 Wed May  7 11:48:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 127
 128         * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
 129         * insn: Clean up fpu tracing.
 130
 131         * sim-calls.c (sim_create_inferior): Start out with interrupts
 132         enabled.
 133
 134         * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
 135         sink
 136
 137         * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
 138
 139         * insns (do_*): Remove MY_INDEX/indx argument from support functions,
 140         igen now handles this.
 141
 142         * cpu.h (CR): New macro - access TIc80 control registers.
 143
 144         * misc.c: New file.
 145         (tic80_cr2index): New function, map control register opcode index
 146         into the internal CR enum.
 147
 148         * interp.c
 149         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
 150         here
 151         * misc.c: to here.
 152
 153         * Makefile.in (SIM_OBJS): Add misc.o.
 154
 155 Tue May  6 15:22:58 1997  Mike Meissner  <meissner@cygnus.com>
 156
 157         * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
 158         big endian hosts.
 159         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
 160         new functions.
 161         (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
 162         trace various instruction types.
 163
 164         * insns: Modify all instructions to support semantic tracing.
 165
 166         * interp.c (toplevel): Include itable.h.
 167         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
 168         functions to provide semantic level tracing information.
 169
 170 Mon May  5 11:50:43 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 171
 172         * alu.h: Update usage of core object to reflect recent changes in
 173         ../common/sim-*core.
 174         * sim-calls.c (sim_open): Ditto.
 175
 176 Mon May  5 14:10:17 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 177
 178         * insn (cmnd): No-op cache flushes.
 179
 180         * insns (do_trap): Allow writes to STDERR.
 181
 182         * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
 183         (SIM_EXTRA_LIBS): Link in the math library.
 184
 185         * alu.h: Add support for floating point unit using sim-alu.
 186
 187         * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
 188
 189 Fri May  2 14:57:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 190
 191         * sim-calls.c: Include sim-utils.h and sim-options.h.
 192
 193         * sim-main.h (sim_state): Drop sim_events and sim_core members,
 194         moved to simulator base type.
 195
 196         * alu.h (IMEM, MEM, STORE): Update track changes in common
 197         directory.
 198
 199         * insns: Drop cia argument from functions, igen now handles this.
 200
 201         * interp.c (engine_init): Include string.h/strings.h to define
 202         memset et.al.
 203
 204         * sim-main.h (sim_cia): Delcare, tracking common dir changes.
 205
 206         * cpu.h (sim_cpu): Update instruction_address with sim_cia.
 207
 208 Wed Apr 30 11:26:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 209
 210         * sim-main.h (signal.h): Include so that SIG* available to all
 211         callers of sig_halt.
 212
 213         * insns (do_shift): New function, implement shift operations.
 214         (do_trap): Add handler for trap 73 - SIGTRAP.
 215
 216 Tue Apr 29 10:58:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 217
 218         * alu.h (MEM, STORE): Force addresses to be correctly aligned.
 219
 220         * insns (do_jsr): Fix.
 221         (do_st, do_ld): Handle 64bit transfers.
 222         (do_trap): Match libgloss.
 223         (rdcr): Implement nop - Dest == r0 - variant.
 224
 225         * sim-calls.c (sim_create_inferior): Initialize SP.
 226
 227         * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
 228         (support.o): Depends on ENGINE_H.
 229
 230         * cpu.h: Four accumulators.
 231
 232         * Makefile.in (tmp-igen): Include line number information in
 233         generated files.
 234
 235         * insns (dld, dst): Fill in.
 236
 237 Mon Apr 28 13:02:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 238
 239         * insns (vld): Fix instruction format wrong.
 240
 241 Thu Apr 24 16:43:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 242
 243         * dc: Add additional rules so that minor opcode files are
 244         detected.
 245         * insns: Enable more instructions.
 246
 247         * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
 248         Implement.
 249
 250 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
 251
 252         * configure: Regenerated to track ../common/aclocal.m4 changes.
 253         * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
 254         * sim-calls.c (sim_open): Call sim_module_uninstall if argument
 255         parsing fails.  Call sim_post_argv_init.
 256         (sim_close): Call sim_module_uninstall.
 257
 258 Wed Apr 23 20:05:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 259
 260         * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
 261         * ic: Add fields for enabled instructions.
 262