TIc80 simulator checkpoint - runs 3 instructions - trap, addu, br.a.
[deliverable/binutils-gdb.git] / sim / tic80 / Makefile.in
1 # Makefile for blah ...
2 # Copyright blah ...
3
4
5
6 ## COMMON_PRE_CONFIG_FRAG
7
8 # These variables are given default values in COMMON_PRE_CONFIG_FRAG.
9 # We override the ones we need to here.
10 # Not all of these need to be mentioned, only the necessary ones.
11
12 # List of object files, less common parts.
13 SIM_OBJS = sim-endian.o sim-bits.o sim-config.o interp.o \
14 support.o idecode.o semantics.o itable.o \
15 sim-calls.o \
16 sim-events.o \
17 sim-core.o \
18 sim-io.o \
19 sim-utils.o \
20 sim-load.o \
21 sim-options.o \
22 sim-trace.o
23
24 # List of extra dependencies.
25 # Generally this consists of simulator specific files included by sim-main.h.
26 SIM_EXTRA_DEPS = itable.h idecode.h cpu.h alu.h
27
28 # List of generators
29 SIM_GEN=tmp-igen
30
31 # List of flags to always pass to $(CC).
32 SIM_WARNINGS=@sim_warnings@
33 SIM_ENDIAN=@sim_endian@
34 SIM_HOSTENDIAN=@sim_hostendian@
35 SIM_INLINE=@sim_inline@
36 SIM_RESERVED_BITS=@sim_reserved_bits@
37
38 SIM_EXTRA_CFLAGS = \
39 $(SIM_WARNINGS) \
40 $(SIM_ENDIAN) \
41 $(SIM_HOSTENDIAN) \
42 $(SIM_INLINE) \
43 $(SIM_RESERVED_BITS) \
44 -DWITH_TARGET_WORD_MSB=31
45
46 # List of main object files for `run'.
47 SIM_RUN_OBJS = nrun.o
48
49 # Dependency of `clean' to clean any extra files.
50 SIM_EXTRA_CLEAN = clean-igen
51
52
53 ## COMMON_POST_CONFIG_FRAG
54
55 # Rules need to build $(SIM_OBJS), plus whatever else the target wants.
56
57 # ... target specific rules ...
58
59 BUILT_SRC_FROM_IGEN = \
60 icache.h \
61 icache.c \
62 idecode.h \
63 idecode.c \
64 semantics.h \
65 semantics.c \
66 model.h \
67 model.c \
68 support.h \
69 support.c \
70 itable.h itable.c
71 $(BUILT_SRC_FROM_IGEN): tmp-igen
72 #
73
74 .PHONY: clean-igen
75 clean-igen:
76 rm -f $(BUILT_SRC_FROM_IGEN)
77 rm -f tmp-igen tmp-insns
78
79 ../igen/igen:
80 cd ../igen && $(MAKE)
81
82 tmp-igen: $(srcdir)/dc $(srcdir)/insns $(srcdir)/ic ../igen/igen
83 cd ../igen && $(MAKE)
84 @echo "Generating short version ..."
85 ../igen/igen \
86 -G direct-access \
87 -G delayed-branch \
88 -G omit-line-numbers \
89 -F short,emul \
90 -B 32 -H 31 \
91 -o $(srcdir)/dc \
92 -k $(srcdir)/ic \
93 -i $(srcdir)/insns \
94 -n icache.h -hc tmp-icache.h \
95 -n icache.c -c tmp-icache.c \
96 -n semantics.h -hs tmp-semantics.h \
97 -n semantics.c -s tmp-semantics.c \
98 -n idecode.h -hd tmp-idecode.h \
99 -n idecode.c -d tmp-idecode.c \
100 -n model.h -hm tmp-model.h \
101 -n model.c -m tmp-model.c \
102 -n support.h -hf tmp-support.h \
103 -n support.c -f tmp-support.c \
104 -n itable.h -ht tmp-itable.h \
105 -n itable.c -t tmp-itable.c
106 $(srcdir)/../../move-if-change tmp-icache.h icache.h
107 $(srcdir)/../../move-if-change tmp-icache.c icache.c
108 $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
109 $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
110 $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
111 $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
112 $(srcdir)/../../move-if-change tmp-model.h model.h
113 $(srcdir)/../../move-if-change tmp-model.c model.c
114 $(srcdir)/../../move-if-change tmp-support.h support.h
115 $(srcdir)/../../move-if-change tmp-support.c support.c
116 $(srcdir)/../../move-if-change tmp-itable.h itable.h
117 $(srcdir)/../../move-if-change tmp-itable.c itable.c
118 touch tmp-igen
119
120 ENGINE_H = \
121 sim-main.h \
122 $(srcdir)/../common/sim-basics.h \
123 config.h \
124 $(srcdir)/../common/sim-config.h \
125 $(srcdir)/../common/sim-inline.h \
126 $(srcdir)/../common/sim-types.h \
127 $(srcdir)/../common/sim-bits.h \
128 $(srcdir)/../common/sim-endian.h \
129 itable.h \
130 idecode.h \
131 cpu.h \
132 alu.h \
133 $(srcdir)/../common/sim-alu.h \
134 $(srcdir)/../common/sim-core.h \
135 $(srcdir)/../common/sim-events.h \
136
137 idecode.o: $(ENGINE_H)
138 semantics.o: $(ENGINE_H)
139 interp.o: interp.c $(ENGINE_H)
140 sim-calls.o: sim-calls.c $(ENGINE_H)
141 cpu.o: cpu.c $(ENGINE_H)
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