Change output format slightly
[deliverable/binutils-gdb.git] / sim / tic80 / Makefile.in
1 # Makefile for blah ...
2 # Copyright blah ...
3
4
5
6 ## COMMON_PRE_CONFIG_FRAG
7
8 # These variables are given default values in COMMON_PRE_CONFIG_FRAG.
9 # We override the ones we need to here.
10 # Not all of these need to be mentioned, only the necessary ones.
11
12 # List of object files, less common parts.
13 SIM_OBJS = sim-endian.o sim-bits.o sim-config.o interp.o \
14 support.o idecode.o semantics.o itable.o misc.o \
15 sim-calls.o \
16 sim-events.o \
17 sim-core.o \
18 sim-io.o \
19 sim-utils.o \
20 sim-load.o \
21 sim-module.o \
22 sim-options.o \
23 sim-trace.o \
24 sim-profile.o \
25 sim-fpu.o
26
27 # List of extra dependencies.
28 # Generally this consists of simulator specific files included by sim-main.h.
29 SIM_EXTRA_DEPS = itable.h idecode.h cpu.h alu.h
30
31 # List of extra libraries to link with
32 SIM_EXTRA_LIBS = -lm
33
34 # List of generators
35 SIM_GEN=tmp-igen
36
37 # List of flags to always pass to $(CC).
38 SIM_WARNINGS=@sim_warnings@
39 SIM_ENDIAN=@sim_endian@
40 SIM_HOSTENDIAN=@sim_hostendian@
41 SIM_INLINE=@sim_inline@
42 SIM_RESERVED_BITS=@sim_reserved_bits@
43 SIM_ALIGNMENT=@sim_alignment@
44
45 SIM_EXTRA_CFLAGS = \
46 $(SIM_WARNINGS) \
47 $(SIM_ENDIAN) \
48 $(SIM_HOSTENDIAN) \
49 $(SIM_INLINE) \
50 $(SIM_RESERVED_BITS) \
51 -DWITH_TARGET_WORD_MSB=31
52
53 # List of main object files for `run'.
54 SIM_RUN_OBJS = nrun.o
55
56 # Dependency of `clean' to clean any extra files.
57 SIM_EXTRA_CLEAN = clean-igen
58
59
60 ## COMMON_POST_CONFIG_FRAG
61
62 # Rules need to build $(SIM_OBJS), plus whatever else the target wants.
63
64 # ... target specific rules ...
65
66 BUILT_SRC_FROM_IGEN = \
67 icache.h \
68 icache.c \
69 idecode.h \
70 idecode.c \
71 semantics.h \
72 semantics.c \
73 model.h \
74 model.c \
75 support.h \
76 support.c \
77 itable.h itable.c
78 $(BUILT_SRC_FROM_IGEN): tmp-igen
79 #
80
81 .PHONY: clean-igen
82 clean-igen:
83 rm -f $(BUILT_SRC_FROM_IGEN)
84 rm -f tmp-igen tmp-insns
85
86 ../igen/igen:
87 cd ../igen && $(MAKE)
88
89 tmp-igen: $(srcdir)/dc $(srcdir)/insns $(srcdir)/ic ../igen/igen
90 cd ../igen && $(MAKE)
91 ../igen/igen \
92 -F f \
93 -G direct-access \
94 -G delayed-branch \
95 -F short,emul \
96 -B 32 -H 31 \
97 -o $(srcdir)/dc \
98 -k $(srcdir)/ic \
99 -i $(srcdir)/insns \
100 -n icache.h -hc tmp-icache.h \
101 -n icache.c -c tmp-icache.c \
102 -n semantics.h -hs tmp-semantics.h \
103 -n semantics.c -s tmp-semantics.c \
104 -n idecode.h -hd tmp-idecode.h \
105 -n idecode.c -d tmp-idecode.c \
106 -n model.h -hm tmp-model.h \
107 -n model.c -m tmp-model.c \
108 -n support.h -hf tmp-support.h \
109 -n support.c -f tmp-support.c \
110 -n itable.h -ht tmp-itable.h \
111 -n itable.c -t tmp-itable.c
112 $(srcdir)/../../move-if-change tmp-icache.h icache.h
113 $(srcdir)/../../move-if-change tmp-icache.c icache.c
114 $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
115 $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
116 $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
117 $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
118 $(srcdir)/../../move-if-change tmp-model.h model.h
119 $(srcdir)/../../move-if-change tmp-model.c model.c
120 $(srcdir)/../../move-if-change tmp-support.h support.h
121 $(srcdir)/../../move-if-change tmp-support.c support.c
122 $(srcdir)/../../move-if-change tmp-itable.h itable.h
123 $(srcdir)/../../move-if-change tmp-itable.c itable.c
124 touch tmp-igen
125
126 ENGINE_H = \
127 sim-main.h \
128 $(srcdir)/../common/sim-basics.h \
129 config.h \
130 $(srcdir)/../common/sim-config.h \
131 $(srcdir)/../common/sim-inline.h \
132 $(srcdir)/../common/sim-types.h \
133 $(srcdir)/../common/sim-bits.h \
134 $(srcdir)/../common/sim-endian.h \
135 $(srcdir)/../common/sim-options.h \
136 itable.h \
137 idecode.h \
138 cpu.h \
139 alu.h \
140 $(srcdir)/../common/sim-alu.h \
141 $(srcdir)/../common/sim-core.h \
142 $(srcdir)/../common/sim-events.h \
143
144 idecode.o: $(ENGINE_H)
145 semantics.o: $(ENGINE_H)
146 support.o: $(ENGINE_H)
147 interp.o: interp.c $(ENGINE_H)
148 sim-calls.o: sim-calls.c $(ENGINE_H)
149 cpu.o: cpu.c $(ENGINE_H)
150 misc.o: $(ENGINE_H)
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