sim/tic80/ic

   1 compute:Dest:Dest:
   2 compute:Dest:rDest:signed_word *:(&(CPU)->reg[Dest])
   3 #
   4 compute:Source1:Source1:
   5 compute:Source1:rSource1:signed_word:(Source1 == 0 ? 0 : (CPU)->reg[Source1])
   6 #
   7 compute:Source2:Source2:
   8 compute:Source2:rSource2:signed_word:(Source2 == 0 ? 0 : (CPU)->reg[Source2])
   9 #
  10 compute:Source:Source:
  11 compute:Source:rSource:signed_word:(Source == 0 ? 0 : (CPU)->reg[Source])
  12 #
  13 compute:IndOff:IndOff:
  14 compute:IndOff:rIndOff:signed_word:(IndOff == 0 ? 0 : (CPU)->reg[IndOff])
  15 #
  16 compute:Base:Base:
  17 compute:Base:rBase:signed_word:(Base == 0 ? 0 : (CPU)->reg[Base])
  18 #
  19 compute:Link:Link:
  20 compute:Link:rLink:signed_word:(&(CPU)->reg[Link])
  21 #
  22 # Trap Number
  23 compute:UTN:UTN:
  24 compute:INDTR:INDTR:
  25 compute:INDTR:UTN:unsigned_word:(INDTR == 0 ? 0 : (CPU)->reg[INDTR])
  26 #
  27 compute:A:A:
  28 #
  29 compute:SignedImmediate:SignedImmediate:
  30 compute:SignedImmediate:vSource1:signed_word:SEXT (SignedImmediate, 14)
  31 #
  32 compute:UnsignedImmediate:UnsignedImmediate:
  33 compute:UnsignedImmediate:vSource1:signed_word:UnsignedImmediate
  34 #
  35 compute:BITNUM:BITNUM:
  36 compute:Code:Code:
  37 #
  38 compute:SignedOffset:SignedOffset:
  39 compute:SignedOffset:vSignedOffset:signed_word:SEXT (SignedOffset, 14)
  40 #
  41 compute:UCRN:UCRN:
  42 compute:INDCR:INDCR:
  43 compute:INDCR:UCRN:unsigned32:(INDCR == 0 ? 0 : (CPU)->reg[INDCR])