1 #include "sim-basics.h"
3 typedef address_word sim_cia
;
5 /* This simulator doesn't cache state */
6 #define SIM_ENGINE_HALT_HOOK(sd,last_cpu,cia) while (0)
7 #define SIM_ENGINE_RESTART_HOOK(sd,last_cpu,cia) while (0)
12 typedef unsigned8 uint8
;
13 typedef signed16 int16
;
14 typedef unsigned16 uint16
;
15 typedef signed32 int32
;
16 typedef unsigned32 uint32
;
17 typedef unsigned32 reg_t
;
20 /* The current state of the processor; registers, memory, etc. */
22 typedef struct _v850_regs
{
23 reg_t regs
[32]; /* general-purpose registers */
24 reg_t sregs
[32]; /* system registers, including psw */
26 int dummy_mem
; /* where invalid accesses go */
33 /* ... simulator specific members ... */
35 /* ... base type ... */
40 sim_cpu cpu
[MAX_NR_PROCESSORS
];
42 #define STATE_CPU(sd,n) (&(sd)->cpu[n])
44 #define STATE_CPU(sd,n) (&(sd)->cpu[0])
54 /* For compatibility, until all functions converted to passing
55 SIM_DESC as an argument */
56 extern SIM_DESC simulator
;
59 #define V850_ROM_SIZE 0x8000
60 #define V850_LOW_END 0x200000
61 #define V850_HIGH_START 0xffe000
64 #define DEBUG_TRACE 0x00000001
65 #define DEBUG_VALUES 0x00000002
67 extern int v850_debug
;
69 #define SIG_V850_EXIT -1 /* indication of a normal exit */
72 extern struct simops Simops
[];
74 #define State (STATE_CPU (simulator, 0)->reg)
76 #define SP (State.regs[3])
77 #define EP (State.regs[30])
79 #define EIPC (State.sregs[0])
80 #define EIPSW (State.sregs[1])
81 #define FEPC (State.sregs[2])
82 #define FEPSW (State.sregs[3])
83 #define ECR (State.sregs[4])
84 #define PSW (State.sregs[5])
85 /* start-sanitize-v850e */
86 #define CTPC (State.sregs[16])
87 #define CTPSW (State.sregs[17])
88 /* end-sanitize-v850e */
89 #define DBPC (State.sregs[18])
90 #define DBPSW (State.sregs[19])
91 /* start-sanitize-v850e */
92 #define CTBP (State.sregs[20])
93 /* end-sanitize-v850e */
104 #define SEXT3(x) ((((x)&0x7)^(~0x3))+0x4)
106 /* sign-extend a 4-bit number */
107 #define SEXT4(x) ((((x)&0xf)^(~0x7))+0x8)
109 /* sign-extend a 5-bit number */
110 #define SEXT5(x) ((((x)&0x1f)^(~0xf))+0x10)
112 /* sign-extend an 8-bit number */
113 #define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
115 /* sign-extend a 9-bit number */
116 #define SEXT9(x) ((((x)&0x1ff)^(~0xff))+0x100)
118 /* sign-extend a 16-bit number */
119 #define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
121 /* sign-extend a 22-bit number */
122 #define SEXT22(x) ((((x)&0x3fffff)^(~0x1fffff))+0x200000)
124 /* sign-extend a 32-bit number */
125 #define SEXT32(x) ((((x)&0xffffffffLL)^(~0x7fffffffLL))+0x80000000LL)
127 /* sign extend a 40 bit number */
128 #define SEXT40(x) ((((x)&0xffffffffffLL)^(~0x7fffffffffLL))+0x8000000000LL)
130 /* sign extend a 44 bit number */
131 #define SEXT44(x) ((((x)&0xfffffffffffLL)^(~0x7ffffffffffLL))+0x80000000000LL)
133 /* sign extend a 60 bit number */
134 #define SEXT60(x) ((((x)&0xfffffffffffffffLL)^(~0x7ffffffffffffffLL))+0x800000000000000LL)
136 /* No sign extension */
140 #define MAX32 0x7fffffffLL
141 #define MIN32 0xff80000000LL
142 #define MASK32 0xffffffffLL
143 #define MASK40 0xffffffffffLL
146 #define INC_ADDR(x,i) x = ((State.MD && x == MOD_E) ? MOD_S : (x)+(i))
148 #define RLW(x) load_mem (x, 4)
159 /* Function declarations. */
161 uint32 get_word
PARAMS ((uint8
*));
162 uint16 get_half
PARAMS ((uint8
*));
163 uint8 get_byte
PARAMS ((uint8
*));
164 void put_word
PARAMS ((uint8
*, uint32
));
165 void put_half
PARAMS ((uint8
*, uint16
));
166 void put_byte
PARAMS ((uint8
*, uint8
));
168 extern uint32 load_mem
PARAMS ((SIM_ADDR addr
, int len
));
169 extern void store_mem
PARAMS ((SIM_ADDR addr
, int len
, uint32 data
));
171 extern uint8
*map
PARAMS ((SIM_ADDR addr
));
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