2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Documentation: ARM DDI 0173B
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
23 #include <sound/core.h>
24 #include <sound/initval.h>
25 #include <sound/ac97_codec.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
31 #define DRIVER_NAME "aaci-pl041"
33 #define FRAME_PERIOD_US 21
36 * PM support is not complete. Turn it off.
40 static void aaci_ac97_select_codec(struct aaci
*aaci
, struct snd_ac97
*ac97
)
42 u32 v
, maincr
= aaci
->maincr
| MAINCR_SCRA(ac97
->num
);
45 * Ensure that the slot 1/2 RX registers are empty.
47 v
= readl(aaci
->base
+ AACI_SLFR
);
49 readl(aaci
->base
+ AACI_SL2RX
);
51 readl(aaci
->base
+ AACI_SL1RX
);
53 writel(maincr
, aaci
->base
+ AACI_MAINCR
);
58 * The recommended use of programming the external codec through slot 1
59 * and slot 2 data is to use the channels during setup routines and the
60 * slot register at any other time. The data written into slot 1, slot 2
61 * and slot 12 registers is transmitted only when their corresponding
62 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
65 static void aaci_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
,
68 struct aaci
*aaci
= ac97
->private_data
;
75 mutex_lock(&aaci
->ac97_sem
);
77 aaci_ac97_select_codec(aaci
, ac97
);
80 * P54: You must ensure that AACI_SL2TX is always written
81 * to, if required, before data is written to AACI_SL1TX.
83 writel(val
<< 4, aaci
->base
+ AACI_SL2TX
);
84 writel(reg
<< 12, aaci
->base
+ AACI_SL1TX
);
86 /* Initially, wait one frame period */
87 udelay(FRAME_PERIOD_US
);
89 /* And then wait an additional eight frame periods for it to be sent */
90 timeout
= FRAME_PERIOD_US
* 8;
93 v
= readl(aaci
->base
+ AACI_SLFR
);
94 } while ((v
& (SLFR_1TXB
|SLFR_2TXB
)) && --timeout
);
96 if (v
& (SLFR_1TXB
|SLFR_2TXB
))
97 dev_err(&aaci
->dev
->dev
,
98 "timeout waiting for write to complete\n");
100 mutex_unlock(&aaci
->ac97_sem
);
104 * Read an AC'97 register.
106 static unsigned short aaci_ac97_read(struct snd_ac97
*ac97
, unsigned short reg
)
108 struct aaci
*aaci
= ac97
->private_data
;
109 int timeout
, retries
= 10;
115 mutex_lock(&aaci
->ac97_sem
);
117 aaci_ac97_select_codec(aaci
, ac97
);
120 * Write the register address to slot 1.
122 writel((reg
<< 12) | (1 << 19), aaci
->base
+ AACI_SL1TX
);
124 /* Initially, wait one frame period */
125 udelay(FRAME_PERIOD_US
);
127 /* And then wait an additional eight frame periods for it to be sent */
128 timeout
= FRAME_PERIOD_US
* 8;
131 v
= readl(aaci
->base
+ AACI_SLFR
);
132 } while ((v
& SLFR_1TXB
) && --timeout
);
135 dev_err(&aaci
->dev
->dev
, "timeout on slot 1 TX busy\n");
140 /* Now wait for the response frame */
141 udelay(FRAME_PERIOD_US
);
143 /* And then wait an additional eight frame periods for data */
144 timeout
= FRAME_PERIOD_US
* 8;
148 v
= readl(aaci
->base
+ AACI_SLFR
) & (SLFR_1RXV
|SLFR_2RXV
);
149 } while ((v
!= (SLFR_1RXV
|SLFR_2RXV
)) && --timeout
);
151 if (v
!= (SLFR_1RXV
|SLFR_2RXV
)) {
152 dev_err(&aaci
->dev
->dev
, "timeout on RX valid\n");
158 v
= readl(aaci
->base
+ AACI_SL1RX
) >> 12;
160 v
= readl(aaci
->base
+ AACI_SL2RX
) >> 4;
162 } else if (--retries
) {
163 dev_warn(&aaci
->dev
->dev
,
164 "ac97 read back fail. retry\n");
167 dev_warn(&aaci
->dev
->dev
,
168 "wrong ac97 register read back (%x != %x)\n",
174 mutex_unlock(&aaci
->ac97_sem
);
179 aaci_chan_wait_ready(struct aaci_runtime
*aacirun
, unsigned long mask
)
186 val
= readl(aacirun
->base
+ AACI_SR
);
187 } while (val
& mask
&& timeout
--);
195 static void aaci_fifo_irq(struct aaci
*aaci
, int channel
, u32 mask
)
197 if (mask
& ISR_ORINTR
) {
198 dev_warn(&aaci
->dev
->dev
, "RX overrun on chan %d\n", channel
);
199 writel(ICLR_RXOEC1
<< channel
, aaci
->base
+ AACI_INTCLR
);
202 if (mask
& ISR_RXTOINTR
) {
203 dev_warn(&aaci
->dev
->dev
, "RX timeout on chan %d\n", channel
);
204 writel(ICLR_RXTOFEC1
<< channel
, aaci
->base
+ AACI_INTCLR
);
207 if (mask
& ISR_RXINTR
) {
208 struct aaci_runtime
*aacirun
= &aaci
->capture
;
211 if (!aacirun
->substream
|| !aacirun
->start
) {
212 dev_warn(&aaci
->dev
->dev
, "RX interrupt???\n");
213 writel(0, aacirun
->base
+ AACI_IE
);
217 spin_lock(&aacirun
->lock
);
221 unsigned int len
= aacirun
->fifosz
;
224 if (aacirun
->bytes
<= 0) {
225 aacirun
->bytes
+= aacirun
->period
;
227 spin_unlock(&aacirun
->lock
);
228 snd_pcm_period_elapsed(aacirun
->substream
);
229 spin_lock(&aacirun
->lock
);
231 if (!(aacirun
->cr
& CR_EN
))
234 val
= readl(aacirun
->base
+ AACI_SR
);
235 if (!(val
& SR_RXHF
))
237 if (!(val
& SR_RXFF
))
240 aacirun
->bytes
-= len
;
242 /* reading 16 bytes at a time */
243 for( ; len
> 0; len
-= 16) {
245 "ldmia %1, {r0, r1, r2, r3}\n\t"
246 "stmia %0!, {r0, r1, r2, r3}"
248 : "r" (aacirun
->fifo
)
249 : "r0", "r1", "r2", "r3", "cc");
251 if (ptr
>= aacirun
->end
)
252 ptr
= aacirun
->start
;
258 spin_unlock(&aacirun
->lock
);
261 if (mask
& ISR_URINTR
) {
262 dev_dbg(&aaci
->dev
->dev
, "TX underrun on chan %d\n", channel
);
263 writel(ICLR_TXUEC1
<< channel
, aaci
->base
+ AACI_INTCLR
);
266 if (mask
& ISR_TXINTR
) {
267 struct aaci_runtime
*aacirun
= &aaci
->playback
;
270 if (!aacirun
->substream
|| !aacirun
->start
) {
271 dev_warn(&aaci
->dev
->dev
, "TX interrupt???\n");
272 writel(0, aacirun
->base
+ AACI_IE
);
276 spin_lock(&aacirun
->lock
);
280 unsigned int len
= aacirun
->fifosz
;
283 if (aacirun
->bytes
<= 0) {
284 aacirun
->bytes
+= aacirun
->period
;
286 spin_unlock(&aacirun
->lock
);
287 snd_pcm_period_elapsed(aacirun
->substream
);
288 spin_lock(&aacirun
->lock
);
290 if (!(aacirun
->cr
& CR_EN
))
293 val
= readl(aacirun
->base
+ AACI_SR
);
294 if (!(val
& SR_TXHE
))
296 if (!(val
& SR_TXFE
))
299 aacirun
->bytes
-= len
;
301 /* writing 16 bytes at a time */
302 for ( ; len
> 0; len
-= 16) {
304 "ldmia %0!, {r0, r1, r2, r3}\n\t"
305 "stmia %1, {r0, r1, r2, r3}"
307 : "r" (aacirun
->fifo
)
308 : "r0", "r1", "r2", "r3", "cc");
310 if (ptr
>= aacirun
->end
)
311 ptr
= aacirun
->start
;
317 spin_unlock(&aacirun
->lock
);
321 static irqreturn_t
aaci_irq(int irq
, void *devid
)
323 struct aaci
*aaci
= devid
;
327 mask
= readl(aaci
->base
+ AACI_ALLINTS
);
330 for (i
= 0; i
< 4; i
++, m
>>= 7) {
332 aaci_fifo_irq(aaci
, i
, m
);
337 return mask
? IRQ_HANDLED
: IRQ_NONE
;
345 static struct snd_pcm_hardware aaci_hw_info
= {
346 .info
= SNDRV_PCM_INFO_MMAP
|
347 SNDRV_PCM_INFO_MMAP_VALID
|
348 SNDRV_PCM_INFO_INTERLEAVED
|
349 SNDRV_PCM_INFO_BLOCK_TRANSFER
|
350 SNDRV_PCM_INFO_RESUME
,
353 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
354 * words. It also doesn't support 12-bit at all.
356 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
358 /* rates are setup from the AC'97 codec */
361 .buffer_bytes_max
= 64 * 1024,
362 .period_bytes_min
= 256,
363 .period_bytes_max
= PAGE_SIZE
,
365 .periods_max
= PAGE_SIZE
/ 16,
368 static int __aaci_pcm_open(struct aaci
*aaci
,
369 struct snd_pcm_substream
*substream
,
370 struct aaci_runtime
*aacirun
)
372 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
375 aacirun
->substream
= substream
;
376 runtime
->private_data
= aacirun
;
377 runtime
->hw
= aaci_hw_info
;
378 runtime
->hw
.rates
= aacirun
->pcm
->rates
;
379 snd_pcm_limit_hw_rates(runtime
);
381 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
&&
382 aacirun
->pcm
->r
[1].slots
)
383 snd_ac97_pcm_double_rate_rules(runtime
);
386 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
387 * mode, each 32-bit word contains one sample. If we're in
388 * compact mode, each 32-bit word contains two samples, effectively
389 * halving the FIFO size. However, we don't know for sure which
390 * we'll be using at this point. We set this to the lower limit.
392 runtime
->hw
.fifo_size
= aaci
->fifosize
* 2;
394 ret
= request_irq(aaci
->dev
->irq
[0], aaci_irq
, IRQF_SHARED
|IRQF_DISABLED
,
409 static int aaci_pcm_close(struct snd_pcm_substream
*substream
)
411 struct aaci
*aaci
= substream
->private_data
;
412 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
414 WARN_ON(aacirun
->cr
& CR_EN
);
416 aacirun
->substream
= NULL
;
417 free_irq(aaci
->dev
->irq
[0], aaci
);
422 static int aaci_pcm_hw_free(struct snd_pcm_substream
*substream
)
424 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
427 * This must not be called with the device enabled.
429 WARN_ON(aacirun
->cr
& CR_EN
);
431 if (aacirun
->pcm_open
)
432 snd_ac97_pcm_close(aacirun
->pcm
);
433 aacirun
->pcm_open
= 0;
436 * Clear out the DMA and any allocated buffers.
438 snd_pcm_lib_free_pages(substream
);
443 static int aaci_pcm_hw_params(struct snd_pcm_substream
*substream
,
444 struct aaci_runtime
*aacirun
,
445 struct snd_pcm_hw_params
*params
)
448 struct aaci
*aaci
= substream
->private_data
;
450 aaci_pcm_hw_free(substream
);
451 if (aacirun
->pcm_open
) {
452 snd_ac97_pcm_close(aacirun
->pcm
);
453 aacirun
->pcm_open
= 0;
456 err
= snd_pcm_lib_malloc_pages(substream
,
457 params_buffer_bytes(params
));
459 unsigned int rate
= params_rate(params
);
460 int dbl
= rate
> 48000;
462 err
= snd_ac97_pcm_open(aacirun
->pcm
, rate
,
463 params_channels(params
),
464 aacirun
->pcm
->r
[dbl
].slots
);
466 aacirun
->pcm_open
= err
== 0;
467 aacirun
->cr
= CR_FEN
| CR_COMPACT
| CR_SZ16
;
468 aacirun
->fifosz
= aaci
->fifosize
* 4;
470 if (aacirun
->cr
& CR_COMPACT
)
471 aacirun
->fifosz
>>= 1;
477 static int aaci_pcm_prepare(struct snd_pcm_substream
*substream
)
479 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
480 struct aaci_runtime
*aacirun
= runtime
->private_data
;
482 aacirun
->start
= runtime
->dma_area
;
483 aacirun
->end
= aacirun
->start
+ snd_pcm_lib_buffer_bytes(substream
);
484 aacirun
->ptr
= aacirun
->start
;
486 aacirun
->bytes
= frames_to_bytes(runtime
, runtime
->period_size
);
491 static snd_pcm_uframes_t
aaci_pcm_pointer(struct snd_pcm_substream
*substream
)
493 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
494 struct aaci_runtime
*aacirun
= runtime
->private_data
;
495 ssize_t bytes
= aacirun
->ptr
- aacirun
->start
;
497 return bytes_to_frames(runtime
, bytes
);
502 * Playback specific ALSA stuff
504 static const u32 channels_to_txmask
[] = {
505 [2] = CR_SL3
| CR_SL4
,
506 [4] = CR_SL3
| CR_SL4
| CR_SL7
| CR_SL8
,
507 [6] = CR_SL3
| CR_SL4
| CR_SL7
| CR_SL8
| CR_SL6
| CR_SL9
,
511 * We can support two and four channel audio. Unfortunately
512 * six channel audio requires a non-standard channel ordering:
514 * 4 -> FL(3), FR(4), SL(7), SR(8)
515 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
516 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
517 * This requires an ALSA configuration file to correct.
519 static unsigned int channel_list
[] = { 2, 4, 6 };
522 aaci_rule_channels(struct snd_pcm_hw_params
*p
, struct snd_pcm_hw_rule
*rule
)
524 struct aaci
*aaci
= rule
->private;
525 unsigned int chan_mask
= 1 << 0, slots
;
528 * pcms[0] is the our 5.1 PCM instance.
530 slots
= aaci
->ac97_bus
->pcms
[0].r
[0].slots
;
531 if (slots
& (1 << AC97_SLOT_PCM_SLEFT
)) {
533 if (slots
& (1 << AC97_SLOT_LFE
))
537 return snd_interval_list(hw_param_interval(p
, rule
->var
),
538 ARRAY_SIZE(channel_list
), channel_list
,
542 static int aaci_pcm_open(struct snd_pcm_substream
*substream
)
544 struct aaci
*aaci
= substream
->private_data
;
548 * Add rule describing channel dependency.
550 ret
= snd_pcm_hw_rule_add(substream
->runtime
, 0,
551 SNDRV_PCM_HW_PARAM_CHANNELS
,
552 aaci_rule_channels
, aaci
,
553 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
557 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) {
558 ret
= __aaci_pcm_open(aaci
, substream
, &aaci
->playback
);
560 ret
= __aaci_pcm_open(aaci
, substream
, &aaci
->capture
);
565 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream
*substream
,
566 struct snd_pcm_hw_params
*params
)
568 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
569 unsigned int channels
= params_channels(params
);
572 WARN_ON(channels
>= ARRAY_SIZE(channels_to_txmask
) ||
573 !channels_to_txmask
[channels
]);
575 ret
= aaci_pcm_hw_params(substream
, aacirun
, params
);
578 * Enable FIFO, compact mode, 16 bits per sample.
579 * FIXME: double rate slots?
582 aacirun
->cr
|= channels_to_txmask
[channels
];
587 static void aaci_pcm_playback_stop(struct aaci_runtime
*aacirun
)
591 ie
= readl(aacirun
->base
+ AACI_IE
);
592 ie
&= ~(IE_URIE
|IE_TXIE
);
593 writel(ie
, aacirun
->base
+ AACI_IE
);
594 aacirun
->cr
&= ~CR_EN
;
595 aaci_chan_wait_ready(aacirun
, SR_TXB
);
596 writel(aacirun
->cr
, aacirun
->base
+ AACI_TXCR
);
599 static void aaci_pcm_playback_start(struct aaci_runtime
*aacirun
)
603 aaci_chan_wait_ready(aacirun
, SR_TXB
);
604 aacirun
->cr
|= CR_EN
;
606 ie
= readl(aacirun
->base
+ AACI_IE
);
607 ie
|= IE_URIE
| IE_TXIE
;
608 writel(ie
, aacirun
->base
+ AACI_IE
);
609 writel(aacirun
->cr
, aacirun
->base
+ AACI_TXCR
);
612 static int aaci_pcm_playback_trigger(struct snd_pcm_substream
*substream
, int cmd
)
614 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
618 spin_lock_irqsave(&aacirun
->lock
, flags
);
621 case SNDRV_PCM_TRIGGER_START
:
622 aaci_pcm_playback_start(aacirun
);
625 case SNDRV_PCM_TRIGGER_RESUME
:
626 aaci_pcm_playback_start(aacirun
);
629 case SNDRV_PCM_TRIGGER_STOP
:
630 aaci_pcm_playback_stop(aacirun
);
633 case SNDRV_PCM_TRIGGER_SUSPEND
:
634 aaci_pcm_playback_stop(aacirun
);
637 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
640 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
647 spin_unlock_irqrestore(&aacirun
->lock
, flags
);
652 static struct snd_pcm_ops aaci_playback_ops
= {
653 .open
= aaci_pcm_open
,
654 .close
= aaci_pcm_close
,
655 .ioctl
= snd_pcm_lib_ioctl
,
656 .hw_params
= aaci_pcm_playback_hw_params
,
657 .hw_free
= aaci_pcm_hw_free
,
658 .prepare
= aaci_pcm_prepare
,
659 .trigger
= aaci_pcm_playback_trigger
,
660 .pointer
= aaci_pcm_pointer
,
663 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream
*substream
,
664 struct snd_pcm_hw_params
*params
)
666 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
669 ret
= aaci_pcm_hw_params(substream
, aacirun
, params
);
671 /* Line in record: slot 3 and 4 */
672 aacirun
->cr
|= CR_SL3
| CR_SL4
;
677 static void aaci_pcm_capture_stop(struct aaci_runtime
*aacirun
)
681 aaci_chan_wait_ready(aacirun
, SR_RXB
);
683 ie
= readl(aacirun
->base
+ AACI_IE
);
684 ie
&= ~(IE_ORIE
| IE_RXIE
);
685 writel(ie
, aacirun
->base
+AACI_IE
);
687 aacirun
->cr
&= ~CR_EN
;
689 writel(aacirun
->cr
, aacirun
->base
+ AACI_RXCR
);
692 static void aaci_pcm_capture_start(struct aaci_runtime
*aacirun
)
696 aaci_chan_wait_ready(aacirun
, SR_RXB
);
699 /* RX Timeout value: bits 28:17 in RXCR */
700 aacirun
->cr
|= 0xf << 17;
703 aacirun
->cr
|= CR_EN
;
704 writel(aacirun
->cr
, aacirun
->base
+ AACI_RXCR
);
706 ie
= readl(aacirun
->base
+ AACI_IE
);
707 ie
|= IE_ORIE
|IE_RXIE
; // overrun and rx interrupt -- half full
708 writel(ie
, aacirun
->base
+ AACI_IE
);
711 static int aaci_pcm_capture_trigger(struct snd_pcm_substream
*substream
, int cmd
)
713 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
717 spin_lock_irqsave(&aacirun
->lock
, flags
);
720 case SNDRV_PCM_TRIGGER_START
:
721 aaci_pcm_capture_start(aacirun
);
724 case SNDRV_PCM_TRIGGER_RESUME
:
725 aaci_pcm_capture_start(aacirun
);
728 case SNDRV_PCM_TRIGGER_STOP
:
729 aaci_pcm_capture_stop(aacirun
);
732 case SNDRV_PCM_TRIGGER_SUSPEND
:
733 aaci_pcm_capture_stop(aacirun
);
736 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
739 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
746 spin_unlock_irqrestore(&aacirun
->lock
, flags
);
751 static int aaci_pcm_capture_prepare(struct snd_pcm_substream
*substream
)
753 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
754 struct aaci
*aaci
= substream
->private_data
;
756 aaci_pcm_prepare(substream
);
758 /* allow changing of sample rate */
759 aaci_ac97_write(aaci
->ac97
, AC97_EXTENDED_STATUS
, 0x0001); /* VRA */
760 aaci_ac97_write(aaci
->ac97
, AC97_PCM_LR_ADC_RATE
, runtime
->rate
);
761 aaci_ac97_write(aaci
->ac97
, AC97_PCM_MIC_ADC_RATE
, runtime
->rate
);
763 /* Record select: Mic: 0, Aux: 3, Line: 4 */
764 aaci_ac97_write(aaci
->ac97
, AC97_REC_SEL
, 0x0404);
769 static struct snd_pcm_ops aaci_capture_ops
= {
770 .open
= aaci_pcm_open
,
771 .close
= aaci_pcm_close
,
772 .ioctl
= snd_pcm_lib_ioctl
,
773 .hw_params
= aaci_pcm_capture_hw_params
,
774 .hw_free
= aaci_pcm_hw_free
,
775 .prepare
= aaci_pcm_capture_prepare
,
776 .trigger
= aaci_pcm_capture_trigger
,
777 .pointer
= aaci_pcm_pointer
,
784 static int aaci_do_suspend(struct snd_card
*card
, unsigned int state
)
786 struct aaci
*aaci
= card
->private_data
;
787 snd_power_change_state(card
, SNDRV_CTL_POWER_D3cold
);
788 snd_pcm_suspend_all(aaci
->pcm
);
792 static int aaci_do_resume(struct snd_card
*card
, unsigned int state
)
794 snd_power_change_state(card
, SNDRV_CTL_POWER_D0
);
798 static int aaci_suspend(struct amba_device
*dev
, pm_message_t state
)
800 struct snd_card
*card
= amba_get_drvdata(dev
);
801 return card
? aaci_do_suspend(card
) : 0;
804 static int aaci_resume(struct amba_device
*dev
)
806 struct snd_card
*card
= amba_get_drvdata(dev
);
807 return card
? aaci_do_resume(card
) : 0;
810 #define aaci_do_suspend NULL
811 #define aaci_do_resume NULL
812 #define aaci_suspend NULL
813 #define aaci_resume NULL
817 static struct ac97_pcm ac97_defs
[] __devinitdata
= {
818 [0] = { /* Front PCM */
822 .slots
= (1 << AC97_SLOT_PCM_LEFT
) |
823 (1 << AC97_SLOT_PCM_RIGHT
) |
824 (1 << AC97_SLOT_PCM_CENTER
) |
825 (1 << AC97_SLOT_PCM_SLEFT
) |
826 (1 << AC97_SLOT_PCM_SRIGHT
) |
827 (1 << AC97_SLOT_LFE
),
830 .slots
= (1 << AC97_SLOT_PCM_LEFT
) |
831 (1 << AC97_SLOT_PCM_RIGHT
) |
832 (1 << AC97_SLOT_PCM_LEFT_0
) |
833 (1 << AC97_SLOT_PCM_RIGHT_0
),
842 .slots
= (1 << AC97_SLOT_PCM_LEFT
) |
843 (1 << AC97_SLOT_PCM_RIGHT
),
852 .slots
= (1 << AC97_SLOT_MIC
),
858 static struct snd_ac97_bus_ops aaci_bus_ops
= {
859 .write
= aaci_ac97_write
,
860 .read
= aaci_ac97_read
,
863 static int __devinit
aaci_probe_ac97(struct aaci
*aaci
)
865 struct snd_ac97_template ac97_template
;
866 struct snd_ac97_bus
*ac97_bus
;
867 struct snd_ac97
*ac97
;
871 * Assert AACIRESET for 2us
873 writel(0, aaci
->base
+ AACI_RESET
);
875 writel(RESET_NRST
, aaci
->base
+ AACI_RESET
);
878 * Give the AC'97 codec more than enough time
879 * to wake up. (42us = ~2 frames at 48kHz.)
881 udelay(FRAME_PERIOD_US
* 2);
883 ret
= snd_ac97_bus(aaci
->card
, 0, &aaci_bus_ops
, aaci
, &ac97_bus
);
887 ac97_bus
->clock
= 48000;
888 aaci
->ac97_bus
= ac97_bus
;
890 memset(&ac97_template
, 0, sizeof(struct snd_ac97_template
));
891 ac97_template
.private_data
= aaci
;
892 ac97_template
.num
= 0;
893 ac97_template
.scaps
= AC97_SCAP_SKIP_MODEM
;
895 ret
= snd_ac97_mixer(ac97_bus
, &ac97_template
, &ac97
);
901 * Disable AC97 PC Beep input on audio codecs.
903 if (ac97_is_audio(ac97
))
904 snd_ac97_write_cache(ac97
, AC97_PC_BEEP
, 0x801e);
906 ret
= snd_ac97_pcm_assign(ac97_bus
, ARRAY_SIZE(ac97_defs
), ac97_defs
);
910 aaci
->playback
.pcm
= &ac97_bus
->pcms
[0];
911 aaci
->capture
.pcm
= &ac97_bus
->pcms
[1];
917 static void aaci_free_card(struct snd_card
*card
)
919 struct aaci
*aaci
= card
->private_data
;
924 static struct aaci
* __devinit
aaci_init_card(struct amba_device
*dev
)
927 struct snd_card
*card
;
930 err
= snd_card_create(SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
,
931 THIS_MODULE
, sizeof(struct aaci
), &card
);
935 card
->private_free
= aaci_free_card
;
937 strlcpy(card
->driver
, DRIVER_NAME
, sizeof(card
->driver
));
938 strlcpy(card
->shortname
, "ARM AC'97 Interface", sizeof(card
->shortname
));
939 snprintf(card
->longname
, sizeof(card
->longname
),
940 "%s at 0x%016llx, irq %d",
941 card
->shortname
, (unsigned long long)dev
->res
.start
,
944 aaci
= card
->private_data
;
945 mutex_init(&aaci
->ac97_sem
);
949 /* Set MAINCR to allow slot 1 and 2 data IO */
950 aaci
->maincr
= MAINCR_IE
| MAINCR_SL1RXEN
| MAINCR_SL1TXEN
|
951 MAINCR_SL2RXEN
| MAINCR_SL2TXEN
;
956 static int __devinit
aaci_init_pcm(struct aaci
*aaci
)
961 ret
= snd_pcm_new(aaci
->card
, "AACI AC'97", 0, 1, 1, &pcm
);
964 pcm
->private_data
= aaci
;
967 strlcpy(pcm
->name
, DRIVER_NAME
, sizeof(pcm
->name
));
969 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
, &aaci_playback_ops
);
970 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_CAPTURE
, &aaci_capture_ops
);
971 snd_pcm_lib_preallocate_pages_for_all(pcm
, SNDRV_DMA_TYPE_DEV
,
978 static unsigned int __devinit
aaci_size_fifo(struct aaci
*aaci
)
980 struct aaci_runtime
*aacirun
= &aaci
->playback
;
983 writel(CR_FEN
| CR_SZ16
| CR_EN
, aacirun
->base
+ AACI_TXCR
);
985 for (i
= 0; !(readl(aacirun
->base
+ AACI_SR
) & SR_TXFF
) && i
< 4096; i
++)
986 writel(0, aacirun
->fifo
);
988 writel(0, aacirun
->base
+ AACI_TXCR
);
991 * Re-initialise the AACI after the FIFO depth test, to
992 * ensure that the FIFOs are empty. Unfortunately, merely
993 * disabling the channel doesn't clear the FIFO.
995 writel(aaci
->maincr
& ~MAINCR_IE
, aaci
->base
+ AACI_MAINCR
);
996 writel(aaci
->maincr
, aaci
->base
+ AACI_MAINCR
);
999 * If we hit 4096, we failed. Go back to the specified
1008 static int __devinit
aaci_probe(struct amba_device
*dev
, struct amba_id
*id
)
1013 ret
= amba_request_regions(dev
, NULL
);
1017 aaci
= aaci_init_card(dev
);
1023 aaci
->base
= ioremap(dev
->res
.start
, resource_size(&dev
->res
));
1030 * Playback uses AACI channel 0
1032 spin_lock_init(&aaci
->playback
.lock
);
1033 aaci
->playback
.base
= aaci
->base
+ AACI_CSCH1
;
1034 aaci
->playback
.fifo
= aaci
->base
+ AACI_DR1
;
1037 * Capture uses AACI channel 0
1039 spin_lock_init(&aaci
->capture
.lock
);
1040 aaci
->capture
.base
= aaci
->base
+ AACI_CSCH1
;
1041 aaci
->capture
.fifo
= aaci
->base
+ AACI_DR1
;
1043 for (i
= 0; i
< 4; i
++) {
1044 void __iomem
*base
= aaci
->base
+ i
* 0x14;
1046 writel(0, base
+ AACI_IE
);
1047 writel(0, base
+ AACI_TXCR
);
1048 writel(0, base
+ AACI_RXCR
);
1051 writel(0x1fff, aaci
->base
+ AACI_INTCLR
);
1052 writel(aaci
->maincr
, aaci
->base
+ AACI_MAINCR
);
1054 * Fix: ac97 read back fail errors by reading
1055 * from any arbitrary aaci register.
1057 readl(aaci
->base
+ AACI_CSCH1
);
1058 ret
= aaci_probe_ac97(aaci
);
1063 * Size the FIFOs (must be multiple of 16).
1065 aaci
->fifosize
= aaci_size_fifo(aaci
);
1066 if (aaci
->fifosize
& 15) {
1067 printk(KERN_WARNING
"AACI: fifosize = %d not supported\n",
1073 ret
= aaci_init_pcm(aaci
);
1077 snd_card_set_dev(aaci
->card
, &dev
->dev
);
1079 ret
= snd_card_register(aaci
->card
);
1081 dev_info(&dev
->dev
, "%s, fifo %d\n", aaci
->card
->longname
,
1083 amba_set_drvdata(dev
, aaci
->card
);
1089 snd_card_free(aaci
->card
);
1090 amba_release_regions(dev
);
1094 static int __devexit
aaci_remove(struct amba_device
*dev
)
1096 struct snd_card
*card
= amba_get_drvdata(dev
);
1098 amba_set_drvdata(dev
, NULL
);
1101 struct aaci
*aaci
= card
->private_data
;
1102 writel(0, aaci
->base
+ AACI_MAINCR
);
1104 snd_card_free(card
);
1105 amba_release_regions(dev
);
1111 static struct amba_id aaci_ids
[] = {
1119 static struct amba_driver aaci_driver
= {
1121 .name
= DRIVER_NAME
,
1123 .probe
= aaci_probe
,
1124 .remove
= __devexit_p(aaci_remove
),
1125 .suspend
= aaci_suspend
,
1126 .resume
= aaci_resume
,
1127 .id_table
= aaci_ids
,
1130 static int __init
aaci_init(void)
1132 return amba_driver_register(&aaci_driver
);
1135 static void __exit
aaci_exit(void)
1137 amba_driver_unregister(&aaci_driver
);
1140 module_init(aaci_init
);
1141 module_exit(aaci_exit
);
1143 MODULE_LICENSE("GPL");
1144 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");