2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Documentation: ARM DDI 0173B
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
24 #include <asm/sizes.h>
26 #include <sound/driver.h>
27 #include <sound/core.h>
28 #include <sound/initval.h>
29 #include <sound/ac97_codec.h>
30 #include <sound/pcm.h>
31 #include <sound/pcm_params.h>
36 #define DRIVER_NAME "aaci-pl041"
39 * PM support is not complete. Turn it off.
43 static void aaci_ac97_select_codec(struct aaci
*aaci
, struct snd_ac97
*ac97
)
45 u32 v
, maincr
= aaci
->maincr
| MAINCR_SCRA(ac97
->num
);
48 * Ensure that the slot 1/2 RX registers are empty.
50 v
= readl(aaci
->base
+ AACI_SLFR
);
52 readl(aaci
->base
+ AACI_SL2RX
);
54 readl(aaci
->base
+ AACI_SL1RX
);
56 writel(maincr
, aaci
->base
+ AACI_MAINCR
);
61 * The recommended use of programming the external codec through slot 1
62 * and slot 2 data is to use the channels during setup routines and the
63 * slot register at any other time. The data written into slot 1, slot 2
64 * and slot 12 registers is transmitted only when their corresponding
65 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
68 static void aaci_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
, unsigned short val
)
70 struct aaci
*aaci
= ac97
->private_data
;
76 mutex_lock(&aaci
->ac97_sem
);
78 aaci_ac97_select_codec(aaci
, ac97
);
81 * P54: You must ensure that AACI_SL2TX is always written
82 * to, if required, before data is written to AACI_SL1TX.
84 writel(val
<< 4, aaci
->base
+ AACI_SL2TX
);
85 writel(reg
<< 12, aaci
->base
+ AACI_SL1TX
);
88 * Wait for the transmission of both slots to complete.
91 v
= readl(aaci
->base
+ AACI_SLFR
);
92 } while (v
& (SLFR_1TXB
|SLFR_2TXB
));
94 mutex_unlock(&aaci
->ac97_sem
);
98 * Read an AC'97 register.
100 static unsigned short aaci_ac97_read(struct snd_ac97
*ac97
, unsigned short reg
)
102 struct aaci
*aaci
= ac97
->private_data
;
108 mutex_lock(&aaci
->ac97_sem
);
110 aaci_ac97_select_codec(aaci
, ac97
);
113 * Write the register address to slot 1.
115 writel((reg
<< 12) | (1 << 19), aaci
->base
+ AACI_SL1TX
);
118 * Wait for the transmission to complete.
121 v
= readl(aaci
->base
+ AACI_SLFR
);
122 } while (v
& SLFR_1TXB
);
125 * Give the AC'97 codec more than enough time
126 * to respond. (42us = ~2 frames at 48kHz.)
131 * Wait for slot 2 to indicate data.
135 v
= readl(aaci
->base
+ AACI_SLFR
) & (SLFR_1RXV
|SLFR_2RXV
);
136 } while (v
!= (SLFR_1RXV
|SLFR_2RXV
));
138 v
= readl(aaci
->base
+ AACI_SL1RX
) >> 12;
140 v
= readl(aaci
->base
+ AACI_SL2RX
) >> 4;
142 dev_err(&aaci
->dev
->dev
,
143 "wrong ac97 register read back (%x != %x)\n",
148 mutex_unlock(&aaci
->ac97_sem
);
152 static inline void aaci_chan_wait_ready(struct aaci_runtime
*aacirun
)
158 val
= readl(aacirun
->base
+ AACI_SR
);
159 } while (val
& (SR_TXB
|SR_RXB
) && timeout
--);
167 static void aaci_fifo_irq(struct aaci
*aaci
, int channel
, u32 mask
)
169 if (mask
& ISR_URINTR
) {
170 dev_dbg(&aaci
->dev
->dev
, "TX underrun on chan %d\n", channel
);
171 writel(ICLR_TXUEC1
<< channel
, aaci
->base
+ AACI_INTCLR
);
174 if (mask
& ISR_TXINTR
) {
175 struct aaci_runtime
*aacirun
= &aaci
->playback
;
178 if (!aacirun
->substream
|| !aacirun
->start
) {
179 dev_warn(&aaci
->dev
->dev
, "TX interrupt???");
180 writel(0, aacirun
->base
+ AACI_IE
);
186 unsigned int len
= aacirun
->fifosz
;
189 if (aacirun
->bytes
<= 0) {
190 aacirun
->bytes
+= aacirun
->period
;
192 spin_unlock(&aaci
->lock
);
193 snd_pcm_period_elapsed(aacirun
->substream
);
194 spin_lock(&aaci
->lock
);
196 if (!(aacirun
->cr
& TXCR_TXEN
))
199 val
= readl(aacirun
->base
+ AACI_SR
);
200 if (!(val
& SR_TXHE
))
202 if (!(val
& SR_TXFE
))
205 aacirun
->bytes
-= len
;
207 /* writing 16 bytes at a time */
208 for ( ; len
> 0; len
-= 16) {
210 "ldmia %0!, {r0, r1, r2, r3}\n\t"
211 "stmia %1, {r0, r1, r2, r3}"
213 : "r" (aacirun
->fifo
)
214 : "r0", "r1", "r2", "r3", "cc");
216 if (ptr
>= aacirun
->end
)
217 ptr
= aacirun
->start
;
225 static irqreturn_t
aaci_irq(int irq
, void *devid
)
227 struct aaci
*aaci
= devid
;
231 spin_lock(&aaci
->lock
);
232 mask
= readl(aaci
->base
+ AACI_ALLINTS
);
235 for (i
= 0; i
< 4; i
++, m
>>= 7) {
237 aaci_fifo_irq(aaci
, i
, m
);
241 spin_unlock(&aaci
->lock
);
243 return mask
? IRQ_HANDLED
: IRQ_NONE
;
253 unsigned char codec_idx
;
254 unsigned char rate_idx
;
257 static struct aaci_stream aaci_streams
[] = {
260 .rate_idx
= AC97_RATES_FRONT_DAC
,
262 [ACSTREAM_SURROUND
] = {
264 .rate_idx
= AC97_RATES_SURR_DAC
,
268 .rate_idx
= AC97_RATES_LFE_DAC
,
272 static inline unsigned int aaci_rate_mask(struct aaci
*aaci
, int streamid
)
274 struct aaci_stream
*s
= aaci_streams
+ streamid
;
275 return aaci
->ac97_bus
->codec
[s
->codec_idx
]->rates
[s
->rate_idx
];
278 static unsigned int rate_list
[] = {
279 5512, 8000, 11025, 16000, 22050, 32000, 44100,
280 48000, 64000, 88200, 96000, 176400, 192000
284 * Double-rate rule: we can support double rate iff channels == 2
288 aaci_rule_rate_by_channels(struct snd_pcm_hw_params
*p
, struct snd_pcm_hw_rule
*rule
)
290 struct aaci
*aaci
= rule
->private;
291 unsigned int rate_mask
= SNDRV_PCM_RATE_8000_48000
|SNDRV_PCM_RATE_5512
;
292 struct snd_interval
*c
= hw_param_interval(p
, SNDRV_PCM_HW_PARAM_CHANNELS
);
296 rate_mask
&= aaci_rate_mask(aaci
, ACSTREAM_LFE
);
298 rate_mask
&= aaci_rate_mask(aaci
, ACSTREAM_SURROUND
);
300 rate_mask
&= aaci_rate_mask(aaci
, ACSTREAM_FRONT
);
303 return snd_interval_list(hw_param_interval(p
, rule
->var
),
304 ARRAY_SIZE(rate_list
), rate_list
,
308 static struct snd_pcm_hardware aaci_hw_info
= {
309 .info
= SNDRV_PCM_INFO_MMAP
|
310 SNDRV_PCM_INFO_MMAP_VALID
|
311 SNDRV_PCM_INFO_INTERLEAVED
|
312 SNDRV_PCM_INFO_BLOCK_TRANSFER
|
313 SNDRV_PCM_INFO_RESUME
,
316 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
317 * words. It also doesn't support 12-bit at all.
319 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
321 /* should this be continuous or knot? */
322 .rates
= SNDRV_PCM_RATE_CONTINUOUS
,
327 .buffer_bytes_max
= 64 * 1024,
328 .period_bytes_min
= 256,
329 .period_bytes_max
= PAGE_SIZE
,
331 .periods_max
= PAGE_SIZE
/ 16,
334 static int aaci_pcm_open(struct aaci
*aaci
, struct snd_pcm_substream
*substream
,
335 struct aaci_runtime
*aacirun
)
337 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
340 aacirun
->substream
= substream
;
341 runtime
->private_data
= aacirun
;
342 runtime
->hw
= aaci_hw_info
;
345 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
346 * mode, each 32-bit word contains one sample. If we're in
347 * compact mode, each 32-bit word contains two samples, effectively
348 * halving the FIFO size. However, we don't know for sure which
349 * we'll be using at this point. We set this to the lower limit.
351 runtime
->hw
.fifo_size
= aaci
->fifosize
* 2;
354 * Add rule describing hardware rate dependency
355 * on the number of channels.
357 ret
= snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
,
358 aaci_rule_rate_by_channels
, aaci
,
359 SNDRV_PCM_HW_PARAM_CHANNELS
,
360 SNDRV_PCM_HW_PARAM_RATE
, -1);
364 ret
= request_irq(aaci
->dev
->irq
[0], aaci_irq
, IRQF_SHARED
|IRQF_DISABLED
,
379 static int aaci_pcm_close(struct snd_pcm_substream
*substream
)
381 struct aaci
*aaci
= substream
->private_data
;
382 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
384 WARN_ON(aacirun
->cr
& TXCR_TXEN
);
386 aacirun
->substream
= NULL
;
387 free_irq(aaci
->dev
->irq
[0], aaci
);
392 static int aaci_pcm_hw_free(struct snd_pcm_substream
*substream
)
394 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
397 * This must not be called with the device enabled.
399 WARN_ON(aacirun
->cr
& TXCR_TXEN
);
401 if (aacirun
->pcm_open
)
402 snd_ac97_pcm_close(aacirun
->pcm
);
403 aacirun
->pcm_open
= 0;
406 * Clear out the DMA and any allocated buffers.
408 devdma_hw_free(NULL
, substream
);
413 static int aaci_pcm_hw_params(struct snd_pcm_substream
*substream
,
414 struct aaci_runtime
*aacirun
,
415 struct snd_pcm_hw_params
*params
)
419 aaci_pcm_hw_free(substream
);
421 err
= devdma_hw_alloc(NULL
, substream
,
422 params_buffer_bytes(params
));
426 err
= snd_ac97_pcm_open(aacirun
->pcm
, params_rate(params
),
427 params_channels(params
),
428 aacirun
->pcm
->r
[0].slots
);
432 aacirun
->pcm_open
= 1;
438 static int aaci_pcm_prepare(struct snd_pcm_substream
*substream
)
440 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
441 struct aaci_runtime
*aacirun
= runtime
->private_data
;
443 aacirun
->start
= (void *)runtime
->dma_area
;
444 aacirun
->end
= aacirun
->start
+ runtime
->dma_bytes
;
445 aacirun
->ptr
= aacirun
->start
;
447 aacirun
->bytes
= frames_to_bytes(runtime
, runtime
->period_size
);
452 static snd_pcm_uframes_t
aaci_pcm_pointer(struct snd_pcm_substream
*substream
)
454 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
455 struct aaci_runtime
*aacirun
= runtime
->private_data
;
456 ssize_t bytes
= aacirun
->ptr
- aacirun
->start
;
458 return bytes_to_frames(runtime
, bytes
);
461 static int aaci_pcm_mmap(struct snd_pcm_substream
*substream
, struct vm_area_struct
*vma
)
463 return devdma_mmap(NULL
, substream
, vma
);
468 * Playback specific ALSA stuff
470 static const u32 channels_to_txmask
[] = {
471 [2] = TXCR_TX3
| TXCR_TX4
,
472 [4] = TXCR_TX3
| TXCR_TX4
| TXCR_TX7
| TXCR_TX8
,
473 [6] = TXCR_TX3
| TXCR_TX4
| TXCR_TX7
| TXCR_TX8
| TXCR_TX6
| TXCR_TX9
,
477 * We can support two and four channel audio. Unfortunately
478 * six channel audio requires a non-standard channel ordering:
480 * 4 -> FL(3), FR(4), SL(7), SR(8)
481 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
482 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
483 * This requires an ALSA configuration file to correct.
485 static unsigned int channel_list
[] = { 2, 4, 6 };
488 aaci_rule_channels(struct snd_pcm_hw_params
*p
, struct snd_pcm_hw_rule
*rule
)
490 struct aaci
*aaci
= rule
->private;
491 unsigned int chan_mask
= 1 << 0, slots
;
494 * pcms[0] is the our 5.1 PCM instance.
496 slots
= aaci
->ac97_bus
->pcms
[0].r
[0].slots
;
497 if (slots
& (1 << AC97_SLOT_PCM_SLEFT
)) {
499 if (slots
& (1 << AC97_SLOT_LFE
))
503 return snd_interval_list(hw_param_interval(p
, rule
->var
),
504 ARRAY_SIZE(channel_list
), channel_list
,
508 static int aaci_pcm_playback_open(struct snd_pcm_substream
*substream
)
510 struct aaci
*aaci
= substream
->private_data
;
514 * Add rule describing channel dependency.
516 ret
= snd_pcm_hw_rule_add(substream
->runtime
, 0,
517 SNDRV_PCM_HW_PARAM_CHANNELS
,
518 aaci_rule_channels
, aaci
,
519 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
523 return aaci_pcm_open(aaci
, substream
, &aaci
->playback
);
526 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream
*substream
,
527 struct snd_pcm_hw_params
*params
)
529 struct aaci
*aaci
= substream
->private_data
;
530 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
531 unsigned int channels
= params_channels(params
);
534 WARN_ON(channels
>= ARRAY_SIZE(channels_to_txmask
) ||
535 !channels_to_txmask
[channels
]);
537 ret
= aaci_pcm_hw_params(substream
, aacirun
, params
);
540 * Enable FIFO, compact mode, 16 bits per sample.
541 * FIXME: double rate slots?
544 aacirun
->cr
= TXCR_FEN
| TXCR_COMPACT
| TXCR_TSZ16
;
545 aacirun
->cr
|= channels_to_txmask
[channels
];
547 aacirun
->fifosz
= aaci
->fifosize
* 4;
548 if (aacirun
->cr
& TXCR_COMPACT
)
549 aacirun
->fifosz
>>= 1;
554 static void aaci_pcm_playback_stop(struct aaci_runtime
*aacirun
)
558 ie
= readl(aacirun
->base
+ AACI_IE
);
559 ie
&= ~(IE_URIE
|IE_TXIE
);
560 writel(ie
, aacirun
->base
+ AACI_IE
);
561 aacirun
->cr
&= ~TXCR_TXEN
;
562 aaci_chan_wait_ready(aacirun
);
563 writel(aacirun
->cr
, aacirun
->base
+ AACI_TXCR
);
566 static void aaci_pcm_playback_start(struct aaci_runtime
*aacirun
)
570 aaci_chan_wait_ready(aacirun
);
571 aacirun
->cr
|= TXCR_TXEN
;
573 ie
= readl(aacirun
->base
+ AACI_IE
);
574 ie
|= IE_URIE
| IE_TXIE
;
575 writel(ie
, aacirun
->base
+ AACI_IE
);
576 writel(aacirun
->cr
, aacirun
->base
+ AACI_TXCR
);
579 static int aaci_pcm_playback_trigger(struct snd_pcm_substream
*substream
, int cmd
)
581 struct aaci
*aaci
= substream
->private_data
;
582 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
586 spin_lock_irqsave(&aaci
->lock
, flags
);
588 case SNDRV_PCM_TRIGGER_START
:
589 aaci_pcm_playback_start(aacirun
);
592 case SNDRV_PCM_TRIGGER_RESUME
:
593 aaci_pcm_playback_start(aacirun
);
596 case SNDRV_PCM_TRIGGER_STOP
:
597 aaci_pcm_playback_stop(aacirun
);
600 case SNDRV_PCM_TRIGGER_SUSPEND
:
601 aaci_pcm_playback_stop(aacirun
);
604 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
607 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
613 spin_unlock_irqrestore(&aaci
->lock
, flags
);
618 static struct snd_pcm_ops aaci_playback_ops
= {
619 .open
= aaci_pcm_playback_open
,
620 .close
= aaci_pcm_close
,
621 .ioctl
= snd_pcm_lib_ioctl
,
622 .hw_params
= aaci_pcm_playback_hw_params
,
623 .hw_free
= aaci_pcm_hw_free
,
624 .prepare
= aaci_pcm_prepare
,
625 .trigger
= aaci_pcm_playback_trigger
,
626 .pointer
= aaci_pcm_pointer
,
627 .mmap
= aaci_pcm_mmap
,
636 static int aaci_do_suspend(struct snd_card
*card
, unsigned int state
)
638 struct aaci
*aaci
= card
->private_data
;
639 snd_power_change_state(card
, SNDRV_CTL_POWER_D3cold
);
640 snd_pcm_suspend_all(aaci
->pcm
);
644 static int aaci_do_resume(struct snd_card
*card
, unsigned int state
)
646 snd_power_change_state(card
, SNDRV_CTL_POWER_D0
);
650 static int aaci_suspend(struct amba_device
*dev
, pm_message_t state
)
652 struct snd_card
*card
= amba_get_drvdata(dev
);
653 return card
? aaci_do_suspend(card
) : 0;
656 static int aaci_resume(struct amba_device
*dev
)
658 struct snd_card
*card
= amba_get_drvdata(dev
);
659 return card
? aaci_do_resume(card
) : 0;
662 #define aaci_do_suspend NULL
663 #define aaci_do_resume NULL
664 #define aaci_suspend NULL
665 #define aaci_resume NULL
669 static struct ac97_pcm ac97_defs
[] __devinitdata
= {
670 [0] = { /* Front PCM */
674 .slots
= (1 << AC97_SLOT_PCM_LEFT
) |
675 (1 << AC97_SLOT_PCM_RIGHT
) |
676 (1 << AC97_SLOT_PCM_CENTER
) |
677 (1 << AC97_SLOT_PCM_SLEFT
) |
678 (1 << AC97_SLOT_PCM_SRIGHT
) |
679 (1 << AC97_SLOT_LFE
),
688 .slots
= (1 << AC97_SLOT_PCM_LEFT
) |
689 (1 << AC97_SLOT_PCM_RIGHT
),
698 .slots
= (1 << AC97_SLOT_MIC
),
704 static struct snd_ac97_bus_ops aaci_bus_ops
= {
705 .write
= aaci_ac97_write
,
706 .read
= aaci_ac97_read
,
709 static int __devinit
aaci_probe_ac97(struct aaci
*aaci
)
711 struct snd_ac97_template ac97_template
;
712 struct snd_ac97_bus
*ac97_bus
;
713 struct snd_ac97
*ac97
;
717 * Assert AACIRESET for 2us
719 writel(0, aaci
->base
+ AACI_RESET
);
721 writel(RESET_NRST
, aaci
->base
+ AACI_RESET
);
724 * Give the AC'97 codec more than enough time
725 * to wake up. (42us = ~2 frames at 48kHz.)
729 ret
= snd_ac97_bus(aaci
->card
, 0, &aaci_bus_ops
, aaci
, &ac97_bus
);
733 ac97_bus
->clock
= 48000;
734 aaci
->ac97_bus
= ac97_bus
;
736 memset(&ac97_template
, 0, sizeof(struct snd_ac97_template
));
737 ac97_template
.private_data
= aaci
;
738 ac97_template
.num
= 0;
739 ac97_template
.scaps
= AC97_SCAP_SKIP_MODEM
;
741 ret
= snd_ac97_mixer(ac97_bus
, &ac97_template
, &ac97
);
746 * Disable AC97 PC Beep input on audio codecs.
748 if (ac97_is_audio(ac97
))
749 snd_ac97_write_cache(ac97
, AC97_PC_BEEP
, 0x801e);
751 ret
= snd_ac97_pcm_assign(ac97_bus
, ARRAY_SIZE(ac97_defs
), ac97_defs
);
755 aaci
->playback
.pcm
= &ac97_bus
->pcms
[0];
761 static void aaci_free_card(struct snd_card
*card
)
763 struct aaci
*aaci
= card
->private_data
;
768 static struct aaci
* __devinit
aaci_init_card(struct amba_device
*dev
)
771 struct snd_card
*card
;
773 card
= snd_card_new(SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
,
774 THIS_MODULE
, sizeof(struct aaci
));
776 return ERR_PTR(-ENOMEM
);
778 card
->private_free
= aaci_free_card
;
780 strlcpy(card
->driver
, DRIVER_NAME
, sizeof(card
->driver
));
781 strlcpy(card
->shortname
, "ARM AC'97 Interface", sizeof(card
->shortname
));
782 snprintf(card
->longname
, sizeof(card
->longname
),
783 "%s at 0x%016llx, irq %d",
784 card
->shortname
, (unsigned long long)dev
->res
.start
,
787 aaci
= card
->private_data
;
788 mutex_init(&aaci
->ac97_sem
);
789 spin_lock_init(&aaci
->lock
);
793 /* Set MAINCR to allow slot 1 and 2 data IO */
794 aaci
->maincr
= MAINCR_IE
| MAINCR_SL1RXEN
| MAINCR_SL1TXEN
|
795 MAINCR_SL2RXEN
| MAINCR_SL2TXEN
;
800 static int __devinit
aaci_init_pcm(struct aaci
*aaci
)
805 ret
= snd_pcm_new(aaci
->card
, "AACI AC'97", 0, 1, 0, &pcm
);
808 pcm
->private_data
= aaci
;
811 strlcpy(pcm
->name
, DRIVER_NAME
, sizeof(pcm
->name
));
813 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
, &aaci_playback_ops
);
819 static unsigned int __devinit
aaci_size_fifo(struct aaci
*aaci
)
821 void __iomem
*base
= aaci
->base
+ AACI_CSCH1
;
824 writel(TXCR_FEN
| TXCR_TSZ16
| TXCR_TXEN
, base
+ AACI_TXCR
);
826 for (i
= 0; !(readl(base
+ AACI_SR
) & SR_TXFF
) && i
< 4096; i
++)
827 writel(0, aaci
->base
+ AACI_DR1
);
829 writel(0, base
+ AACI_TXCR
);
832 * Re-initialise the AACI after the FIFO depth test, to
833 * ensure that the FIFOs are empty. Unfortunately, merely
834 * disabling the channel doesn't clear the FIFO.
836 writel(aaci
->maincr
& ~MAINCR_IE
, aaci
->base
+ AACI_MAINCR
);
837 writel(aaci
->maincr
, aaci
->base
+ AACI_MAINCR
);
840 * If we hit 4096, we failed. Go back to the specified
849 static int __devinit
aaci_probe(struct amba_device
*dev
, void *id
)
854 ret
= amba_request_regions(dev
, NULL
);
858 aaci
= aaci_init_card(dev
);
864 aaci
->base
= ioremap(dev
->res
.start
, SZ_4K
);
871 * Playback uses AACI channel 0
873 aaci
->playback
.base
= aaci
->base
+ AACI_CSCH1
;
874 aaci
->playback
.fifo
= aaci
->base
+ AACI_DR1
;
876 for (i
= 0; i
< 4; i
++) {
877 void __iomem
*base
= aaci
->base
+ i
* 0x14;
879 writel(0, base
+ AACI_IE
);
880 writel(0, base
+ AACI_TXCR
);
881 writel(0, base
+ AACI_RXCR
);
884 writel(0x1fff, aaci
->base
+ AACI_INTCLR
);
885 writel(aaci
->maincr
, aaci
->base
+ AACI_MAINCR
);
887 ret
= aaci_probe_ac97(aaci
);
892 * Size the FIFOs (must be multiple of 16).
894 aaci
->fifosize
= aaci_size_fifo(aaci
);
895 if (aaci
->fifosize
& 15) {
896 printk(KERN_WARNING
"AACI: fifosize = %d not supported\n",
902 ret
= aaci_init_pcm(aaci
);
906 snd_card_set_dev(aaci
->card
, &dev
->dev
);
908 ret
= snd_card_register(aaci
->card
);
910 dev_info(&dev
->dev
, "%s, fifo %d\n", aaci
->card
->longname
,
912 amba_set_drvdata(dev
, aaci
->card
);
918 snd_card_free(aaci
->card
);
919 amba_release_regions(dev
);
923 static int __devexit
aaci_remove(struct amba_device
*dev
)
925 struct snd_card
*card
= amba_get_drvdata(dev
);
927 amba_set_drvdata(dev
, NULL
);
930 struct aaci
*aaci
= card
->private_data
;
931 writel(0, aaci
->base
+ AACI_MAINCR
);
934 amba_release_regions(dev
);
940 static struct amba_id aaci_ids
[] = {
948 static struct amba_driver aaci_driver
= {
953 .remove
= __devexit_p(aaci_remove
),
954 .suspend
= aaci_suspend
,
955 .resume
= aaci_resume
,
956 .id_table
= aaci_ids
,
959 static int __init
aaci_init(void)
961 return amba_driver_register(&aaci_driver
);
964 static void __exit
aaci_exit(void)
966 amba_driver_unregister(&aaci_driver
);
969 module_init(aaci_init
);
970 module_exit(aaci_exit
);
972 MODULE_LICENSE("GPL");
973 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");