2 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
4 * Author: Nicolas Pitre
5 * Created: Dec 02, 2004
6 * Copyright: MontaVista Software Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/interrupt.h>
18 #include <linux/wait.h>
19 #include <linux/clk.h>
20 #include <linux/delay.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/ac97_codec.h>
25 #include <sound/initval.h>
28 #include <linux/mutex.h>
29 #include <asm/hardware.h>
30 #include <asm/arch/pxa-regs.h>
31 #include <asm/arch/pxa2xx-gpio.h>
32 #include <asm/arch/audio.h>
34 #include "pxa2xx-pcm.h"
37 static DEFINE_MUTEX(car_mutex
);
38 static DECLARE_WAIT_QUEUE_HEAD(gsr_wq
);
39 static volatile long gsr_bits
;
40 static struct clk
*ac97_clk
;
42 static struct clk
*ac97conf_clk
;
48 * o Slot 12 read from modem space will hang controller.
49 * o CDONE, SDONE interrupt fails after any slot 12 IO.
51 * We therefore have an hybrid approach for waiting on SDONE (interrupt or
52 * 1 jiffy timeout if interrupt never comes).
55 static unsigned short pxa2xx_ac97_read(struct snd_ac97
*ac97
, unsigned short reg
)
57 unsigned short val
= -1;
58 volatile u32
*reg_addr
;
60 mutex_lock(&car_mutex
);
62 /* set up primary or secondary codec space */
63 reg_addr
= (ac97
->num
& 1) ? &SAC_REG_BASE
: &PAC_REG_BASE
;
64 reg_addr
+= (reg
>> 1);
66 /* start read access across the ac97 link */
67 GSR
= GSR_CDONE
| GSR_SDONE
;
70 if (reg
== AC97_GPIO_STATUS
)
72 if (wait_event_timeout(gsr_wq
, (GSR
| gsr_bits
) & GSR_SDONE
, 1) <= 0 &&
73 !((GSR
| gsr_bits
) & GSR_SDONE
)) {
74 printk(KERN_ERR
"%s: read error (ac97_reg=%d GSR=%#lx)\n",
75 __FUNCTION__
, reg
, GSR
| gsr_bits
);
81 GSR
= GSR_CDONE
| GSR_SDONE
;
84 /* but we've just started another cycle... */
85 wait_event_timeout(gsr_wq
, (GSR
| gsr_bits
) & GSR_SDONE
, 1);
87 out
: mutex_unlock(&car_mutex
);
91 static void pxa2xx_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
, unsigned short val
)
93 volatile u32
*reg_addr
;
95 mutex_lock(&car_mutex
);
97 /* set up primary or secondary codec space */
98 reg_addr
= (ac97
->num
& 1) ? &SAC_REG_BASE
: &PAC_REG_BASE
;
99 reg_addr
+= (reg
>> 1);
101 GSR
= GSR_CDONE
| GSR_SDONE
;
104 if (wait_event_timeout(gsr_wq
, (GSR
| gsr_bits
) & GSR_CDONE
, 1) <= 0 &&
105 !((GSR
| gsr_bits
) & GSR_CDONE
))
106 printk(KERN_ERR
"%s: write error (ac97_reg=%d GSR=%#lx)\n",
107 __FUNCTION__
, reg
, GSR
| gsr_bits
);
109 mutex_unlock(&car_mutex
);
112 static void pxa2xx_ac97_reset(struct snd_ac97
*ac97
)
114 /* First, try cold reset */
115 GCR
&= GCR_COLD_RST
; /* clear everything but nCRST */
116 GCR
&= ~GCR_COLD_RST
; /* then assert nCRST */
120 /* PXA27x Developers Manual section 13.5.2.2.1 */
121 clk_enable(ac97conf_clk
);
123 clk_disable(ac97conf_clk
);
128 GCR
|= GCR_CDONE_IE
|GCR_SDONE_IE
;
129 wait_event_timeout(gsr_wq
, gsr_bits
& (GSR_PCR
| GSR_SCR
), 1);
132 if (!((GSR
| gsr_bits
) & (GSR_PCR
| GSR_SCR
))) {
133 printk(KERN_INFO
"%s: cold reset timeout (GSR=%#lx)\n",
134 __FUNCTION__
, gsr_bits
);
136 /* let's try warm reset */
139 /* warm reset broken on Bulverde,
140 so manually keep AC97 reset high */
141 pxa_gpio_mode(113 | GPIO_OUT
| GPIO_DFLT_HIGH
);
144 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT
);
147 GCR
|= GCR_WARM_RST
|GCR_PRIRDY_IEN
|GCR_SECRDY_IEN
;
148 wait_event_timeout(gsr_wq
, gsr_bits
& (GSR_PCR
| GSR_SCR
), 1);
151 if (!((GSR
| gsr_bits
) & (GSR_PCR
| GSR_SCR
)))
152 printk(KERN_INFO
"%s: warm reset timeout (GSR=%#lx)\n",
153 __FUNCTION__
, gsr_bits
);
156 GCR
&= ~(GCR_PRIRDY_IEN
|GCR_SECRDY_IEN
);
157 GCR
|= GCR_SDONE_IE
|GCR_CDONE_IE
;
160 static irqreturn_t
pxa2xx_ac97_irq(int irq
, void *dev_id
)
171 /* Although we don't use those we still need to clear them
172 since they tend to spuriously trigger when MMC is used
173 (hardware bug? go figure)... */
185 static struct snd_ac97_bus_ops pxa2xx_ac97_ops
= {
186 .read
= pxa2xx_ac97_read
,
187 .write
= pxa2xx_ac97_write
,
188 .reset
= pxa2xx_ac97_reset
,
191 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out
= {
192 .name
= "AC97 PCM out",
193 .dev_addr
= __PREG(PCDR
),
194 .drcmr
= &DRCMRTXPCDR
,
195 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
196 DCMD_BURST32
| DCMD_WIDTH4
,
199 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in
= {
200 .name
= "AC97 PCM in",
201 .dev_addr
= __PREG(PCDR
),
202 .drcmr
= &DRCMRRXPCDR
,
203 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
204 DCMD_BURST32
| DCMD_WIDTH4
,
207 static struct snd_pcm
*pxa2xx_ac97_pcm
;
208 static struct snd_ac97
*pxa2xx_ac97_ac97
;
210 static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream
*substream
)
212 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
213 pxa2xx_audio_ops_t
*platform_ops
;
216 runtime
->hw
.channels_min
= 2;
217 runtime
->hw
.channels_max
= 2;
219 r
= (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) ?
220 AC97_RATES_FRONT_DAC
: AC97_RATES_ADC
;
221 runtime
->hw
.rates
= pxa2xx_ac97_ac97
->rates
[r
];
222 snd_pcm_limit_hw_rates(runtime
);
224 platform_ops
= substream
->pcm
->card
->dev
->platform_data
;
225 if (platform_ops
&& platform_ops
->startup
)
226 return platform_ops
->startup(substream
, platform_ops
->priv
);
231 static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream
*substream
)
233 pxa2xx_audio_ops_t
*platform_ops
;
235 platform_ops
= substream
->pcm
->card
->dev
->platform_data
;
236 if (platform_ops
&& platform_ops
->shutdown
)
237 platform_ops
->shutdown(substream
, platform_ops
->priv
);
240 static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream
*substream
)
242 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
243 int reg
= (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) ?
244 AC97_PCM_FRONT_DAC_RATE
: AC97_PCM_LR_ADC_RATE
;
245 return snd_ac97_set_rate(pxa2xx_ac97_ac97
, reg
, runtime
->rate
);
248 static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client
= {
249 .playback_params
= &pxa2xx_ac97_pcm_out
,
250 .capture_params
= &pxa2xx_ac97_pcm_in
,
251 .startup
= pxa2xx_ac97_pcm_startup
,
252 .shutdown
= pxa2xx_ac97_pcm_shutdown
,
253 .prepare
= pxa2xx_ac97_pcm_prepare
,
258 static int pxa2xx_ac97_do_suspend(struct snd_card
*card
, pm_message_t state
)
260 pxa2xx_audio_ops_t
*platform_ops
= card
->dev
->platform_data
;
262 snd_power_change_state(card
, SNDRV_CTL_POWER_D3cold
);
263 snd_pcm_suspend_all(pxa2xx_ac97_pcm
);
264 snd_ac97_suspend(pxa2xx_ac97_ac97
);
265 if (platform_ops
&& platform_ops
->suspend
)
266 platform_ops
->suspend(platform_ops
->priv
);
267 GCR
|= GCR_ACLINK_OFF
;
268 clk_disable(ac97_clk
);
273 static int pxa2xx_ac97_do_resume(struct snd_card
*card
)
275 pxa2xx_audio_ops_t
*platform_ops
= card
->dev
->platform_data
;
277 clk_enable(ac97_clk
);
278 if (platform_ops
&& platform_ops
->resume
)
279 platform_ops
->resume(platform_ops
->priv
);
280 snd_ac97_resume(pxa2xx_ac97_ac97
);
281 snd_power_change_state(card
, SNDRV_CTL_POWER_D0
);
286 static int pxa2xx_ac97_suspend(struct platform_device
*dev
, pm_message_t state
)
288 struct snd_card
*card
= platform_get_drvdata(dev
);
292 ret
= pxa2xx_ac97_do_suspend(card
, PMSG_SUSPEND
);
297 static int pxa2xx_ac97_resume(struct platform_device
*dev
)
299 struct snd_card
*card
= platform_get_drvdata(dev
);
303 ret
= pxa2xx_ac97_do_resume(card
);
309 #define pxa2xx_ac97_suspend NULL
310 #define pxa2xx_ac97_resume NULL
313 static int __devinit
pxa2xx_ac97_probe(struct platform_device
*dev
)
315 struct snd_card
*card
;
316 struct snd_ac97_bus
*ac97_bus
;
317 struct snd_ac97_template ac97_template
;
321 card
= snd_card_new(SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
,
326 card
->dev
= &dev
->dev
;
327 strncpy(card
->driver
, dev
->dev
.driver
->name
, sizeof(card
->driver
));
329 ret
= pxa2xx_pcm_new(card
, &pxa2xx_ac97_pcm_client
, &pxa2xx_ac97_pcm
);
333 ret
= request_irq(IRQ_AC97
, pxa2xx_ac97_irq
, 0, "AC97", NULL
);
337 pxa_gpio_mode(GPIO31_SYNC_AC97_MD
);
338 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD
);
339 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD
);
340 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD
);
342 /* Use GPIO 113 as AC97 Reset on Bulverde */
343 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT
);
344 ac97conf_clk
= clk_get(&dev
->dev
, "AC97CONFCLK");
345 if (IS_ERR(ac97conf_clk
)) {
346 ret
= PTR_ERR(ac97conf_clk
);
352 ac97_clk
= clk_get(&dev
->dev
, "AC97CLK");
353 if (IS_ERR(ac97_clk
)) {
354 ret
= PTR_ERR(ac97_clk
);
358 clk_enable(ac97_clk
);
360 ret
= snd_ac97_bus(card
, 0, &pxa2xx_ac97_ops
, NULL
, &ac97_bus
);
363 memset(&ac97_template
, 0, sizeof(ac97_template
));
364 ret
= snd_ac97_mixer(ac97_bus
, &ac97_template
, &pxa2xx_ac97_ac97
);
368 snprintf(card
->shortname
, sizeof(card
->shortname
),
369 "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97
));
370 snprintf(card
->longname
, sizeof(card
->longname
),
371 "%s (%s)", dev
->dev
.driver
->name
, card
->mixername
);
373 snd_card_set_dev(card
, &dev
->dev
);
374 ret
= snd_card_register(card
);
376 platform_set_drvdata(dev
, card
);
384 GCR
|= GCR_ACLINK_OFF
;
385 free_irq(IRQ_AC97
, NULL
);
386 clk_disable(ac97_clk
);
392 clk_put(ac97conf_clk
);
399 static int __devexit
pxa2xx_ac97_remove(struct platform_device
*dev
)
401 struct snd_card
*card
= platform_get_drvdata(dev
);
405 platform_set_drvdata(dev
, NULL
);
406 GCR
|= GCR_ACLINK_OFF
;
407 free_irq(IRQ_AC97
, NULL
);
408 clk_disable(ac97_clk
);
412 clk_put(ac97conf_clk
);
420 static struct platform_driver pxa2xx_ac97_driver
= {
421 .probe
= pxa2xx_ac97_probe
,
422 .remove
= __devexit_p(pxa2xx_ac97_remove
),
423 .suspend
= pxa2xx_ac97_suspend
,
424 .resume
= pxa2xx_ac97_resume
,
426 .name
= "pxa2xx-ac97",
430 static int __init
pxa2xx_ac97_init(void)
432 return platform_driver_register(&pxa2xx_ac97_driver
);
435 static void __exit
pxa2xx_ac97_exit(void)
437 platform_driver_unregister(&pxa2xx_ac97_driver
);
440 module_init(pxa2xx_ac97_init
);
441 module_exit(pxa2xx_ac97_exit
);
443 MODULE_AUTHOR("Nicolas Pitre");
444 MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
445 MODULE_LICENSE("GPL");