[PATCH] Replace 0xff.. with correct DMA_xBIT_MASK
[deliverable/linux.git] / sound / pci / ad1889.c
1 /* Analog Devices 1889 audio driver
2 *
3 * This is a driver for the AD1889 PCI audio chipset found
4 * on the HP PA-RISC [BCJ]-xxx0 workstations.
5 *
6 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
7 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
8 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * TODO:
24 * Do we need to take care of CCS register?
25 * Maybe we could use finer grained locking (separate locks for pb/cap)?
26 * Wishlist:
27 * Control Interface (mixer) support
28 * Better AC97 support (VSR...)?
29 * PM support
30 * MIDI support
31 * Game Port support
32 * SG DMA support (this will need *alot* of work)
33 */
34
35 #include <linux/init.h>
36 #include <linux/pci.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/slab.h>
39 #include <linux/interrupt.h>
40 #include <linux/compiler.h>
41 #include <linux/delay.h>
42 #include <linux/dma-mapping.h>
43
44 #include <sound/driver.h>
45 #include <sound/core.h>
46 #include <sound/pcm.h>
47 #include <sound/initval.h>
48 #include <sound/ac97_codec.h>
49
50 #include <asm/io.h>
51
52 #include "ad1889.h"
53 #include "ac97/ac97_id.h"
54
55 #define AD1889_DRVVER "Version: 1.7"
56
57 MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
58 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
59 MODULE_LICENSE("GPL");
60 MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
61
62 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
63 module_param_array(index, int, NULL, 0444);
64 MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
65
66 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
67 module_param_array(id, charp, NULL, 0444);
68 MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
69
70 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
71 module_param_array(enable, bool, NULL, 0444);
72 MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
73
74 static char *ac97_quirk[SNDRV_CARDS];
75 module_param_array(ac97_quirk, charp, NULL, 0444);
76 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
77
78 #define DEVNAME "ad1889"
79 #define PFX DEVNAME ": "
80
81 /* let's use the global sound debug interfaces */
82 #define ad1889_debug(fmt, arg...) snd_printd(KERN_DEBUG fmt, ## arg)
83
84 /* keep track of some hw registers */
85 struct ad1889_register_state {
86 u16 reg; /* reg setup */
87 u32 addr; /* dma base address */
88 unsigned long size; /* DMA buffer size */
89 };
90
91 struct snd_ad1889 {
92 struct snd_card *card;
93 struct pci_dev *pci;
94
95 int irq;
96 unsigned long bar;
97 void __iomem *iobase;
98
99 struct snd_ac97 *ac97;
100 struct snd_ac97_bus *ac97_bus;
101 struct snd_pcm *pcm;
102 struct snd_info_entry *proc;
103
104 struct snd_pcm_substream *psubs;
105 struct snd_pcm_substream *csubs;
106
107 /* playback register state */
108 struct ad1889_register_state wave;
109 struct ad1889_register_state ramc;
110
111 spinlock_t lock;
112 };
113
114 static inline u16
115 ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
116 {
117 return readw(chip->iobase + reg);
118 }
119
120 static inline void
121 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
122 {
123 writew(val, chip->iobase + reg);
124 }
125
126 static inline u32
127 ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
128 {
129 return readl(chip->iobase + reg);
130 }
131
132 static inline void
133 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
134 {
135 writel(val, chip->iobase + reg);
136 }
137
138 static inline void
139 ad1889_unmute(struct snd_ad1889 *chip)
140 {
141 u16 st;
142 st = ad1889_readw(chip, AD_DS_WADA) &
143 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
144 ad1889_writew(chip, AD_DS_WADA, st);
145 ad1889_readw(chip, AD_DS_WADA);
146 }
147
148 static inline void
149 ad1889_mute(struct snd_ad1889 *chip)
150 {
151 u16 st;
152 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
153 ad1889_writew(chip, AD_DS_WADA, st);
154 ad1889_readw(chip, AD_DS_WADA);
155 }
156
157 static inline void
158 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
159 {
160 ad1889_writel(chip, AD_DMA_ADCBA, address);
161 ad1889_writel(chip, AD_DMA_ADCCA, address);
162 }
163
164 static inline void
165 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
166 {
167 ad1889_writel(chip, AD_DMA_ADCBC, count);
168 ad1889_writel(chip, AD_DMA_ADCCC, count);
169 }
170
171 static inline void
172 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
173 {
174 ad1889_writel(chip, AD_DMA_ADCIB, count);
175 ad1889_writel(chip, AD_DMA_ADCIC, count);
176 }
177
178 static inline void
179 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
180 {
181 ad1889_writel(chip, AD_DMA_WAVBA, address);
182 ad1889_writel(chip, AD_DMA_WAVCA, address);
183 }
184
185 static inline void
186 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
187 {
188 ad1889_writel(chip, AD_DMA_WAVBC, count);
189 ad1889_writel(chip, AD_DMA_WAVCC, count);
190 }
191
192 static inline void
193 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
194 {
195 ad1889_writel(chip, AD_DMA_WAVIB, count);
196 ad1889_writel(chip, AD_DMA_WAVIC, count);
197 }
198
199 static void
200 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
201 {
202 u16 reg;
203
204 if (channel & AD_CHAN_WAV) {
205 /* Disable wave channel */
206 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
207 ad1889_writew(chip, AD_DS_WSMC, reg);
208 chip->wave.reg = reg;
209
210 /* disable IRQs */
211 reg = ad1889_readw(chip, AD_DMA_WAV);
212 reg &= AD_DMA_IM_DIS;
213 reg &= ~AD_DMA_LOOP;
214 ad1889_writew(chip, AD_DMA_WAV, reg);
215
216 /* clear IRQ and address counters and pointers */
217 ad1889_load_wave_buffer_address(chip, 0x0);
218 ad1889_load_wave_buffer_count(chip, 0x0);
219 ad1889_load_wave_interrupt_count(chip, 0x0);
220
221 /* flush */
222 ad1889_readw(chip, AD_DMA_WAV);
223 }
224
225 if (channel & AD_CHAN_ADC) {
226 /* Disable ADC channel */
227 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
228 ad1889_writew(chip, AD_DS_RAMC, reg);
229 chip->ramc.reg = reg;
230
231 reg = ad1889_readw(chip, AD_DMA_ADC);
232 reg &= AD_DMA_IM_DIS;
233 reg &= ~AD_DMA_LOOP;
234 ad1889_writew(chip, AD_DMA_ADC, reg);
235
236 ad1889_load_adc_buffer_address(chip, 0x0);
237 ad1889_load_adc_buffer_count(chip, 0x0);
238 ad1889_load_adc_interrupt_count(chip, 0x0);
239
240 /* flush */
241 ad1889_readw(chip, AD_DMA_ADC);
242 }
243 }
244
245 static inline u16
246 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
247 {
248 struct snd_ad1889 *chip = ac97->private_data;
249 return ad1889_readw(chip, AD_AC97_BASE + reg);
250 }
251
252 static inline void
253 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
254 {
255 struct snd_ad1889 *chip = ac97->private_data;
256 ad1889_writew(chip, AD_AC97_BASE + reg, val);
257 }
258
259 static int
260 snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
261 {
262 int retry = 400; /* average needs 352 msec */
263
264 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
265 && --retry)
266 mdelay(1);
267 if (!retry) {
268 snd_printk(KERN_ERR PFX "[%s] Link is not ready.\n",
269 __FUNCTION__);
270 return -EIO;
271 }
272 ad1889_debug("[%s] ready after %d ms\n", __FUNCTION__, 400 - retry);
273
274 return 0;
275 }
276
277 static int
278 snd_ad1889_hw_params(struct snd_pcm_substream *substream,
279 struct snd_pcm_hw_params *hw_params)
280 {
281 return snd_pcm_lib_malloc_pages(substream,
282 params_buffer_bytes(hw_params));
283 }
284
285 static int
286 snd_ad1889_hw_free(struct snd_pcm_substream *substream)
287 {
288 return snd_pcm_lib_free_pages(substream);
289 }
290
291 static struct snd_pcm_hardware snd_ad1889_playback_hw = {
292 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
293 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
294 .formats = SNDRV_PCM_FMTBIT_S16_LE,
295 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
296 .rate_min = 8000, /* docs say 7000, but we're lazy */
297 .rate_max = 48000,
298 .channels_min = 1,
299 .channels_max = 2,
300 .buffer_bytes_max = BUFFER_BYTES_MAX,
301 .period_bytes_min = PERIOD_BYTES_MIN,
302 .period_bytes_max = PERIOD_BYTES_MAX,
303 .periods_min = PERIODS_MIN,
304 .periods_max = PERIODS_MAX,
305 /*.fifo_size = 0,*/
306 };
307
308 static struct snd_pcm_hardware snd_ad1889_capture_hw = {
309 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
310 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
311 .formats = SNDRV_PCM_FMTBIT_S16_LE,
312 .rates = SNDRV_PCM_RATE_48000,
313 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
314 .rate_max = 48000,
315 .channels_min = 1,
316 .channels_max = 2,
317 .buffer_bytes_max = BUFFER_BYTES_MAX,
318 .period_bytes_min = PERIOD_BYTES_MIN,
319 .period_bytes_max = PERIOD_BYTES_MAX,
320 .periods_min = PERIODS_MIN,
321 .periods_max = PERIODS_MAX,
322 /*.fifo_size = 0,*/
323 };
324
325 static int
326 snd_ad1889_playback_open(struct snd_pcm_substream *ss)
327 {
328 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
329 struct snd_pcm_runtime *rt = ss->runtime;
330
331 chip->psubs = ss;
332 rt->hw = snd_ad1889_playback_hw;
333
334 return 0;
335 }
336
337 static int
338 snd_ad1889_capture_open(struct snd_pcm_substream *ss)
339 {
340 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
341 struct snd_pcm_runtime *rt = ss->runtime;
342
343 chip->csubs = ss;
344 rt->hw = snd_ad1889_capture_hw;
345
346 return 0;
347 }
348
349 static int
350 snd_ad1889_playback_close(struct snd_pcm_substream *ss)
351 {
352 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
353 chip->psubs = NULL;
354 return 0;
355 }
356
357 static int
358 snd_ad1889_capture_close(struct snd_pcm_substream *ss)
359 {
360 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
361 chip->csubs = NULL;
362 return 0;
363 }
364
365 static int
366 snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
367 {
368 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
369 struct snd_pcm_runtime *rt = ss->runtime;
370 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
371 unsigned int count = snd_pcm_lib_period_bytes(ss);
372 u16 reg;
373
374 ad1889_channel_reset(chip, AD_CHAN_WAV);
375
376 reg = ad1889_readw(chip, AD_DS_WSMC);
377
378 /* Mask out 16-bit / Stereo */
379 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
380
381 if (snd_pcm_format_width(rt->format) == 16)
382 reg |= AD_DS_WSMC_WA16;
383
384 if (rt->channels > 1)
385 reg |= AD_DS_WSMC_WAST;
386
387 /* let's make sure we don't clobber ourselves */
388 spin_lock_irq(&chip->lock);
389
390 chip->wave.size = size;
391 chip->wave.reg = reg;
392 chip->wave.addr = rt->dma_addr;
393
394 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
395
396 /* Set sample rates on the codec */
397 ad1889_writew(chip, AD_DS_WAS, rt->rate);
398
399 /* Set up DMA */
400 ad1889_load_wave_buffer_address(chip, chip->wave.addr);
401 ad1889_load_wave_buffer_count(chip, size);
402 ad1889_load_wave_interrupt_count(chip, count);
403
404 /* writes flush */
405 ad1889_readw(chip, AD_DS_WSMC);
406
407 spin_unlock_irq(&chip->lock);
408
409 ad1889_debug("prepare playback: addr = 0x%x, count = %u, "
410 "size = %u, reg = 0x%x, rate = %u\n", chip->wave.addr,
411 count, size, reg, rt->rate);
412 return 0;
413 }
414
415 static int
416 snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
417 {
418 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
419 struct snd_pcm_runtime *rt = ss->runtime;
420 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
421 unsigned int count = snd_pcm_lib_period_bytes(ss);
422 u16 reg;
423
424 ad1889_channel_reset(chip, AD_CHAN_ADC);
425
426 reg = ad1889_readw(chip, AD_DS_RAMC);
427
428 /* Mask out 16-bit / Stereo */
429 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
430
431 if (snd_pcm_format_width(rt->format) == 16)
432 reg |= AD_DS_RAMC_AD16;
433
434 if (rt->channels > 1)
435 reg |= AD_DS_RAMC_ADST;
436
437 /* let's make sure we don't clobber ourselves */
438 spin_lock_irq(&chip->lock);
439
440 chip->ramc.size = size;
441 chip->ramc.reg = reg;
442 chip->ramc.addr = rt->dma_addr;
443
444 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
445
446 /* Set up DMA */
447 ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
448 ad1889_load_adc_buffer_count(chip, size);
449 ad1889_load_adc_interrupt_count(chip, count);
450
451 /* writes flush */
452 ad1889_readw(chip, AD_DS_RAMC);
453
454 spin_unlock_irq(&chip->lock);
455
456 ad1889_debug("prepare capture: addr = 0x%x, count = %u, "
457 "size = %u, reg = 0x%x, rate = %u\n", chip->ramc.addr,
458 count, size, reg, rt->rate);
459 return 0;
460 }
461
462 /* this is called in atomic context with IRQ disabled.
463 Must be as fast as possible and not sleep.
464 DMA should be *triggered* by this call.
465 The WSMC "WAEN" bit triggers DMA Wave On/Off */
466 static int
467 snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
468 {
469 u16 wsmc;
470 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
471
472 wsmc = ad1889_readw(chip, AD_DS_WSMC);
473
474 switch (cmd) {
475 case SNDRV_PCM_TRIGGER_START:
476 /* enable DMA loop & interrupts */
477 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
478 wsmc |= AD_DS_WSMC_WAEN;
479 /* 1 to clear CHSS bit */
480 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
481 ad1889_unmute(chip);
482 break;
483 case SNDRV_PCM_TRIGGER_STOP:
484 ad1889_mute(chip);
485 wsmc &= ~AD_DS_WSMC_WAEN;
486 break;
487 default:
488 snd_BUG();
489 return -EINVAL;
490 }
491
492 chip->wave.reg = wsmc;
493 ad1889_writew(chip, AD_DS_WSMC, wsmc);
494 ad1889_readw(chip, AD_DS_WSMC); /* flush */
495
496 /* reset the chip when STOP - will disable IRQs */
497 if (cmd == SNDRV_PCM_TRIGGER_STOP)
498 ad1889_channel_reset(chip, AD_CHAN_WAV);
499
500 return 0;
501 }
502
503 /* this is called in atomic context with IRQ disabled.
504 Must be as fast as possible and not sleep.
505 DMA should be *triggered* by this call.
506 The RAMC "ADEN" bit triggers DMA ADC On/Off */
507 static int
508 snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
509 {
510 u16 ramc;
511 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
512
513 ramc = ad1889_readw(chip, AD_DS_RAMC);
514
515 switch (cmd) {
516 case SNDRV_PCM_TRIGGER_START:
517 /* enable DMA loop & interrupts */
518 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
519 ramc |= AD_DS_RAMC_ADEN;
520 /* 1 to clear CHSS bit */
521 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
522 break;
523 case SNDRV_PCM_TRIGGER_STOP:
524 ramc &= ~AD_DS_RAMC_ADEN;
525 break;
526 default:
527 return -EINVAL;
528 }
529
530 chip->ramc.reg = ramc;
531 ad1889_writew(chip, AD_DS_RAMC, ramc);
532 ad1889_readw(chip, AD_DS_RAMC); /* flush */
533
534 /* reset the chip when STOP - will disable IRQs */
535 if (cmd == SNDRV_PCM_TRIGGER_STOP)
536 ad1889_channel_reset(chip, AD_CHAN_ADC);
537
538 return 0;
539 }
540
541 /* Called in atomic context with IRQ disabled */
542 static snd_pcm_uframes_t
543 snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
544 {
545 size_t ptr = 0;
546 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
547
548 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
549 return 0;
550
551 ptr = ad1889_readl(chip, AD_DMA_WAVCA);
552 ptr -= chip->wave.addr;
553
554 snd_assert((ptr >= 0) && (ptr < chip->wave.size), return 0);
555
556 return bytes_to_frames(ss->runtime, ptr);
557 }
558
559 /* Called in atomic context with IRQ disabled */
560 static snd_pcm_uframes_t
561 snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
562 {
563 size_t ptr = 0;
564 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
565
566 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
567 return 0;
568
569 ptr = ad1889_readl(chip, AD_DMA_ADCCA);
570 ptr -= chip->ramc.addr;
571
572 snd_assert((ptr >= 0) && (ptr < chip->ramc.size), return 0);
573
574 return bytes_to_frames(ss->runtime, ptr);
575 }
576
577 static struct snd_pcm_ops snd_ad1889_playback_ops = {
578 .open = snd_ad1889_playback_open,
579 .close = snd_ad1889_playback_close,
580 .ioctl = snd_pcm_lib_ioctl,
581 .hw_params = snd_ad1889_hw_params,
582 .hw_free = snd_ad1889_hw_free,
583 .prepare = snd_ad1889_playback_prepare,
584 .trigger = snd_ad1889_playback_trigger,
585 .pointer = snd_ad1889_playback_pointer,
586 };
587
588 static struct snd_pcm_ops snd_ad1889_capture_ops = {
589 .open = snd_ad1889_capture_open,
590 .close = snd_ad1889_capture_close,
591 .ioctl = snd_pcm_lib_ioctl,
592 .hw_params = snd_ad1889_hw_params,
593 .hw_free = snd_ad1889_hw_free,
594 .prepare = snd_ad1889_capture_prepare,
595 .trigger = snd_ad1889_capture_trigger,
596 .pointer = snd_ad1889_capture_pointer,
597 };
598
599 static irqreturn_t
600 snd_ad1889_interrupt(int irq,
601 void *dev_id,
602 struct pt_regs *regs)
603 {
604 unsigned long st;
605 struct snd_ad1889 *chip = dev_id;
606
607 st = ad1889_readl(chip, AD_DMA_DISR);
608
609 /* clear ISR */
610 ad1889_writel(chip, AD_DMA_DISR, st);
611
612 st &= AD_INTR_MASK;
613
614 if (unlikely(!st))
615 return IRQ_NONE;
616
617 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
618 ad1889_debug("Unexpected master or target abort interrupt!\n");
619
620 if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
621 snd_pcm_period_elapsed(chip->psubs);
622 if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
623 snd_pcm_period_elapsed(chip->csubs);
624
625 return IRQ_HANDLED;
626 }
627
628 static int __devinit
629 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device, struct snd_pcm **rpcm)
630 {
631 int err;
632 struct snd_pcm *pcm;
633
634 if (rpcm)
635 *rpcm = NULL;
636
637 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
638 if (err < 0)
639 return err;
640
641 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
642 &snd_ad1889_playback_ops);
643 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
644 &snd_ad1889_capture_ops);
645
646 pcm->private_data = chip;
647 pcm->info_flags = 0;
648 strcpy(pcm->name, chip->card->shortname);
649
650 chip->pcm = pcm;
651 chip->psubs = NULL;
652 chip->csubs = NULL;
653
654 err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
655 snd_dma_pci_data(chip->pci),
656 BUFFER_BYTES_MAX / 2,
657 BUFFER_BYTES_MAX);
658
659 if (err < 0) {
660 snd_printk(KERN_ERR PFX "buffer allocation error: %d\n", err);
661 return err;
662 }
663
664 if (rpcm)
665 *rpcm = pcm;
666
667 return 0;
668 }
669
670 static void
671 snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
672 {
673 struct snd_ad1889 *chip = entry->private_data;
674 u16 reg;
675 int tmp;
676
677 reg = ad1889_readw(chip, AD_DS_WSMC);
678 snd_iprintf(buffer, "Wave output: %s\n",
679 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
680 snd_iprintf(buffer, "Wave Channels: %s\n",
681 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
682 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
683 (reg & AD_DS_WSMC_WA16) ? 16 : 8);
684
685 /* WARQ is at offset 12 */
686 tmp = (reg & AD_DS_WSMC_WARQ) ?
687 (((reg & AD_DS_WSMC_WARQ >> 12) & 0x01) ? 12 : 18) : 4;
688 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
689
690 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
691 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
692
693
694 snd_iprintf(buffer, "Synthesis output: %s\n",
695 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
696
697 /* SYRQ is at offset 4 */
698 tmp = (reg & AD_DS_WSMC_SYRQ) ?
699 (((reg & AD_DS_WSMC_SYRQ >> 4) & 0x01) ? 12 : 18) : 4;
700 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
701
702 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
703 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
704
705 reg = ad1889_readw(chip, AD_DS_RAMC);
706 snd_iprintf(buffer, "ADC input: %s\n",
707 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
708 snd_iprintf(buffer, "ADC Channels: %s\n",
709 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
710 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
711 (reg & AD_DS_RAMC_AD16) ? 16 : 8);
712
713 /* ACRQ is at offset 4 */
714 tmp = (reg & AD_DS_RAMC_ACRQ) ?
715 (((reg & AD_DS_RAMC_ACRQ >> 4) & 0x01) ? 12 : 18) : 4;
716 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
717
718 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
719 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
720
721 snd_iprintf(buffer, "Resampler input: %s\n",
722 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
723
724 /* RERQ is at offset 12 */
725 tmp = (reg & AD_DS_RAMC_RERQ) ?
726 (((reg & AD_DS_RAMC_RERQ >> 12) & 0x01) ? 12 : 18) : 4;
727 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
728
729 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
730 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
731
732
733 /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
734 suggests that LSB is -3dB, which is more coherent with the logarithmic
735 nature of the dB scale */
736 reg = ad1889_readw(chip, AD_DS_WADA);
737 snd_iprintf(buffer, "Left: %s, -%d dB\n",
738 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
739 ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
740 reg = ad1889_readw(chip, AD_DS_WADA);
741 snd_iprintf(buffer, "Right: %s, -%d dB\n",
742 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
743 ((reg & AD_DS_WADA_RWAA) >> 8) * 3);
744
745 reg = ad1889_readw(chip, AD_DS_WAS);
746 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
747 reg = ad1889_readw(chip, AD_DS_RES);
748 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
749 }
750
751 static void __devinit
752 snd_ad1889_proc_init(struct snd_ad1889 *chip)
753 {
754 struct snd_info_entry *entry;
755
756 if (!snd_card_proc_new(chip->card, chip->card->driver, &entry))
757 snd_info_set_text_ops(entry, chip, 1024, snd_ad1889_proc_read);
758 }
759
760 static struct ac97_quirk ac97_quirks[] = {
761 {
762 .subvendor = 0x11d4, /* AD */
763 .subdevice = 0x1889, /* AD1889 */
764 .codec_id = AC97_ID_AD1819,
765 .name = "AD1889",
766 .type = AC97_TUNE_HP_ONLY
767 },
768 { } /* terminator */
769 };
770
771 static void __devinit
772 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
773 {
774 u16 reg;
775
776 reg = ad1889_readw(chip, AD_AC97_ACIC);
777 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
778 ad1889_writew(chip, AD_AC97_ACIC, reg);
779 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
780 udelay(10);
781 /* Interface Enable */
782 reg |= AD_AC97_ACIC_ACIE;
783 ad1889_writew(chip, AD_AC97_ACIC, reg);
784
785 snd_ad1889_ac97_ready(chip);
786
787 /* Audio Stream Output | Variable Sample Rate Mode */
788 reg = ad1889_readw(chip, AD_AC97_ACIC);
789 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
790 ad1889_writew(chip, AD_AC97_ACIC, reg);
791 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
792
793 }
794
795 static void
796 snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
797 {
798 struct snd_ad1889 *chip = bus->private_data;
799 chip->ac97_bus = NULL;
800 }
801
802 static void
803 snd_ad1889_ac97_free(struct snd_ac97 *ac97)
804 {
805 struct snd_ad1889 *chip = ac97->private_data;
806 chip->ac97 = NULL;
807 }
808
809 static int __devinit
810 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
811 {
812 int err;
813 struct snd_ac97_template ac97;
814 static struct snd_ac97_bus_ops ops = {
815 .write = snd_ad1889_ac97_write,
816 .read = snd_ad1889_ac97_read,
817 };
818
819 /* doing that here, it works. */
820 snd_ad1889_ac97_xinit(chip);
821
822 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
823 if (err < 0)
824 return err;
825
826 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
827
828 memset(&ac97, 0, sizeof(ac97));
829 ac97.private_data = chip;
830 ac97.private_free = snd_ad1889_ac97_free;
831 ac97.pci = chip->pci;
832
833 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
834 if (err < 0)
835 return err;
836
837 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
838
839 return 0;
840 }
841
842 static int
843 snd_ad1889_free(struct snd_ad1889 *chip)
844 {
845 if (chip->irq < 0)
846 goto skip_hw;
847
848 spin_lock_irq(&chip->lock);
849
850 ad1889_mute(chip);
851
852 /* Turn off interrupt on count and zero DMA registers */
853 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
854
855 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
856 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
857 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
858
859 spin_unlock_irq(&chip->lock);
860
861 synchronize_irq(chip->irq);
862
863 if (chip->irq >= 0)
864 free_irq(chip->irq, (void*)chip);
865
866 skip_hw:
867 if (chip->iobase)
868 iounmap(chip->iobase);
869
870 pci_release_regions(chip->pci);
871 pci_disable_device(chip->pci);
872
873 kfree(chip);
874 return 0;
875 }
876
877 static inline int
878 snd_ad1889_dev_free(struct snd_device *device)
879 {
880 struct snd_ad1889 *chip = device->device_data;
881 return snd_ad1889_free(chip);
882 }
883
884 static int __devinit
885 snd_ad1889_init(struct snd_ad1889 *chip)
886 {
887 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
888 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
889
890 mdelay(10);
891
892 /* enable Master and Target abort interrupts */
893 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
894
895 return 0;
896 }
897
898 static int __devinit
899 snd_ad1889_create(struct snd_card *card,
900 struct pci_dev *pci,
901 struct snd_ad1889 **rchip)
902 {
903 int err;
904
905 struct snd_ad1889 *chip;
906 static struct snd_device_ops ops = {
907 .dev_free = snd_ad1889_dev_free,
908 };
909
910 *rchip = NULL;
911
912 if ((err = pci_enable_device(pci)) < 0)
913 return err;
914
915 /* check PCI availability (32bit DMA) */
916 if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0 ||
917 pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK) < 0) {
918 printk(KERN_ERR PFX "error setting 32-bit DMA mask.\n");
919 pci_disable_device(pci);
920 return -ENXIO;
921 }
922
923 /* allocate chip specific data with zero-filled memory */
924 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
925 pci_disable_device(pci);
926 return -ENOMEM;
927 }
928
929 chip->card = card;
930 card->private_data = chip;
931 chip->pci = pci;
932 chip->irq = -1;
933
934 /* (1) PCI resource allocation */
935 if ((err = pci_request_regions(pci, card->driver)) < 0)
936 goto free_and_ret;
937
938 chip->bar = pci_resource_start(pci, 0);
939 chip->iobase = ioremap_nocache(chip->bar, pci_resource_len(pci, 0));
940 if (chip->iobase == NULL) {
941 printk(KERN_ERR PFX "unable to reserve region.\n");
942 err = -EBUSY;
943 goto free_and_ret;
944 }
945
946 pci_set_master(pci);
947
948 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
949
950 if (request_irq(pci->irq, snd_ad1889_interrupt,
951 SA_INTERRUPT|SA_SHIRQ, card->driver, (void*)chip)) {
952 printk(KERN_ERR PFX "cannot obtain IRQ %d\n", pci->irq);
953 snd_ad1889_free(chip);
954 return -EBUSY;
955 }
956
957 chip->irq = pci->irq;
958 synchronize_irq(chip->irq);
959
960 /* (2) initialization of the chip hardware */
961 if ((err = snd_ad1889_init(chip)) < 0) {
962 snd_ad1889_free(chip);
963 return err;
964 }
965
966 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
967 snd_ad1889_free(chip);
968 return err;
969 }
970
971 snd_card_set_dev(card, &pci->dev);
972
973 *rchip = chip;
974
975 return 0;
976
977 free_and_ret:
978 kfree(chip);
979 pci_disable_device(pci);
980
981 return err;
982 }
983
984 static int __devinit
985 snd_ad1889_probe(struct pci_dev *pci,
986 const struct pci_device_id *pci_id)
987 {
988 int err;
989 static int devno;
990 struct snd_card *card;
991 struct snd_ad1889 *chip;
992
993 /* (1) */
994 if (devno >= SNDRV_CARDS)
995 return -ENODEV;
996 if (!enable[devno]) {
997 devno++;
998 return -ENOENT;
999 }
1000
1001 /* (2) */
1002 card = snd_card_new(index[devno], id[devno], THIS_MODULE, 0);
1003 /* XXX REVISIT: we can probably allocate chip in this call */
1004 if (card == NULL)
1005 return -ENOMEM;
1006
1007 strcpy(card->driver, "AD1889");
1008 strcpy(card->shortname, "Analog Devices AD1889");
1009
1010 /* (3) */
1011 err = snd_ad1889_create(card, pci, &chip);
1012 if (err < 0)
1013 goto free_and_ret;
1014
1015 /* (4) */
1016 sprintf(card->longname, "%s at 0x%lx irq %i",
1017 card->shortname, chip->bar, chip->irq);
1018
1019 /* (5) */
1020 /* register AC97 mixer */
1021 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
1022 if (err < 0)
1023 goto free_and_ret;
1024
1025 err = snd_ad1889_pcm_init(chip, 0, NULL);
1026 if (err < 0)
1027 goto free_and_ret;
1028
1029 /* register proc interface */
1030 snd_ad1889_proc_init(chip);
1031
1032 /* (6) */
1033 err = snd_card_register(card);
1034 if (err < 0)
1035 goto free_and_ret;
1036
1037 /* (7) */
1038 pci_set_drvdata(pci, card);
1039
1040 devno++;
1041 return 0;
1042
1043 free_and_ret:
1044 snd_card_free(card);
1045 return err;
1046 }
1047
1048 static void __devexit
1049 snd_ad1889_remove(struct pci_dev *pci)
1050 {
1051 snd_card_free(pci_get_drvdata(pci));
1052 pci_set_drvdata(pci, NULL);
1053 }
1054
1055 static struct pci_device_id snd_ad1889_ids[] = {
1056 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
1057 { 0, },
1058 };
1059 MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
1060
1061 static struct pci_driver ad1889_pci = {
1062 .name = "AD1889 Audio",
1063 .id_table = snd_ad1889_ids,
1064 .probe = snd_ad1889_probe,
1065 .remove = __devexit_p(snd_ad1889_remove),
1066 };
1067
1068 static int __init
1069 alsa_ad1889_init(void)
1070 {
1071 return pci_register_driver(&ad1889_pci);
1072 }
1073
1074 static void __exit
1075 alsa_ad1889_fini(void)
1076 {
1077 pci_unregister_driver(&ad1889_pci);
1078 }
1079
1080 module_init(alsa_ad1889_init);
1081 module_exit(alsa_ad1889_fini);
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