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[ALSA] Optimize for config without PROC_FS (pci drivers)
[deliverable/linux.git] / sound / pci / cs46xx / dsp_spos.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 *
16 */
17
18 /*
19 * 2002-07 Benny Sjostrand benny@hostmobility.com
20 */
21
22
23 #include <sound/driver.h>
24 #include <asm/io.h>
25 #include <linux/delay.h>
26 #include <linux/pci.h>
27 #include <linux/pm.h>
28 #include <linux/init.h>
29 #include <linux/slab.h>
30 #include <linux/vmalloc.h>
31 #include <sound/core.h>
32 #include <sound/control.h>
33 #include <sound/info.h>
34 #include <sound/asoundef.h>
35 #include <sound/cs46xx.h>
36
37 #include "cs46xx_lib.h"
38 #include "dsp_spos.h"
39
40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
41 struct dsp_scb_descriptor * fg_entry);
42
43 static enum wide_opcode wide_opcodes[] = {
44 WIDE_FOR_BEGIN_LOOP,
45 WIDE_FOR_BEGIN_LOOP2,
46 WIDE_COND_GOTO_ADDR,
47 WIDE_COND_GOTO_CALL,
48 WIDE_TBEQ_COND_GOTO_ADDR,
49 WIDE_TBEQ_COND_CALL_ADDR,
50 WIDE_TBEQ_NCOND_GOTO_ADDR,
51 WIDE_TBEQ_NCOND_CALL_ADDR,
52 WIDE_TBEQ_COND_GOTO1_ADDR,
53 WIDE_TBEQ_COND_CALL1_ADDR,
54 WIDE_TBEQ_NCOND_GOTOI_ADDR,
55 WIDE_TBEQ_NCOND_CALL1_ADDR
56 };
57
58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
59 u32 overlay_begin_address)
60 {
61 unsigned int i = 0, j, nreallocated = 0;
62 u32 hival,loval,address;
63 u32 mop_operands,mop_type,wide_op;
64 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
65
66 snd_assert( ((size % 2) == 0), return -EINVAL);
67
68 while (i < size) {
69 loval = data[i++];
70 hival = data[i++];
71
72 if (ins->code.offset > 0) {
73 mop_operands = (hival >> 6) & 0x03fff;
74 mop_type = mop_operands >> 10;
75
76 /* check for wide type instruction */
77 if (mop_type == 0 &&
78 (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
79 (mop_operands & WIDE_INSTR_MASK) != 0) {
80 wide_op = loval & 0x7f;
81 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
82 if (wide_opcodes[j] == wide_op) {
83 /* need to reallocate instruction */
84 address = (hival & 0x00FFF) << 5;
85 address |= loval >> 15;
86
87 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
88
89 if ( !(address & 0x8000) ) {
90 address += (ins->code.offset / 2) - overlay_begin_address;
91 } else {
92 snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
93 }
94
95 hival &= 0xFF000;
96 loval &= 0x07FFF;
97
98 hival |= ( (address >> 5) & 0x00FFF);
99 loval |= ( (address << 15) & 0xF8000);
100
101 address = (hival & 0x00FFF) << 5;
102 address |= loval >> 15;
103
104 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);
105 nreallocated ++;
106 } /* wide_opcodes[j] == wide_op */
107 } /* for */
108 } /* mod_type == 0 ... */
109 } /* ins->code.offset > 0 */
110
111 ins->code.data[ins->code.size++] = loval;
112 ins->code.data[ins->code.size++] = hival;
113 }
114
115 snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
116 return nreallocated;
117 }
118
119 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
120 {
121 int i;
122 for (i = 0;i < module->nsegments; ++i) {
123 if (module->segments[i].segment_type == seg_type) {
124 return (module->segments + i);
125 }
126 }
127
128 return NULL;
129 };
130
131 static int find_free_symbol_index (struct dsp_spos_instance * ins)
132 {
133 int index = ins->symbol_table.nsymbols,i;
134
135 for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
136 if (ins->symbol_table.symbols[i].deleted) {
137 index = i;
138 break;
139 }
140 }
141
142 return index;
143 }
144
145 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
146 {
147 int i;
148 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
149
150 if (module->symbol_table.nsymbols > 0) {
151 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
152 module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
153 module->overlay_begin_address = module->symbol_table.symbols[0].address;
154 }
155 }
156
157 for (i = 0;i < module->symbol_table.nsymbols; ++i) {
158 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
159 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
160 return -ENOMEM;
161 }
162
163
164 if (cs46xx_dsp_lookup_symbol(chip,
165 module->symbol_table.symbols[i].symbol_name,
166 module->symbol_table.symbols[i].symbol_type) == NULL) {
167
168 ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
169 ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
170 ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
171 ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
172
173 if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
174 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
175
176 ins->symbol_table.nsymbols++;
177 } else {
178 /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
179 module->symbol_table.symbols[i].symbol_name); */
180 }
181 }
182
183 return 0;
184 }
185
186 static struct dsp_symbol_entry *
187 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
188 {
189 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
190 struct dsp_symbol_entry * symbol = NULL;
191 int index;
192
193 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
194 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
195 return NULL;
196 }
197
198 if (cs46xx_dsp_lookup_symbol(chip,
199 symbol_name,
200 type) != NULL) {
201 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
202 return NULL;
203 }
204
205 index = find_free_symbol_index (ins);
206
207 strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
208 ins->symbol_table.symbols[index].address = address;
209 ins->symbol_table.symbols[index].symbol_type = type;
210 ins->symbol_table.symbols[index].module = NULL;
211 ins->symbol_table.symbols[index].deleted = 0;
212 symbol = (ins->symbol_table.symbols + index);
213
214 if (index > ins->symbol_table.highest_frag_index)
215 ins->symbol_table.highest_frag_index = index;
216
217 if (index == ins->symbol_table.nsymbols)
218 ins->symbol_table.nsymbols++; /* no frag. in list */
219
220 return symbol;
221 }
222
223 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
224 {
225 struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
226
227 if (ins == NULL)
228 return NULL;
229
230 /* better to use vmalloc for this big table */
231 ins->symbol_table.nsymbols = 0;
232 ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
233 DSP_MAX_SYMBOLS);
234 ins->symbol_table.highest_frag_index = 0;
235
236 if (ins->symbol_table.symbols == NULL) {
237 cs46xx_dsp_spos_destroy(chip);
238 return NULL;
239 }
240
241 ins->code.offset = 0;
242 ins->code.size = 0;
243 ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
244
245 if (ins->code.data == NULL) {
246 cs46xx_dsp_spos_destroy(chip);
247 return NULL;
248 }
249
250 ins->nscb = 0;
251 ins->ntask = 0;
252
253 ins->nmodules = 0;
254 ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
255
256 if (ins->modules == NULL) {
257 cs46xx_dsp_spos_destroy(chip);
258 return NULL;
259 }
260
261 /* default SPDIF input sample rate
262 to 48000 khz */
263 ins->spdif_in_sample_rate = 48000;
264
265 /* maximize volume */
266 ins->dac_volume_right = 0x8000;
267 ins->dac_volume_left = 0x8000;
268 ins->spdif_input_volume_right = 0x8000;
269 ins->spdif_input_volume_left = 0x8000;
270
271 /* set left and right validity bits and
272 default channel status */
273 ins->spdif_csuv_default =
274 ins->spdif_csuv_stream =
275 /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) |
276 /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
277 /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
278 /* left and right validity bits */ (1 << 13) | (1 << 12);
279
280 return ins;
281 }
282
283 void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
284 {
285 int i;
286 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
287
288 snd_assert(ins != NULL, return);
289
290 down(&chip->spos_mutex);
291 for (i = 0; i < ins->nscb; ++i) {
292 if (ins->scbs[i].deleted) continue;
293
294 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
295 }
296
297 kfree(ins->code.data);
298 vfree(ins->symbol_table.symbols);
299 kfree(ins->modules);
300 kfree(ins);
301 up(&chip->spos_mutex);
302 }
303
304 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
305 {
306 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
307 struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
308 struct dsp_segment_desc * parameter = get_segment_desc (module,SEGTYPE_SP_PARAMETER);
309 struct dsp_segment_desc * sample = get_segment_desc (module,SEGTYPE_SP_SAMPLE);
310 u32 doffset, dsize;
311
312 if (ins->nmodules == DSP_MAX_MODULES - 1) {
313 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
314 return -ENOMEM;
315 }
316
317 snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
318
319 if (ins->nmodules == 0) {
320 snd_printdd("dsp_spos: clearing parameter area\n");
321 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
322 }
323
324 if (parameter == NULL) {
325 snd_printdd("dsp_spos: module got no parameter segment\n");
326 } else {
327 if (ins->nmodules > 0) {
328 snd_printk(KERN_WARNING "dsp_spos: WARNING current parameter data may be overwriten!\n");
329 }
330
331 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
332 dsize = parameter->size * 4;
333
334 snd_printdd("dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
335 doffset,doffset + dsize);
336
337 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
338 snd_printk(KERN_ERR "dsp_spos: failed to download parameter data to DSP\n");
339 return -EINVAL;
340 }
341 }
342
343 if (ins->nmodules == 0) {
344 snd_printdd("dsp_spos: clearing sample area\n");
345 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
346 }
347
348 if (sample == NULL) {
349 snd_printdd("dsp_spos: module got no sample segment\n");
350 } else {
351 if (ins->nmodules > 0) {
352 snd_printk(KERN_WARNING "dsp_spos: WARNING current sample data may be overwriten\n");
353 }
354
355 doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET);
356 dsize = sample->size * 4;
357
358 snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
359 doffset,doffset + dsize);
360
361 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
362 snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
363 return -EINVAL;
364 }
365 }
366
367
368 if (ins->nmodules == 0) {
369 snd_printdd("dsp_spos: clearing code area\n");
370 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
371 }
372
373 if (code == NULL) {
374 snd_printdd("dsp_spos: module got no code segment\n");
375 } else {
376 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
377 snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
378 return -ENOMEM;
379 }
380
381 module->load_address = ins->code.offset;
382 module->overlay_begin_address = 0x000;
383
384 /* if module has a code segment it must have
385 symbol table */
386 snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM);
387 if (add_symbols(chip,module)) {
388 snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
389 return -ENOMEM;
390 }
391
392 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
393 dsize = code->size * 4;
394 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
395 doffset,doffset + dsize);
396
397 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
398
399 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
400 snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
401 return -EINVAL;
402 }
403
404 ins->code.offset += code->size;
405 }
406
407 /* NOTE: module segments and symbol table must be
408 statically allocated. Case that module data is
409 not generated by the ospparser */
410 ins->modules[ins->nmodules] = *module;
411 ins->nmodules++;
412
413 return 0;
414 }
415
416 struct dsp_symbol_entry *
417 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
418 {
419 int i;
420 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
421
422 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
423
424 if (ins->symbol_table.symbols[i].deleted)
425 continue;
426
427 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
428 ins->symbol_table.symbols[i].symbol_type == symbol_type) {
429 return (ins->symbol_table.symbols + i);
430 }
431 }
432
433 #if 0
434 printk ("dsp_spos: symbol <%s> type %02x not found\n",
435 symbol_name,symbol_type);
436 #endif
437
438 return NULL;
439 }
440
441
442 #ifdef CONFIG_PROC_FS
443 static struct dsp_symbol_entry *
444 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
445 {
446 int i;
447 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
448
449 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
450
451 if (ins->symbol_table.symbols[i].deleted)
452 continue;
453
454 if (ins->symbol_table.symbols[i].address == address &&
455 ins->symbol_table.symbols[i].symbol_type == symbol_type) {
456 return (ins->symbol_table.symbols + i);
457 }
458 }
459
460
461 return NULL;
462 }
463
464
465 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
466 struct snd_info_buffer *buffer)
467 {
468 struct snd_cs46xx *chip = entry->private_data;
469 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
470 int i;
471
472 snd_iprintf(buffer, "SYMBOLS:\n");
473 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
474 char *module_str = "system";
475
476 if (ins->symbol_table.symbols[i].deleted)
477 continue;
478
479 if (ins->symbol_table.symbols[i].module != NULL) {
480 module_str = ins->symbol_table.symbols[i].module->module_name;
481 }
482
483
484 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
485 ins->symbol_table.symbols[i].address,
486 ins->symbol_table.symbols[i].symbol_type,
487 ins->symbol_table.symbols[i].symbol_name,
488 module_str);
489 }
490 }
491
492
493 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
494 struct snd_info_buffer *buffer)
495 {
496 struct snd_cs46xx *chip = entry->private_data;
497 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
498 int i,j;
499
500 down(&chip->spos_mutex);
501 snd_iprintf(buffer, "MODULES:\n");
502 for ( i = 0; i < ins->nmodules; ++i ) {
503 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
504 snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols);
505 snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups);
506
507 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
508 struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
509 snd_iprintf(buffer, " segment %02x offset %08x size %08x\n",
510 desc->segment_type,desc->offset, desc->size);
511 }
512 }
513 up(&chip->spos_mutex);
514 }
515
516 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
517 struct snd_info_buffer *buffer)
518 {
519 struct snd_cs46xx *chip = entry->private_data;
520 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
521 int i, j, col;
522 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
523
524 down(&chip->spos_mutex);
525 snd_iprintf(buffer, "TASK TREES:\n");
526 for ( i = 0; i < ins->ntask; ++i) {
527 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
528
529 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
530 u32 val;
531 if (col == 4) {
532 snd_iprintf(buffer,"\n");
533 col = 0;
534 }
535 val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
536 snd_iprintf(buffer,"%08x ",val);
537 }
538 }
539
540 snd_iprintf(buffer,"\n");
541 up(&chip->spos_mutex);
542 }
543
544 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
545 struct snd_info_buffer *buffer)
546 {
547 struct snd_cs46xx *chip = entry->private_data;
548 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
549 int i;
550
551 down(&chip->spos_mutex);
552 snd_iprintf(buffer, "SCB's:\n");
553 for ( i = 0; i < ins->nscb; ++i) {
554 if (ins->scbs[i].deleted)
555 continue;
556 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
557
558 if (ins->scbs[i].parent_scb_ptr != NULL) {
559 snd_iprintf(buffer,"parent [%s:%04x] ",
560 ins->scbs[i].parent_scb_ptr->scb_name,
561 ins->scbs[i].parent_scb_ptr->address);
562 } else snd_iprintf(buffer,"parent [none] ");
563
564 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n",
565 ins->scbs[i].sub_list_ptr->scb_name,
566 ins->scbs[i].sub_list_ptr->address,
567 ins->scbs[i].next_scb_ptr->scb_name,
568 ins->scbs[i].next_scb_ptr->address,
569 ins->scbs[i].task_entry->symbol_name,
570 ins->scbs[i].task_entry->address);
571 }
572
573 snd_iprintf(buffer,"\n");
574 up(&chip->spos_mutex);
575 }
576
577 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
578 struct snd_info_buffer *buffer)
579 {
580 struct snd_cs46xx *chip = entry->private_data;
581 /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
582 unsigned int i, col = 0;
583 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
584 struct dsp_symbol_entry * symbol;
585
586 for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
587 if (col == 4) {
588 snd_iprintf(buffer,"\n");
589 col = 0;
590 }
591
592 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
593 col = 0;
594 snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
595 }
596
597 if (col == 0) {
598 snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
599 }
600
601 snd_iprintf(buffer,"%08X ",readl(dst + i));
602 }
603 }
604
605 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
606 struct snd_info_buffer *buffer)
607 {
608 struct snd_cs46xx *chip = entry->private_data;
609 int i,col = 0;
610 void __iomem *dst = chip->region.idx[2].remap_addr;
611
612 snd_iprintf(buffer,"PCMREADER:\n");
613 for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
614 if (col == 4) {
615 snd_iprintf(buffer,"\n");
616 col = 0;
617 }
618
619 if (col == 0) {
620 snd_iprintf(buffer, "%04X ",i);
621 }
622
623 snd_iprintf(buffer,"%08X ",readl(dst + i));
624 }
625
626 snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
627
628 col = 0;
629 for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
630 if (col == 4) {
631 snd_iprintf(buffer,"\n");
632 col = 0;
633 }
634
635 if (col == 0) {
636 snd_iprintf(buffer, "%04X ",i);
637 }
638
639 snd_iprintf(buffer,"%08X ",readl(dst + i));
640 }
641
642 snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
643 col = 0;
644 for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
645 if (col == 4) {
646 snd_iprintf(buffer,"\n");
647 col = 0;
648 }
649
650 if (col == 0) {
651 snd_iprintf(buffer, "%04X ",i);
652 }
653
654 snd_iprintf(buffer,"%08X ",readl(dst + i));
655 }
656
657
658 snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
659 col = 0;
660 for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
661 if (col == 4) {
662 snd_iprintf(buffer,"\n");
663 col = 0;
664 }
665
666 if (col == 0) {
667 snd_iprintf(buffer, "%04X ",i);
668 }
669
670 snd_iprintf(buffer,"%08X ",readl(dst + i));
671 }
672
673 snd_iprintf(buffer,"\n...\n");
674 col = 0;
675
676 for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
677 if (col == 4) {
678 snd_iprintf(buffer,"\n");
679 col = 0;
680 }
681
682 if (col == 0) {
683 snd_iprintf(buffer, "%04X ",i);
684 }
685
686 snd_iprintf(buffer,"%08X ",readl(dst + i));
687 }
688
689
690 snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
691 col = 0;
692 for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
693 if (col == 4) {
694 snd_iprintf(buffer,"\n");
695 col = 0;
696 }
697
698 if (col == 0) {
699 snd_iprintf(buffer, "%04X ",i);
700 }
701
702 snd_iprintf(buffer,"%08X ",readl(dst + i));
703 }
704
705 snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
706 col = 0;
707 for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
708 if (col == 4) {
709 snd_iprintf(buffer,"\n");
710 col = 0;
711 }
712
713 if (col == 0) {
714 snd_iprintf(buffer, "%04X ",i);
715 }
716
717 snd_iprintf(buffer,"%08X ",readl(dst + i));
718 }
719 #if 0
720 snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
721 col = 0;
722 for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
723 if (col == 4) {
724 snd_iprintf(buffer,"\n");
725 col = 0;
726 }
727
728 if (col == 0) {
729 snd_iprintf(buffer, "%04X ",i);
730 }
731
732 snd_iprintf(buffer,"%08X ",readl(dst + i));
733 }
734 #endif
735
736 snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
737 col = 0;
738 for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
739 if (col == 4) {
740 snd_iprintf(buffer,"\n");
741 col = 0;
742 }
743
744 if (col == 0) {
745 snd_iprintf(buffer, "%04X ",i);
746 }
747
748 snd_iprintf(buffer,"%08X ",readl(dst + i));
749 }
750 snd_iprintf(buffer,"\n");
751 }
752
753 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
754 {
755 struct snd_info_entry *entry;
756 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
757 int i;
758
759 ins->snd_card = card;
760
761 if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
762 entry->content = SNDRV_INFO_CONTENT_TEXT;
763 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
764 entry->c.text.read_size = 512;
765
766 if (snd_info_register(entry) < 0) {
767 snd_info_free_entry(entry);
768 entry = NULL;
769 }
770 }
771
772 ins->proc_dsp_dir = entry;
773
774 if (!ins->proc_dsp_dir)
775 return -ENOMEM;
776
777 if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
778 entry->content = SNDRV_INFO_CONTENT_TEXT;
779 entry->private_data = chip;
780 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
781 entry->c.text.read_size = 512;
782 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
783 if (snd_info_register(entry) < 0) {
784 snd_info_free_entry(entry);
785 entry = NULL;
786 }
787 }
788 ins->proc_sym_info_entry = entry;
789
790 if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
791 entry->content = SNDRV_INFO_CONTENT_TEXT;
792 entry->private_data = chip;
793 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
794 entry->c.text.read_size = 512;
795 entry->c.text.read = cs46xx_dsp_proc_modules_read;
796 if (snd_info_register(entry) < 0) {
797 snd_info_free_entry(entry);
798 entry = NULL;
799 }
800 }
801 ins->proc_modules_info_entry = entry;
802
803 if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
804 entry->content = SNDRV_INFO_CONTENT_TEXT;
805 entry->private_data = chip;
806 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
807 entry->c.text.read_size = 512;
808 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
809 if (snd_info_register(entry) < 0) {
810 snd_info_free_entry(entry);
811 entry = NULL;
812 }
813 }
814 ins->proc_parameter_dump_info_entry = entry;
815
816 if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
817 entry->content = SNDRV_INFO_CONTENT_TEXT;
818 entry->private_data = chip;
819 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
820 entry->c.text.read_size = 512;
821 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
822 if (snd_info_register(entry) < 0) {
823 snd_info_free_entry(entry);
824 entry = NULL;
825 }
826 }
827 ins->proc_sample_dump_info_entry = entry;
828
829 if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
830 entry->content = SNDRV_INFO_CONTENT_TEXT;
831 entry->private_data = chip;
832 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
833 entry->c.text.read_size = 512;
834 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
835 if (snd_info_register(entry) < 0) {
836 snd_info_free_entry(entry);
837 entry = NULL;
838 }
839 }
840 ins->proc_task_info_entry = entry;
841
842 if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
843 entry->content = SNDRV_INFO_CONTENT_TEXT;
844 entry->private_data = chip;
845 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
846 entry->c.text.read_size = 1024;
847 entry->c.text.read = cs46xx_dsp_proc_scb_read;
848 if (snd_info_register(entry) < 0) {
849 snd_info_free_entry(entry);
850 entry = NULL;
851 }
852 }
853 ins->proc_scb_info_entry = entry;
854
855 down(&chip->spos_mutex);
856 /* register/update SCB's entries on proc */
857 for (i = 0; i < ins->nscb; ++i) {
858 if (ins->scbs[i].deleted) continue;
859
860 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
861 }
862 up(&chip->spos_mutex);
863
864 return 0;
865 }
866
867 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
868 {
869 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
870 int i;
871
872 if (ins->proc_sym_info_entry) {
873 snd_info_unregister(ins->proc_sym_info_entry);
874 ins->proc_sym_info_entry = NULL;
875 }
876
877 if (ins->proc_modules_info_entry) {
878 snd_info_unregister(ins->proc_modules_info_entry);
879 ins->proc_modules_info_entry = NULL;
880 }
881
882 if (ins->proc_parameter_dump_info_entry) {
883 snd_info_unregister(ins->proc_parameter_dump_info_entry);
884 ins->proc_parameter_dump_info_entry = NULL;
885 }
886
887 if (ins->proc_sample_dump_info_entry) {
888 snd_info_unregister(ins->proc_sample_dump_info_entry);
889 ins->proc_sample_dump_info_entry = NULL;
890 }
891
892 if (ins->proc_scb_info_entry) {
893 snd_info_unregister(ins->proc_scb_info_entry);
894 ins->proc_scb_info_entry = NULL;
895 }
896
897 if (ins->proc_task_info_entry) {
898 snd_info_unregister(ins->proc_task_info_entry);
899 ins->proc_task_info_entry = NULL;
900 }
901
902 down(&chip->spos_mutex);
903 for (i = 0; i < ins->nscb; ++i) {
904 if (ins->scbs[i].deleted) continue;
905 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
906 }
907 up(&chip->spos_mutex);
908
909 if (ins->proc_dsp_dir) {
910 snd_info_unregister (ins->proc_dsp_dir);
911 ins->proc_dsp_dir = NULL;
912 }
913
914 return 0;
915 }
916 #endif /* CONFIG_PROC_FS */
917
918 static int debug_tree;
919 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
920 u32 dest, int size)
921 {
922 void __iomem *spdst = chip->region.idx[1].remap_addr +
923 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
924 int i;
925
926 for (i = 0; i < size; ++i) {
927 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
928 writel(task_data[i],spdst);
929 spdst += sizeof(u32);
930 }
931 }
932
933 static int debug_scb;
934 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
935 {
936 void __iomem *spdst = chip->region.idx[1].remap_addr +
937 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
938 int i;
939
940 for (i = 0; i < 0x10; ++i) {
941 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
942 writel(scb_data[i],spdst);
943 spdst += sizeof(u32);
944 }
945 }
946
947 static int find_free_scb_index (struct dsp_spos_instance * ins)
948 {
949 int index = ins->nscb, i;
950
951 for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
952 if (ins->scbs[i].deleted) {
953 index = i;
954 break;
955 }
956 }
957
958 return index;
959 }
960
961 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
962 {
963 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
964 struct dsp_scb_descriptor * desc = NULL;
965 int index;
966
967 if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
968 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
969 return NULL;
970 }
971
972 index = find_free_scb_index (ins);
973
974 strcpy(ins->scbs[index].scb_name, name);
975 ins->scbs[index].address = dest;
976 ins->scbs[index].index = index;
977 ins->scbs[index].proc_info = NULL;
978 ins->scbs[index].ref_count = 1;
979 ins->scbs[index].deleted = 0;
980 spin_lock_init(&ins->scbs[index].lock);
981
982 desc = (ins->scbs + index);
983 ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
984
985 if (index > ins->scb_highest_frag_index)
986 ins->scb_highest_frag_index = index;
987
988 if (index == ins->nscb)
989 ins->nscb++;
990
991 return desc;
992 }
993
994 static struct dsp_task_descriptor *
995 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
996 {
997 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
998 struct dsp_task_descriptor * desc = NULL;
999
1000 if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
1001 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
1002 return NULL;
1003 }
1004
1005 strcpy(ins->tasks[ins->ntask].task_name,name);
1006 ins->tasks[ins->ntask].address = dest;
1007 ins->tasks[ins->ntask].size = size;
1008
1009 /* quick find in list */
1010 ins->tasks[ins->ntask].index = ins->ntask;
1011 desc = (ins->tasks + ins->ntask);
1012 ins->ntask++;
1013
1014 add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1015 return desc;
1016 }
1017
1018 struct dsp_scb_descriptor *
1019 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1020 {
1021 struct dsp_scb_descriptor * desc;
1022
1023 desc = _map_scb (chip,name,dest);
1024 if (desc) {
1025 _dsp_create_scb(chip,scb_data,dest);
1026 } else {
1027 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
1028 }
1029
1030 return desc;
1031 }
1032
1033
1034 static struct dsp_task_descriptor *
1035 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1036 u32 dest, int size)
1037 {
1038 struct dsp_task_descriptor * desc;
1039
1040 desc = _map_task_tree (chip,name,dest,size);
1041 if (desc) {
1042 _dsp_create_task_tree(chip,task_data,dest,size);
1043 } else {
1044 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
1045 }
1046
1047 return desc;
1048 }
1049
1050 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1051 {
1052 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1053 struct dsp_symbol_entry * fg_task_tree_header_code;
1054 struct dsp_symbol_entry * task_tree_header_code;
1055 struct dsp_symbol_entry * task_tree_thread;
1056 struct dsp_symbol_entry * null_algorithm;
1057 struct dsp_symbol_entry * magic_snoop_task;
1058
1059 struct dsp_scb_descriptor * timing_master_scb;
1060 struct dsp_scb_descriptor * codec_out_scb;
1061 struct dsp_scb_descriptor * codec_in_scb;
1062 struct dsp_scb_descriptor * src_task_scb;
1063 struct dsp_scb_descriptor * master_mix_scb;
1064 struct dsp_scb_descriptor * rear_mix_scb;
1065 struct dsp_scb_descriptor * record_mix_scb;
1066 struct dsp_scb_descriptor * write_back_scb;
1067 struct dsp_scb_descriptor * vari_decimate_scb;
1068 struct dsp_scb_descriptor * rear_codec_out_scb;
1069 struct dsp_scb_descriptor * clfe_codec_out_scb;
1070 struct dsp_scb_descriptor * magic_snoop_scb;
1071
1072 int fifo_addr, fifo_span, valid_slots;
1073
1074 static struct dsp_spos_control_block sposcb = {
1075 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1076 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1077 /* 2 */ DSP_SPOS_DC,0,
1078 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1079 /* 4 */ 0,0,
1080 /* 5 */ DSP_SPOS_UU,0,
1081 /* 6 */ FG_TASK_HEADER_ADDR,0,
1082 /* 7 */ 0,0,
1083 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1084 /* 9 */ 0,
1085 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1086 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1087 /* C */ DSP_SPOS_DC_DC,
1088 /* D */ DSP_SPOS_DC_DC,
1089 /* E */ DSP_SPOS_DC_DC,
1090 /* F */ DSP_SPOS_DC_DC
1091 };
1092
1093 cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1094
1095 null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1096 if (null_algorithm == NULL) {
1097 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
1098 return -EIO;
1099 }
1100
1101 fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1102 if (fg_task_tree_header_code == NULL) {
1103 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1104 return -EIO;
1105 }
1106
1107 task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1108 if (task_tree_header_code == NULL) {
1109 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1110 return -EIO;
1111 }
1112
1113 task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1114 if (task_tree_thread == NULL) {
1115 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
1116 return -EIO;
1117 }
1118
1119 magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1120 if (magic_snoop_task == NULL) {
1121 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1122 return -EIO;
1123 }
1124
1125 {
1126 /* create the null SCB */
1127 static struct dsp_generic_scb null_scb = {
1128 { 0, 0, 0, 0 },
1129 { 0, 0, 0, 0, 0 },
1130 NULL_SCB_ADDR, NULL_SCB_ADDR,
1131 0, 0, 0, 0, 0,
1132 {
1133 0,0,
1134 0,0,
1135 }
1136 };
1137
1138 null_scb.entry_point = null_algorithm->address;
1139 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1140 ins->the_null_scb->task_entry = null_algorithm;
1141 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1142 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1143 ins->the_null_scb->parent_scb_ptr = NULL;
1144 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1145 }
1146
1147 {
1148 /* setup foreground task tree */
1149 static struct dsp_task_tree_control_block fg_task_tree_hdr = {
1150 { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1151 DSP_SPOS_DC_DC,
1152 DSP_SPOS_DC_DC,
1153 0x0000,DSP_SPOS_DC,
1154 DSP_SPOS_DC, DSP_SPOS_DC,
1155 DSP_SPOS_DC_DC,
1156 DSP_SPOS_DC_DC,
1157 DSP_SPOS_DC_DC,
1158 DSP_SPOS_DC,DSP_SPOS_DC },
1159
1160 {
1161 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1162 0,
1163 FG_TASK_HEADER_ADDR + TCBData,
1164 },
1165
1166 {
1167 4,0,
1168 1,0,
1169 2,SPOSCB_ADDR + HFGFlags,
1170 0,0,
1171 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1172 },
1173
1174 {
1175 DSP_SPOS_DC,0,
1176 DSP_SPOS_DC,DSP_SPOS_DC,
1177 DSP_SPOS_DC,DSP_SPOS_DC,
1178 DSP_SPOS_DC,DSP_SPOS_DC,
1179 DSP_SPOS_DC,DSP_SPOS_DC,
1180 DSP_SPOS_DCDC,
1181 DSP_SPOS_UU,1,
1182 DSP_SPOS_DCDC,
1183 DSP_SPOS_DCDC,
1184 DSP_SPOS_DCDC,
1185 DSP_SPOS_DCDC,
1186 DSP_SPOS_DCDC,
1187 DSP_SPOS_DCDC,
1188 DSP_SPOS_DCDC,
1189 DSP_SPOS_DCDC,
1190 DSP_SPOS_DCDC,
1191 DSP_SPOS_DCDC,
1192 DSP_SPOS_DCDC,
1193 DSP_SPOS_DCDC,
1194 DSP_SPOS_DCDC,
1195 DSP_SPOS_DCDC,
1196 DSP_SPOS_DCDC,
1197 DSP_SPOS_DCDC,
1198 DSP_SPOS_DCDC,
1199 DSP_SPOS_DCDC,
1200 DSP_SPOS_DCDC,
1201 DSP_SPOS_DCDC,
1202 DSP_SPOS_DCDC,
1203 DSP_SPOS_DCDC,
1204 DSP_SPOS_DCDC,
1205 DSP_SPOS_DCDC,
1206 DSP_SPOS_DCDC,
1207 DSP_SPOS_DCDC,
1208 DSP_SPOS_DCDC,
1209 DSP_SPOS_DCDC
1210 },
1211 {
1212 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1213 0,0
1214 }
1215 };
1216
1217 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1218 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1219 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1220 }
1221
1222
1223 {
1224 /* setup foreground task tree */
1225 static struct dsp_task_tree_control_block bg_task_tree_hdr = {
1226 { DSP_SPOS_DC_DC,
1227 DSP_SPOS_DC_DC,
1228 DSP_SPOS_DC_DC,
1229 DSP_SPOS_DC, DSP_SPOS_DC,
1230 DSP_SPOS_DC, DSP_SPOS_DC,
1231 DSP_SPOS_DC_DC,
1232 DSP_SPOS_DC_DC,
1233 DSP_SPOS_DC_DC,
1234 DSP_SPOS_DC,DSP_SPOS_DC },
1235
1236 {
1237 NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */
1238 0,
1239 BG_TREE_SCB_ADDR + TCBData,
1240 },
1241
1242 {
1243 9999,0,
1244 0,1,
1245 0,SPOSCB_ADDR + HFGFlags,
1246 0,0,
1247 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1248 },
1249
1250 {
1251 DSP_SPOS_DC,0,
1252 DSP_SPOS_DC,DSP_SPOS_DC,
1253 DSP_SPOS_DC,DSP_SPOS_DC,
1254 DSP_SPOS_DC,DSP_SPOS_DC,
1255 DSP_SPOS_DC,DSP_SPOS_DC,
1256 DSP_SPOS_DCDC,
1257 DSP_SPOS_UU,1,
1258 DSP_SPOS_DCDC,
1259 DSP_SPOS_DCDC,
1260 DSP_SPOS_DCDC,
1261 DSP_SPOS_DCDC,
1262 DSP_SPOS_DCDC,
1263 DSP_SPOS_DCDC,
1264 DSP_SPOS_DCDC,
1265 DSP_SPOS_DCDC,
1266 DSP_SPOS_DCDC,
1267 DSP_SPOS_DCDC,
1268 DSP_SPOS_DCDC,
1269 DSP_SPOS_DCDC,
1270 DSP_SPOS_DCDC,
1271 DSP_SPOS_DCDC,
1272 DSP_SPOS_DCDC,
1273 DSP_SPOS_DCDC,
1274 DSP_SPOS_DCDC,
1275 DSP_SPOS_DCDC,
1276 DSP_SPOS_DCDC,
1277 DSP_SPOS_DCDC,
1278 DSP_SPOS_DCDC,
1279 DSP_SPOS_DCDC,
1280 DSP_SPOS_DCDC,
1281 DSP_SPOS_DCDC,
1282 DSP_SPOS_DCDC,
1283 DSP_SPOS_DCDC,
1284 DSP_SPOS_DCDC,
1285 DSP_SPOS_DCDC
1286 },
1287 {
1288 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1289 0,0
1290 }
1291 };
1292
1293 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1294 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1295 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1296 }
1297
1298 /* create timing master SCB */
1299 timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1300
1301 /* create the CODEC output task */
1302 codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1303 MASTERMIX_SCB_ADDR,
1304 CODECOUT_SCB_ADDR,timing_master_scb,
1305 SCB_ON_PARENT_SUBLIST_SCB);
1306
1307 if (!codec_out_scb) goto _fail_end;
1308 /* create the master mix SCB */
1309 master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1310 MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1311 codec_out_scb,
1312 SCB_ON_PARENT_SUBLIST_SCB);
1313 ins->master_mix_scb = master_mix_scb;
1314
1315 if (!master_mix_scb) goto _fail_end;
1316
1317 /* create codec in */
1318 codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1319 CODEC_INPUT_BUF1,
1320 CODECIN_SCB_ADDR,codec_out_scb,
1321 SCB_ON_PARENT_NEXT_SCB);
1322 if (!codec_in_scb) goto _fail_end;
1323 ins->codec_in_scb = codec_in_scb;
1324
1325 /* create write back scb */
1326 write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1327 WRITE_BACK_BUF1,WRITE_BACK_SPB,
1328 WRITEBACK_SCB_ADDR,
1329 timing_master_scb,
1330 SCB_ON_PARENT_NEXT_SCB);
1331 if (!write_back_scb) goto _fail_end;
1332
1333 {
1334 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1335 0x00020000,
1336 0x0000ffff
1337 };
1338
1339 /* dirty hack ... */
1340 _dsp_create_task_tree (chip,(u32 *)&mix2_ostream_spb,WRITE_BACK_SPB,2);
1341 }
1342
1343 /* input sample converter */
1344 vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1345 VARI_DECIMATE_BUF0,
1346 VARI_DECIMATE_BUF1,
1347 VARIDECIMATE_SCB_ADDR,
1348 write_back_scb,
1349 SCB_ON_PARENT_SUBLIST_SCB);
1350 if (!vari_decimate_scb) goto _fail_end;
1351
1352 /* create the record mixer SCB */
1353 record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1354 MIX_SAMPLE_BUF2,
1355 RECORD_MIXER_SCB_ADDR,
1356 vari_decimate_scb,
1357 SCB_ON_PARENT_SUBLIST_SCB);
1358 ins->record_mixer_scb = record_mix_scb;
1359
1360 if (!record_mix_scb) goto _fail_end;
1361
1362 valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1363
1364 snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2);
1365
1366 if (chip->nr_ac97_codecs == 1) {
1367 /* output on slot 5 and 11
1368 on primary CODEC */
1369 fifo_addr = 0x20;
1370 fifo_span = 0x60;
1371
1372 /* enable slot 5 and 11 */
1373 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1374 } else {
1375 /* output on slot 7 and 8
1376 on secondary CODEC */
1377 fifo_addr = 0x40;
1378 fifo_span = 0x10;
1379
1380 /* enable slot 7 and 8 */
1381 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1382 }
1383 /* create CODEC tasklet for rear speakers output*/
1384 rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1385 REAR_MIXER_SCB_ADDR,
1386 REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1387 SCB_ON_PARENT_NEXT_SCB);
1388 if (!rear_codec_out_scb) goto _fail_end;
1389
1390
1391 /* create the rear PCM channel mixer SCB */
1392 rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1393 MIX_SAMPLE_BUF3,
1394 REAR_MIXER_SCB_ADDR,
1395 rear_codec_out_scb,
1396 SCB_ON_PARENT_SUBLIST_SCB);
1397 ins->rear_mix_scb = rear_mix_scb;
1398 if (!rear_mix_scb) goto _fail_end;
1399
1400 if (chip->nr_ac97_codecs == 2) {
1401 /* create CODEC tasklet for rear Center/LFE output
1402 slot 6 and 9 on seconadry CODEC */
1403 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1404 CLFE_MIXER_SCB_ADDR,
1405 CLFE_CODEC_SCB_ADDR,
1406 rear_codec_out_scb,
1407 SCB_ON_PARENT_NEXT_SCB);
1408 if (!clfe_codec_out_scb) goto _fail_end;
1409
1410
1411 /* create the rear PCM channel mixer SCB */
1412 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1413 MIX_SAMPLE_BUF4,
1414 CLFE_MIXER_SCB_ADDR,
1415 clfe_codec_out_scb,
1416 SCB_ON_PARENT_SUBLIST_SCB);
1417 if (!ins->center_lfe_mix_scb) goto _fail_end;
1418
1419 /* enable slot 6 and 9 */
1420 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1421 } else {
1422 clfe_codec_out_scb = rear_codec_out_scb;
1423 ins->center_lfe_mix_scb = rear_mix_scb;
1424 }
1425
1426 /* enable slots depending on CODEC configuration */
1427 snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1428
1429 /* the magic snooper */
1430 magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1431 OUTPUT_SNOOP_BUFFER,
1432 codec_out_scb,
1433 clfe_codec_out_scb,
1434 SCB_ON_PARENT_NEXT_SCB);
1435
1436
1437 if (!magic_snoop_scb) goto _fail_end;
1438 ins->ref_snoop_scb = magic_snoop_scb;
1439
1440 /* SP IO access */
1441 if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1442 magic_snoop_scb,
1443 SCB_ON_PARENT_NEXT_SCB))
1444 goto _fail_end;
1445
1446 /* SPDIF input sampel rate converter */
1447 src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1448 ins->spdif_in_sample_rate,
1449 SRC_OUTPUT_BUF1,
1450 SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1451 master_mix_scb,
1452 SCB_ON_PARENT_SUBLIST_SCB,1);
1453
1454 if (!src_task_scb) goto _fail_end;
1455 cs46xx_src_unlink(chip,src_task_scb);
1456
1457 /* NOTE: when we now how to detect the SPDIF input
1458 sample rate we will use this SRC to adjust it */
1459 ins->spdif_in_src = src_task_scb;
1460
1461 cs46xx_dsp_async_init(chip,timing_master_scb);
1462 return 0;
1463
1464 _fail_end:
1465 snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
1466 return -EINVAL;
1467 }
1468
1469 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1470 struct dsp_scb_descriptor * fg_entry)
1471 {
1472 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1473 struct dsp_symbol_entry * s16_async_codec_input_task;
1474 struct dsp_symbol_entry * spdifo_task;
1475 struct dsp_symbol_entry * spdifi_task;
1476 struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1477
1478 s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1479 if (s16_async_codec_input_task == NULL) {
1480 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1481 return -EIO;
1482 }
1483 spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1484 if (spdifo_task == NULL) {
1485 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
1486 return -EIO;
1487 }
1488
1489 spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1490 if (spdifi_task == NULL) {
1491 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
1492 return -EIO;
1493 }
1494
1495 {
1496 /* 0xBC0 */
1497 struct dsp_spdifoscb spdifo_scb = {
1498 /* 0 */ DSP_SPOS_UUUU,
1499 {
1500 /* 1 */ 0xb0,
1501 /* 2 */ 0,
1502 /* 3 */ 0,
1503 /* 4 */ 0,
1504 },
1505 /* NOTE: the SPDIF output task read samples in mono
1506 format, the AsynchFGTxSCB task writes to buffer
1507 in stereo format
1508 */
1509 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1510 /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC,
1511 /* 7 */ 0,0,
1512 /* 8 */ 0,
1513 /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1514 /* A */ spdifo_task->address,
1515 SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1516 {
1517 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1518 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1519 },
1520 /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1521 /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1522 /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */
1523 };
1524
1525 /* 0xBB0 */
1526 struct dsp_spdifiscb spdifi_scb = {
1527 /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1528 /* 1 */ 0,
1529 /* 2 */ 0,
1530 /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */
1531 /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1532 /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1533 /* 6 */ DSP_SPOS_UUUU, /* Free3 */
1534 /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/
1535 /* 8 */ DSP_SPOS_UUUU, /* TempStatus */
1536 /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1537 /* A */ spdifi_task->address,
1538 SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1539 /* NOTE: The SPDIF input task write the sample in mono
1540 format from the HW FIFO, the AsynchFGRxSCB task reads
1541 them in stereo
1542 */
1543 /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1544 /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1545 /* D */ 0x8048,0,
1546 /* E */ 0x01f0,0x0001,
1547 /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1548 };
1549
1550 /* 0xBA0 */
1551 struct dsp_async_codec_input_scb async_codec_input_scb = {
1552 /* 0 */ DSP_SPOS_UUUU,
1553 /* 1 */ 0,
1554 /* 2 */ 0,
1555 /* 3 */ 1,4000,
1556 /* 4 */ 0x0118,0x0001,
1557 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1558 /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1559 /* 7 */ DSP_SPOS_UU,0x3,
1560 /* 8 */ DSP_SPOS_UUUU,
1561 /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1562 /* A */ s16_async_codec_input_task->address,
1563 HFG_TREE_SCB + AsyncCIOFIFOPointer,
1564
1565 /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1566 /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1567
1568 #ifdef UseASER1Input
1569 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1570 Init. 0000:8042: for ASER1
1571 0000:8044: for ASER2 */
1572 /* D */ 0x8042,0,
1573
1574 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1575 Init 1 stero:8050 ASER1
1576 Init 0 mono:8070 ASER2
1577 Init 1 Stereo : 0100 ASER1 (Set by script) */
1578 /* E */ 0x0100,0x0001,
1579
1580 #endif
1581
1582 #ifdef UseASER2Input
1583 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1584 Init. 0000:8042: for ASER1
1585 0000:8044: for ASER2 */
1586 /* D */ 0x8044,0,
1587
1588 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1589 Init 1 stero:8050 ASER1
1590 Init 0 mono:8070 ASER2
1591 Init 1 Stereo : 0100 ASER1 (Set by script) */
1592 /* E */ 0x0110,0x0001,
1593
1594 #endif
1595
1596 /* short AsyncCIOutputBufModulo:AsyncCIFree;
1597 AsyncCIOutputBufModulo: The modulo size for
1598 the output buffer of this task */
1599 /* F */ 0, /* DSP_SPOS_UUUU */
1600 };
1601
1602 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1603
1604 snd_assert(spdifo_scb_desc, return -EIO);
1605 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1606 snd_assert(spdifi_scb_desc, return -EIO);
1607 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1608 snd_assert(async_codec_scb_desc, return -EIO);
1609
1610 async_codec_scb_desc->parent_scb_ptr = NULL;
1611 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1612 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1613 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1614
1615 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1616 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1617 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1618 spdifi_scb_desc->task_entry = spdifi_task;
1619
1620 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1621 spdifo_scb_desc->next_scb_ptr = fg_entry;
1622 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1623 spdifo_scb_desc->task_entry = spdifo_task;
1624
1625 /* this one is faked, as the parnet of SPDIFO task
1626 is the FG task tree */
1627 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1628
1629 /* for proc fs */
1630 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1631 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1632 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1633
1634 /* Async MASTER ENABLE, affects both SPDIF input and output */
1635 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1636 }
1637
1638 return 0;
1639 }
1640
1641
1642 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1643 {
1644 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1645
1646 /* set SPDIF output FIFO slot */
1647 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1648
1649 /* SPDIF output MASTER ENABLE */
1650 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1651
1652 /* right and left validate bit */
1653 /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1654 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1655
1656 /* clear fifo pointer */
1657 cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1658
1659 /* monitor state */
1660 ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1661 }
1662
1663 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1664 {
1665 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1666
1667 /* if hw-ctrl already enabled, turn off to reset logic ... */
1668 cs46xx_dsp_disable_spdif_hw (chip);
1669 udelay(50);
1670
1671 /* set SPDIF output FIFO slot */
1672 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1673
1674 /* SPDIF output MASTER ENABLE */
1675 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1676
1677 /* right and left validate bit */
1678 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1679
1680 /* monitor state */
1681 ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1682
1683 return 0;
1684 }
1685
1686 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1687 {
1688 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1689
1690 /* turn on amplifier */
1691 chip->active_ctrl(chip, 1);
1692 chip->amplifier_ctrl(chip, 1);
1693
1694 snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL);
1695 snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1696
1697 down(&chip->spos_mutex);
1698
1699 if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1700 /* time countdown enable */
1701 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1702 /* NOTE: 80000005 value is just magic. With all values
1703 that I've tested this one seem to give the best result.
1704 Got no explication why. (Benny) */
1705
1706 /* SPDIF input MASTER ENABLE */
1707 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1708
1709 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1710 }
1711
1712 /* create and start the asynchronous receiver SCB */
1713 ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1714 ASYNCRX_SCB_ADDR,
1715 SPDIFI_SCB_INST,
1716 SPDIFI_IP_OUTPUT_BUFFER1,
1717 ins->spdif_in_src,
1718 SCB_ON_PARENT_SUBLIST_SCB);
1719
1720 spin_lock_irq(&chip->reg_lock);
1721
1722 /* reset SPDIF input sample buffer pointer */
1723 /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1724 (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1725
1726 /* reset FIFO ptr */
1727 /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1728 cs46xx_src_link(chip,ins->spdif_in_src);
1729
1730 /* unmute SRC volume */
1731 cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1732
1733 spin_unlock_irq(&chip->reg_lock);
1734
1735 /* set SPDIF input sample rate and unmute
1736 NOTE: only 48khz support for SPDIF input this time */
1737 /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1738
1739 /* monitor state */
1740 ins->spdif_status_in = 1;
1741 up(&chip->spos_mutex);
1742
1743 return 0;
1744 }
1745
1746 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1747 {
1748 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1749
1750 snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL);
1751 snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1752
1753 down(&chip->spos_mutex);
1754
1755 /* Remove the asynchronous receiver SCB */
1756 cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1757 ins->asynch_rx_scb = NULL;
1758
1759 cs46xx_src_unlink(chip,ins->spdif_in_src);
1760
1761 /* monitor state */
1762 ins->spdif_status_in = 0;
1763 up(&chip->spos_mutex);
1764
1765 /* restore amplifier */
1766 chip->active_ctrl(chip, -1);
1767 chip->amplifier_ctrl(chip, -1);
1768
1769 return 0;
1770 }
1771
1772 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1773 {
1774 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1775
1776 snd_assert (ins->pcm_input == NULL,return -EINVAL);
1777 snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL);
1778
1779 down(&chip->spos_mutex);
1780 ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1781 "PCMSerialInput_Wave");
1782 up(&chip->spos_mutex);
1783
1784 return 0;
1785 }
1786
1787 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1788 {
1789 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1790
1791 snd_assert (ins->pcm_input != NULL,return -EINVAL);
1792
1793 down(&chip->spos_mutex);
1794 cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1795 ins->pcm_input = NULL;
1796 up(&chip->spos_mutex);
1797
1798 return 0;
1799 }
1800
1801 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1802 {
1803 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1804
1805 snd_assert (ins->adc_input == NULL,return -EINVAL);
1806 snd_assert (ins->codec_in_scb != NULL,return -EINVAL);
1807
1808 down(&chip->spos_mutex);
1809 ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1810 "PCMSerialInput_ADC");
1811 up(&chip->spos_mutex);
1812
1813 return 0;
1814 }
1815
1816 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1817 {
1818 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1819
1820 snd_assert (ins->adc_input != NULL,return -EINVAL);
1821
1822 down(&chip->spos_mutex);
1823 cs46xx_dsp_remove_scb (chip,ins->adc_input);
1824 ins->adc_input = NULL;
1825 up(&chip->spos_mutex);
1826
1827 return 0;
1828 }
1829
1830 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1831 {
1832 u32 temp;
1833 int i;
1834
1835 /* santiy check the parameters. (These numbers are not 100% correct. They are
1836 a rough guess from looking at the controller spec.) */
1837 if (address < 0x8000 || address >= 0x9000)
1838 return -EINVAL;
1839
1840 /* initialize the SP_IO_WRITE SCB with the data. */
1841 temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */
1842
1843 snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp);
1844 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1845 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1846
1847 /* Poke this location to tell the task to start */
1848 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1849
1850 /* Verify that the task ran */
1851 for (i=0; i<25; i++) {
1852 udelay(125);
1853
1854 temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1855 if (temp == 0x00000000)
1856 break;
1857 }
1858
1859 if (i == 25) {
1860 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
1861 return -EBUSY;
1862 }
1863
1864 return 0;
1865 }
1866
1867 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1868 {
1869 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1870 struct dsp_scb_descriptor * scb;
1871
1872 down(&chip->spos_mutex);
1873
1874 /* main output */
1875 scb = ins->master_mix_scb->sub_list_ptr;
1876 while (scb != ins->the_null_scb) {
1877 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1878 scb = scb->next_scb_ptr;
1879 }
1880
1881 /* rear output */
1882 scb = ins->rear_mix_scb->sub_list_ptr;
1883 while (scb != ins->the_null_scb) {
1884 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1885 scb = scb->next_scb_ptr;
1886 }
1887
1888 ins->dac_volume_left = left;
1889 ins->dac_volume_right = right;
1890
1891 up(&chip->spos_mutex);
1892
1893 return 0;
1894 }
1895
1896 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1897 {
1898 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1899
1900 down(&chip->spos_mutex);
1901
1902 if (ins->asynch_rx_scb != NULL)
1903 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1904 left,right);
1905
1906 ins->spdif_input_volume_left = left;
1907 ins->spdif_input_volume_right = right;
1908
1909 up(&chip->spos_mutex);
1910
1911 return 0;
1912 }
Linux kernel - Deliverables
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