sound/pci/hda/hda_codec.h

   1 /*
   2  * Universal Interface for Intel High Definition Audio Codec
   3  *
   4  * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License as published by the Free
   8  *  Software Foundation; either version 2 of the License, or (at your option)
   9  *  any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful, but WITHOUT
  12  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  *  more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License along with
  17  *  this program; if not, write to the Free Software Foundation, Inc., 59
  18  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  19  */
  20
  21 #ifndef __SOUND_HDA_CODEC_H
  22 #define __SOUND_HDA_CODEC_H
  23
  24 #include <sound/info.h>
  25 #include <sound/control.h>
  26 #include <sound/pcm.h>
  27 #include <sound/hwdep.h>
  28
  29 /*
  30  * nodes
  31  */
  32 #define AC_NODE_ROOT            0x00
  33
  34 /*
  35  * function group types
  36  */
  37 enum {
  38         AC_GRP_AUDIO_FUNCTION = 0x01,
  39         AC_GRP_MODEM_FUNCTION = 0x02,
  40 };
  41
  42 /*
  43  * widget types
  44  */
  45 enum {
  46         AC_WID_AUD_OUT,         /* Audio Out */
  47         AC_WID_AUD_IN,          /* Audio In */
  48         AC_WID_AUD_MIX,         /* Audio Mixer */
  49         AC_WID_AUD_SEL,         /* Audio Selector */
  50         AC_WID_PIN,             /* Pin Complex */
  51         AC_WID_POWER,           /* Power */
  52         AC_WID_VOL_KNB,         /* Volume Knob */
  53         AC_WID_BEEP,            /* Beep Generator */
  54         AC_WID_VENDOR = 0x0f    /* Vendor specific */
  55 };
  56
  57 /*
  58  * GET verbs
  59  */
  60 #define AC_VERB_GET_STREAM_FORMAT               0x0a00
  61 #define AC_VERB_GET_AMP_GAIN_MUTE               0x0b00
  62 #define AC_VERB_GET_PROC_COEF                   0x0c00
  63 #define AC_VERB_GET_COEF_INDEX                  0x0d00
  64 #define AC_VERB_PARAMETERS                      0x0f00
  65 #define AC_VERB_GET_CONNECT_SEL                 0x0f01
  66 #define AC_VERB_GET_CONNECT_LIST                0x0f02
  67 #define AC_VERB_GET_PROC_STATE                  0x0f03
  68 #define AC_VERB_GET_SDI_SELECT                  0x0f04
  69 #define AC_VERB_GET_POWER_STATE                 0x0f05
  70 #define AC_VERB_GET_CONV                        0x0f06
  71 #define AC_VERB_GET_PIN_WIDGET_CONTROL          0x0f07
  72 #define AC_VERB_GET_UNSOLICITED_RESPONSE        0x0f08
  73 #define AC_VERB_GET_PIN_SENSE                   0x0f09
  74 #define AC_VERB_GET_BEEP_CONTROL                0x0f0a
  75 #define AC_VERB_GET_EAPD_BTLENABLE              0x0f0c
  76 #define AC_VERB_GET_DIGI_CONVERT_1              0x0f0d
  77 #define AC_VERB_GET_DIGI_CONVERT_2              0x0f0e /* unused */
  78 #define AC_VERB_GET_VOLUME_KNOB_CONTROL         0x0f0f
  79 /* f10-f1a: GPIO */
  80 #define AC_VERB_GET_GPIO_DATA                   0x0f15
  81 #define AC_VERB_GET_GPIO_MASK                   0x0f16
  82 #define AC_VERB_GET_GPIO_DIRECTION              0x0f17
  83 #define AC_VERB_GET_GPIO_WAKE_MASK              0x0f18
  84 #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK   0x0f19
  85 #define AC_VERB_GET_GPIO_STICKY_MASK            0x0f1a
  86 #define AC_VERB_GET_CONFIG_DEFAULT              0x0f1c
  87 /* f20: AFG/MFG */
  88 #define AC_VERB_GET_SUBSYSTEM_ID                0x0f20
  89 #define AC_VERB_GET_CVT_CHAN_COUNT              0x0f2d
  90 #define AC_VERB_GET_HDMI_DIP_SIZE               0x0f2e
  91 #define AC_VERB_GET_HDMI_ELDD                   0x0f2f
  92 #define AC_VERB_GET_HDMI_DIP_INDEX              0x0f30
  93 #define AC_VERB_GET_HDMI_DIP_DATA               0x0f31
  94 #define AC_VERB_GET_HDMI_DIP_XMIT               0x0f32
  95 #define AC_VERB_GET_HDMI_CP_CTRL                0x0f33
  96 #define AC_VERB_GET_HDMI_CHAN_SLOT              0x0f34
  97
  98 /*
  99  * SET verbs
 100  */
 101 #define AC_VERB_SET_STREAM_FORMAT               0x200
 102 #define AC_VERB_SET_AMP_GAIN_MUTE               0x300
 103 #define AC_VERB_SET_PROC_COEF                   0x400
 104 #define AC_VERB_SET_COEF_INDEX                  0x500
 105 #define AC_VERB_SET_CONNECT_SEL                 0x701
 106 #define AC_VERB_SET_PROC_STATE                  0x703
 107 #define AC_VERB_SET_SDI_SELECT                  0x704
 108 #define AC_VERB_SET_POWER_STATE                 0x705
 109 #define AC_VERB_SET_CHANNEL_STREAMID            0x706
 110 #define AC_VERB_SET_PIN_WIDGET_CONTROL          0x707
 111 #define AC_VERB_SET_UNSOLICITED_ENABLE          0x708
 112 #define AC_VERB_SET_PIN_SENSE                   0x709
 113 #define AC_VERB_SET_BEEP_CONTROL                0x70a
 114 #define AC_VERB_SET_EAPD_BTLENABLE              0x70c
 115 #define AC_VERB_SET_DIGI_CONVERT_1              0x70d
 116 #define AC_VERB_SET_DIGI_CONVERT_2              0x70e
 117 #define AC_VERB_SET_VOLUME_KNOB_CONTROL         0x70f
 118 #define AC_VERB_SET_GPIO_DATA                   0x715
 119 #define AC_VERB_SET_GPIO_MASK                   0x716
 120 #define AC_VERB_SET_GPIO_DIRECTION              0x717
 121 #define AC_VERB_SET_GPIO_WAKE_MASK              0x718
 122 #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK   0x719
 123 #define AC_VERB_SET_GPIO_STICKY_MASK            0x71a
 124 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0      0x71c
 125 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1      0x71d
 126 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2      0x71e
 127 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3      0x71f
 128 #define AC_VERB_SET_EAPD                                0x788
 129 #define AC_VERB_SET_CODEC_RESET                 0x7ff
 130 #define AC_VERB_SET_CVT_CHAN_COUNT              0x72d
 131 #define AC_VERB_SET_HDMI_DIP_INDEX              0x730
 132 #define AC_VERB_SET_HDMI_DIP_DATA               0x731
 133 #define AC_VERB_SET_HDMI_DIP_XMIT               0x732
 134 #define AC_VERB_SET_HDMI_CP_CTRL                0x733
 135 #define AC_VERB_SET_HDMI_CHAN_SLOT              0x734
 136
 137 /*
 138  * Parameter IDs
 139  */
 140 #define AC_PAR_VENDOR_ID                0x00
 141 #define AC_PAR_SUBSYSTEM_ID             0x01
 142 #define AC_PAR_REV_ID                   0x02
 143 #define AC_PAR_NODE_COUNT               0x04
 144 #define AC_PAR_FUNCTION_TYPE            0x05
 145 #define AC_PAR_AUDIO_FG_CAP             0x08
 146 #define AC_PAR_AUDIO_WIDGET_CAP         0x09
 147 #define AC_PAR_PCM                      0x0a
 148 #define AC_PAR_STREAM                   0x0b
 149 #define AC_PAR_PIN_CAP                  0x0c
 150 #define AC_PAR_AMP_IN_CAP               0x0d
 151 #define AC_PAR_CONNLIST_LEN             0x0e
 152 #define AC_PAR_POWER_STATE              0x0f
 153 #define AC_PAR_PROC_CAP                 0x10
 154 #define AC_PAR_GPIO_CAP                 0x11
 155 #define AC_PAR_AMP_OUT_CAP              0x12
 156 #define AC_PAR_VOL_KNB_CAP              0x13
 157 #define AC_PAR_HDMI_LPCM_CAP            0x20
 158
 159 /*
 160  * AC_VERB_PARAMETERS results (32bit)
 161  */
 162
 163 /* Function Group Type */
 164 #define AC_FGT_TYPE                     (0xff<<0)
 165 #define AC_FGT_TYPE_SHIFT               0
 166 #define AC_FGT_UNSOL_CAP                (1<<8)
 167
 168 /* Audio Function Group Capabilities */
 169 #define AC_AFG_OUT_DELAY                (0xf<<0)
 170 #define AC_AFG_IN_DELAY                 (0xf<<8)
 171 #define AC_AFG_BEEP_GEN                 (1<<16)
 172
 173 /* Audio Widget Capabilities */
 174 #define AC_WCAP_STEREO                  (1<<0)  /* stereo I/O */
 175 #define AC_WCAP_IN_AMP                  (1<<1)  /* AMP-in present */
 176 #define AC_WCAP_OUT_AMP                 (1<<2)  /* AMP-out present */
 177 #define AC_WCAP_AMP_OVRD                (1<<3)  /* AMP-parameter override */
 178 #define AC_WCAP_FORMAT_OVRD             (1<<4)  /* format override */
 179 #define AC_WCAP_STRIPE                  (1<<5)  /* stripe */
 180 #define AC_WCAP_PROC_WID                (1<<6)  /* Proc Widget */
 181 #define AC_WCAP_UNSOL_CAP               (1<<7)  /* Unsol capable */
 182 #define AC_WCAP_CONN_LIST               (1<<8)  /* connection list */
 183 #define AC_WCAP_DIGITAL                 (1<<9)  /* digital I/O */
 184 #define AC_WCAP_POWER                   (1<<10) /* power control */
 185 #define AC_WCAP_LR_SWAP                 (1<<11) /* L/R swap */
 186 #define AC_WCAP_CP_CAPS                 (1<<12) /* content protection */
 187 #define AC_WCAP_CHAN_CNT_EXT            (7<<13) /* channel count ext */
 188 #define AC_WCAP_DELAY                   (0xf<<16)
 189 #define AC_WCAP_DELAY_SHIFT             16
 190 #define AC_WCAP_TYPE                    (0xf<<20)
 191 #define AC_WCAP_TYPE_SHIFT              20
 192
 193 /* supported PCM rates and bits */
 194 #define AC_SUPPCM_RATES                 (0xfff << 0)
 195 #define AC_SUPPCM_BITS_8                (1<<16)
 196 #define AC_SUPPCM_BITS_16               (1<<17)
 197 #define AC_SUPPCM_BITS_20               (1<<18)
 198 #define AC_SUPPCM_BITS_24               (1<<19)
 199 #define AC_SUPPCM_BITS_32               (1<<20)
 200
 201 /* supported PCM stream format */
 202 #define AC_SUPFMT_PCM                   (1<<0)
 203 #define AC_SUPFMT_FLOAT32               (1<<1)
 204 #define AC_SUPFMT_AC3                   (1<<2)
 205
 206 /* GP I/O count */
 207 #define AC_GPIO_IO_COUNT                (0xff<<0)
 208 #define AC_GPIO_O_COUNT                 (0xff<<8)
 209 #define AC_GPIO_O_COUNT_SHIFT           8
 210 #define AC_GPIO_I_COUNT                 (0xff<<16)
 211 #define AC_GPIO_I_COUNT_SHIFT           16
 212 #define AC_GPIO_UNSOLICITED             (1<<30)
 213 #define AC_GPIO_WAKE                    (1<<31)
 214
 215 /* Converter stream, channel */
 216 #define AC_CONV_CHANNEL                 (0xf<<0)
 217 #define AC_CONV_STREAM                  (0xf<<4)
 218 #define AC_CONV_STREAM_SHIFT            4
 219
 220 /* Input converter SDI select */
 221 #define AC_SDI_SELECT                   (0xf<<0)
 222
 223 /* stream format id */
 224 #define AC_FMT_CHAN_SHIFT               0
 225 #define AC_FMT_CHAN_MASK                (0x0f << 0)
 226 #define AC_FMT_BITS_SHIFT               4
 227 #define AC_FMT_BITS_MASK                (7 << 4)
 228 #define AC_FMT_BITS_8                   (0 << 4)
 229 #define AC_FMT_BITS_16                  (1 << 4)
 230 #define AC_FMT_BITS_20                  (2 << 4)
 231 #define AC_FMT_BITS_24                  (3 << 4)
 232 #define AC_FMT_BITS_32                  (4 << 4)
 233 #define AC_FMT_DIV_SHIFT                8
 234 #define AC_FMT_DIV_MASK                 (7 << 8)
 235 #define AC_FMT_MULT_SHIFT               11
 236 #define AC_FMT_MULT_MASK                (7 << 11)
 237 #define AC_FMT_BASE_SHIFT               14
 238 #define AC_FMT_BASE_48K                 (0 << 14)
 239 #define AC_FMT_BASE_44K                 (1 << 14)
 240 #define AC_FMT_TYPE_SHIFT               15
 241 #define AC_FMT_TYPE_PCM                 (0 << 15)
 242 #define AC_FMT_TYPE_NON_PCM             (1 << 15)
 243
 244 /* Unsolicited response control */
 245 #define AC_UNSOL_TAG                    (0x3f<<0)
 246 #define AC_UNSOL_ENABLED                (1<<7)
 247 #define AC_USRSP_EN                     AC_UNSOL_ENABLED
 248
 249 /* Unsolicited responses */
 250 #define AC_UNSOL_RES_TAG                (0x3f<<26)
 251 #define AC_UNSOL_RES_TAG_SHIFT          26
 252 #define AC_UNSOL_RES_SUBTAG             (0x1f<<21)
 253 #define AC_UNSOL_RES_SUBTAG_SHIFT       21
 254 #define AC_UNSOL_RES_ELDV               (1<<1)  /* ELD Data valid (for HDMI) */
 255 #define AC_UNSOL_RES_PD                 (1<<0)  /* pinsense detect */
 256 #define AC_UNSOL_RES_CP_STATE           (1<<1)  /* content protection */
 257 #define AC_UNSOL_RES_CP_READY           (1<<0)  /* content protection */
 258
 259 /* Pin widget capabilies */
 260 #define AC_PINCAP_IMP_SENSE             (1<<0)  /* impedance sense capable */
 261 #define AC_PINCAP_TRIG_REQ              (1<<1)  /* trigger required */
 262 #define AC_PINCAP_PRES_DETECT           (1<<2)  /* presence detect capable */
 263 #define AC_PINCAP_HP_DRV                (1<<3)  /* headphone drive capable */
 264 #define AC_PINCAP_OUT                   (1<<4)  /* output capable */
 265 #define AC_PINCAP_IN                    (1<<5)  /* input capable */
 266 #define AC_PINCAP_BALANCE               (1<<6)  /* balanced I/O capable */
 267 /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
 268  *       but is marked reserved in the Intel HDA specification.
 269  */
 270 #define AC_PINCAP_LR_SWAP               (1<<7)  /* L/R swap */
 271 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability
 272  *       in HD-audio specification
 273  */
 274 #define AC_PINCAP_HDMI                  (1<<7)  /* HDMI pin */
 275 #define AC_PINCAP_DP                    (1<<24) /* DisplayPort pin, can
 276                                                  * coexist with AC_PINCAP_HDMI
 277                                                  */
 278 #define AC_PINCAP_VREF                  (0x37<<8)
 279 #define AC_PINCAP_VREF_SHIFT            8
 280 #define AC_PINCAP_EAPD                  (1<<16) /* EAPD capable */
 281 #define AC_PINCAP_HBR                   (1<<27) /* High Bit Rate */
 282 /* Vref status (used in pin cap) */
 283 #define AC_PINCAP_VREF_HIZ              (1<<0)  /* Hi-Z */
 284 #define AC_PINCAP_VREF_50               (1<<1)  /* 50% */
 285 #define AC_PINCAP_VREF_GRD              (1<<2)  /* ground */
 286 #define AC_PINCAP_VREF_80               (1<<4)  /* 80% */
 287 #define AC_PINCAP_VREF_100              (1<<5)  /* 100% */
 288
 289 /* Amplifier capabilities */
 290 #define AC_AMPCAP_OFFSET                (0x7f<<0)  /* 0dB offset */
 291 #define AC_AMPCAP_OFFSET_SHIFT          0
 292 #define AC_AMPCAP_NUM_STEPS             (0x7f<<8)  /* number of steps */
 293 #define AC_AMPCAP_NUM_STEPS_SHIFT       8
 294 #define AC_AMPCAP_STEP_SIZE             (0x7f<<16) /* step size 0-32dB
 295                                                     * in 0.25dB
 296                                                     */
 297 #define AC_AMPCAP_STEP_SIZE_SHIFT       16
 298 #define AC_AMPCAP_MUTE                  (1<<31)    /* mute capable */
 299 #define AC_AMPCAP_MUTE_SHIFT            31
 300
 301 /* driver-specific amp-caps: using bits 24-30 */
 302 #define AC_AMPCAP_MIN_MUTE              (1 << 30) /* min-volume = mute */
 303
 304 /* Connection list */
 305 #define AC_CLIST_LENGTH                 (0x7f<<0)
 306 #define AC_CLIST_LONG                   (1<<7)
 307
 308 /* Supported power status */
 309 #define AC_PWRST_D0SUP                  (1<<0)
 310 #define AC_PWRST_D1SUP                  (1<<1)
 311 #define AC_PWRST_D2SUP                  (1<<2)
 312 #define AC_PWRST_D3SUP                  (1<<3)
 313 #define AC_PWRST_D3COLDSUP              (1<<4)
 314 #define AC_PWRST_S3D3COLDSUP            (1<<29)
 315 #define AC_PWRST_CLKSTOP                (1<<30)
 316 #define AC_PWRST_EPSS                   (1U<<31)
 317
 318 /* Power state values */
 319 #define AC_PWRST_SETTING                (0xf<<0)
 320 #define AC_PWRST_ACTUAL                 (0xf<<4)
 321 #define AC_PWRST_ACTUAL_SHIFT           4
 322 #define AC_PWRST_D0                     0x00
 323 #define AC_PWRST_D1                     0x01
 324 #define AC_PWRST_D2                     0x02
 325 #define AC_PWRST_D3                     0x03
 326 #define AC_PWRST_ERROR                  (1<<8)
 327 #define AC_PWRST_CLK_STOP_OK            (1<<9)
 328 #define AC_PWRST_SETTING_RESET          (1<<10)
 329
 330 /* Processing capabilies */
 331 #define AC_PCAP_BENIGN                  (1<<0)
 332 #define AC_PCAP_NUM_COEF                (0xff<<8)
 333 #define AC_PCAP_NUM_COEF_SHIFT          8
 334
 335 /* Volume knobs capabilities */
 336 #define AC_KNBCAP_NUM_STEPS             (0x7f<<0)
 337 #define AC_KNBCAP_DELTA                 (1<<7)
 338
 339 /* HDMI LPCM capabilities */
 340 #define AC_LPCMCAP_48K_CP_CHNS          (0x0f<<0) /* max channels w/ CP-on */
 341 #define AC_LPCMCAP_48K_NO_CHNS          (0x0f<<4) /* max channels w/o CP-on */
 342 #define AC_LPCMCAP_48K_20BIT            (1<<8)  /* 20b bitrate supported */
 343 #define AC_LPCMCAP_48K_24BIT            (1<<9)  /* 24b bitrate supported */
 344 #define AC_LPCMCAP_96K_CP_CHNS          (0x0f<<10) /* max channels w/ CP-on */
 345 #define AC_LPCMCAP_96K_NO_CHNS          (0x0f<<14) /* max channels w/o CP-on */
 346 #define AC_LPCMCAP_96K_20BIT            (1<<18) /* 20b bitrate supported */
 347 #define AC_LPCMCAP_96K_24BIT            (1<<19) /* 24b bitrate supported */
 348 #define AC_LPCMCAP_192K_CP_CHNS         (0x0f<<20) /* max channels w/ CP-on */
 349 #define AC_LPCMCAP_192K_NO_CHNS         (0x0f<<24) /* max channels w/o CP-on */
 350 #define AC_LPCMCAP_192K_20BIT           (1<<28) /* 20b bitrate supported */
 351 #define AC_LPCMCAP_192K_24BIT           (1<<29) /* 24b bitrate supported */
 352 #define AC_LPCMCAP_44K                  (1<<30) /* 44.1kHz support */
 353 #define AC_LPCMCAP_44K_MS               (1<<31) /* 44.1kHz-multiplies support */
 354
 355 /*
 356  * Control Parameters
 357  */
 358
 359 /* Amp gain/mute */
 360 #define AC_AMP_MUTE                     (1<<7)
 361 #define AC_AMP_GAIN                     (0x7f)
 362 #define AC_AMP_GET_INDEX                (0xf<<0)
 363
 364 #define AC_AMP_GET_LEFT                 (1<<13)
 365 #define AC_AMP_GET_RIGHT                (0<<13)
 366 #define AC_AMP_GET_OUTPUT               (1<<15)
 367 #define AC_AMP_GET_INPUT                (0<<15)
 368
 369 #define AC_AMP_SET_INDEX                (0xf<<8)
 370 #define AC_AMP_SET_INDEX_SHIFT          8
 371 #define AC_AMP_SET_RIGHT                (1<<12)
 372 #define AC_AMP_SET_LEFT                 (1<<13)
 373 #define AC_AMP_SET_INPUT                (1<<14)
 374 #define AC_AMP_SET_OUTPUT               (1<<15)
 375
 376 /* DIGITAL1 bits */
 377 #define AC_DIG1_ENABLE                  (1<<0)
 378 #define AC_DIG1_V                       (1<<1)
 379 #define AC_DIG1_VCFG                    (1<<2)
 380 #define AC_DIG1_EMPHASIS                (1<<3)
 381 #define AC_DIG1_COPYRIGHT               (1<<4)
 382 #define AC_DIG1_NONAUDIO                (1<<5)
 383 #define AC_DIG1_PROFESSIONAL            (1<<6)
 384 #define AC_DIG1_LEVEL                   (1<<7)
 385
 386 /* DIGITAL2 bits */
 387 #define AC_DIG2_CC                      (0x7f<<0)
 388
 389 /* Pin widget control - 8bit */
 390 #define AC_PINCTL_EPT                   (0x3<<0)
 391 #define AC_PINCTL_EPT_NATIVE            0
 392 #define AC_PINCTL_EPT_HBR               3
 393 #define AC_PINCTL_VREFEN                (0x7<<0)
 394 #define AC_PINCTL_VREF_HIZ              0       /* Hi-Z */
 395 #define AC_PINCTL_VREF_50               1       /* 50% */
 396 #define AC_PINCTL_VREF_GRD              2       /* ground */
 397 #define AC_PINCTL_VREF_80               4       /* 80% */
 398 #define AC_PINCTL_VREF_100              5       /* 100% */
 399 #define AC_PINCTL_IN_EN                 (1<<5)
 400 #define AC_PINCTL_OUT_EN                (1<<6)
 401 #define AC_PINCTL_HP_EN                 (1<<7)
 402
 403 /* Pin sense - 32bit */
 404 #define AC_PINSENSE_IMPEDANCE_MASK      (0x7fffffff)
 405 #define AC_PINSENSE_PRESENCE            (1<<31)
 406 #define AC_PINSENSE_ELDV                (1<<30) /* ELD valid (HDMI) */
 407
 408 /* EAPD/BTL enable - 32bit */
 409 #define AC_EAPDBTL_BALANCED             (1<<0)
 410 #define AC_EAPDBTL_EAPD                 (1<<1)
 411 #define AC_EAPDBTL_LR_SWAP              (1<<2)
 412
 413 /* HDMI ELD data */
 414 #define AC_ELDD_ELD_VALID               (1<<31)
 415 #define AC_ELDD_ELD_DATA                0xff
 416
 417 /* HDMI DIP size */
 418 #define AC_DIPSIZE_ELD_BUF              (1<<3) /* ELD buf size of packet size */
 419 #define AC_DIPSIZE_PACK_IDX             (0x07<<0) /* packet index */
 420
 421 /* HDMI DIP index */
 422 #define AC_DIPIDX_PACK_IDX              (0x07<<5) /* packet idnex */
 423 #define AC_DIPIDX_BYTE_IDX              (0x1f<<0) /* byte index */
 424
 425 /* HDMI DIP xmit (transmit) control */
 426 #define AC_DIPXMIT_MASK                 (0x3<<6)
 427 #define AC_DIPXMIT_DISABLE              (0x0<<6) /* disable xmit */
 428 #define AC_DIPXMIT_ONCE                 (0x2<<6) /* xmit once then disable */
 429 #define AC_DIPXMIT_BEST                 (0x3<<6) /* best effort */
 430
 431 /* HDMI content protection (CP) control */
 432 #define AC_CPCTRL_CES                   (1<<9) /* current encryption state */
 433 #define AC_CPCTRL_READY                 (1<<8) /* ready bit */
 434 #define AC_CPCTRL_SUBTAG                (0x1f<<3) /* subtag for unsol-resp */
 435 #define AC_CPCTRL_STATE                 (3<<0) /* current CP request state */
 436
 437 /* Converter channel <-> HDMI slot mapping */
 438 #define AC_CVTMAP_HDMI_SLOT             (0xf<<0) /* HDMI slot number */
 439 #define AC_CVTMAP_CHAN                  (0xf<<4) /* converter channel number */
 440
 441 /* configuration default - 32bit */
 442 #define AC_DEFCFG_SEQUENCE              (0xf<<0)
 443 #define AC_DEFCFG_DEF_ASSOC             (0xf<<4)
 444 #define AC_DEFCFG_ASSOC_SHIFT           4
 445 #define AC_DEFCFG_MISC                  (0xf<<8)
 446 #define AC_DEFCFG_MISC_SHIFT            8
 447 #define AC_DEFCFG_MISC_NO_PRESENCE      (1<<0)
 448 #define AC_DEFCFG_COLOR                 (0xf<<12)
 449 #define AC_DEFCFG_COLOR_SHIFT           12
 450 #define AC_DEFCFG_CONN_TYPE             (0xf<<16)
 451 #define AC_DEFCFG_CONN_TYPE_SHIFT       16
 452 #define AC_DEFCFG_DEVICE                (0xf<<20)
 453 #define AC_DEFCFG_DEVICE_SHIFT          20
 454 #define AC_DEFCFG_LOCATION              (0x3f<<24)
 455 #define AC_DEFCFG_LOCATION_SHIFT        24
 456 #define AC_DEFCFG_PORT_CONN             (0x3<<30)
 457 #define AC_DEFCFG_PORT_CONN_SHIFT       30
 458
 459 /* device device types (0x0-0xf) */
 460 enum {
 461         AC_JACK_LINE_OUT,
 462         AC_JACK_SPEAKER,
 463         AC_JACK_HP_OUT,
 464         AC_JACK_CD,
 465         AC_JACK_SPDIF_OUT,
 466         AC_JACK_DIG_OTHER_OUT,
 467         AC_JACK_MODEM_LINE_SIDE,
 468         AC_JACK_MODEM_HAND_SIDE,
 469         AC_JACK_LINE_IN,
 470         AC_JACK_AUX,
 471         AC_JACK_MIC_IN,
 472         AC_JACK_TELEPHONY,
 473         AC_JACK_SPDIF_IN,
 474         AC_JACK_DIG_OTHER_IN,
 475         AC_JACK_OTHER = 0xf,
 476 };
 477
 478 /* jack connection types (0x0-0xf) */
 479 enum {
 480         AC_JACK_CONN_UNKNOWN,
 481         AC_JACK_CONN_1_8,
 482         AC_JACK_CONN_1_4,
 483         AC_JACK_CONN_ATAPI,
 484         AC_JACK_CONN_RCA,
 485         AC_JACK_CONN_OPTICAL,
 486         AC_JACK_CONN_OTHER_DIGITAL,
 487         AC_JACK_CONN_OTHER_ANALOG,
 488         AC_JACK_CONN_DIN,
 489         AC_JACK_CONN_XLR,
 490         AC_JACK_CONN_RJ11,
 491         AC_JACK_CONN_COMB,
 492         AC_JACK_CONN_OTHER = 0xf,
 493 };
 494
 495 /* jack colors (0x0-0xf) */
 496 enum {
 497         AC_JACK_COLOR_UNKNOWN,
 498         AC_JACK_COLOR_BLACK,
 499         AC_JACK_COLOR_GREY,
 500         AC_JACK_COLOR_BLUE,
 501         AC_JACK_COLOR_GREEN,
 502         AC_JACK_COLOR_RED,
 503         AC_JACK_COLOR_ORANGE,
 504         AC_JACK_COLOR_YELLOW,
 505         AC_JACK_COLOR_PURPLE,
 506         AC_JACK_COLOR_PINK,
 507         AC_JACK_COLOR_WHITE = 0xe,
 508         AC_JACK_COLOR_OTHER,
 509 };
 510
 511 /* Jack location (0x0-0x3f) */
 512 /* common case */
 513 enum {
 514         AC_JACK_LOC_NONE,
 515         AC_JACK_LOC_REAR,
 516         AC_JACK_LOC_FRONT,
 517         AC_JACK_LOC_LEFT,
 518         AC_JACK_LOC_RIGHT,
 519         AC_JACK_LOC_TOP,
 520         AC_JACK_LOC_BOTTOM,
 521 };
 522 /* bits 4-5 */
 523 enum {
 524         AC_JACK_LOC_EXTERNAL = 0x00,
 525         AC_JACK_LOC_INTERNAL = 0x10,
 526         AC_JACK_LOC_SEPARATE = 0x20,
 527         AC_JACK_LOC_OTHER    = 0x30,
 528 };
 529 enum {
 530         /* external on primary chasis */
 531         AC_JACK_LOC_REAR_PANEL = 0x07,
 532         AC_JACK_LOC_DRIVE_BAY,
 533         /* internal */
 534         AC_JACK_LOC_RISER = 0x17,
 535         AC_JACK_LOC_HDMI,
 536         AC_JACK_LOC_ATAPI,
 537         /* others */
 538         AC_JACK_LOC_MOBILE_IN = 0x37,
 539         AC_JACK_LOC_MOBILE_OUT,
 540 };
 541
 542 /* Port connectivity (0-3) */
 543 enum {
 544         AC_JACK_PORT_COMPLEX,
 545         AC_JACK_PORT_NONE,
 546         AC_JACK_PORT_FIXED,
 547         AC_JACK_PORT_BOTH,
 548 };
 549
 550 /* max. connections to a widget */
 551 #define HDA_MAX_CONNECTIONS     32
 552
 553 /* max. codec address */
 554 #define HDA_MAX_CODEC_ADDRESS   0x0f
 555
 556 /*
 557  * generic arrays
 558  */
 559 struct snd_array {
 560         unsigned int used;
 561         unsigned int alloced;
 562         unsigned int elem_size;
 563         unsigned int alloc_align;
 564         void *list;
 565 };
 566
 567 void *snd_array_new(struct snd_array *array);
 568 void snd_array_free(struct snd_array *array);
 569 static inline void snd_array_init(struct snd_array *array, unsigned int size,
 570                                   unsigned int align)
 571 {
 572         array->elem_size = size;
 573         array->alloc_align = align;
 574 }
 575
 576 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
 577 {
 578         return array->list + idx * array->elem_size;
 579 }
 580
 581 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
 582 {
 583         return (unsigned long)(ptr - array->list) / array->elem_size;
 584 }
 585
 586 /*
 587  * Structures
 588  */
 589
 590 struct hda_bus;
 591 struct hda_beep;
 592 struct hda_codec;
 593 struct hda_pcm;
 594 struct hda_pcm_stream;
 595 struct hda_bus_unsolicited;
 596
 597 /* NID type */
 598 typedef u16 hda_nid_t;
 599
 600 /* bus operators */
 601 struct hda_bus_ops {
 602         /* send a single command */
 603         int (*command)(struct hda_bus *bus, unsigned int cmd);
 604         /* get a response from the last command */
 605         unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
 606         /* free the private data */
 607         void (*private_free)(struct hda_bus *);
 608         /* attach a PCM stream */
 609         int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
 610                           struct hda_pcm *pcm);
 611         /* reset bus for retry verb */
 612         void (*bus_reset)(struct hda_bus *bus);
 613 #ifdef CONFIG_SND_HDA_POWER_SAVE
 614         /* notify power-up/down from codec to controller */
 615         void (*pm_notify)(struct hda_bus *bus);
 616 #endif
 617 };
 618
 619 /* template to pass to the bus constructor */
 620 struct hda_bus_template {
 621         void *private_data;
 622         struct pci_dev *pci;
 623         const char *modelname;
 624         int *power_save;
 625         struct hda_bus_ops ops;
 626 };
 627
 628 /*
 629  * codec bus
 630  *
 631  * each controller needs to creata a hda_bus to assign the accessor.
 632  * A hda_bus contains several codecs in the list codec_list.
 633  */
 634 struct hda_bus {
 635         struct snd_card *card;
 636
 637         /* copied from template */
 638         void *private_data;
 639         struct pci_dev *pci;
 640         const char *modelname;
 641         int *power_save;
 642         struct hda_bus_ops ops;
 643
 644         /* codec linked list */
 645         struct list_head codec_list;
 646         /* link caddr -> codec */
 647         struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
 648
 649         struct mutex cmd_mutex;
 650         struct mutex prepare_mutex;
 651
 652         /* unsolicited event queue */
 653         struct hda_bus_unsolicited *unsol;
 654         char workq_name[16];
 655         struct workqueue_struct *workq; /* common workqueue for codecs */
 656
 657         /* assigned PCMs */
 658         DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
 659
 660         /* misc op flags */
 661         unsigned int needs_damn_long_delay :1;
 662         unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
 663         unsigned int sync_write:1;      /* sync after verb write */
 664         /* status for codec/controller */
 665         unsigned int shutdown :1;       /* being unloaded */
 666         unsigned int rirb_error:1;      /* error in codec communication */
 667         unsigned int response_reset:1;  /* controller was reset */
 668         unsigned int in_reset:1;        /* during reset operation */
 669         unsigned int power_keep_link_on:1; /* don't power off HDA link */
 670 };
 671
 672 /*
 673  * codec preset
 674  *
 675  * Known codecs have the patch to build and set up the controls/PCMs
 676  * better than the generic parser.
 677  */
 678 struct hda_codec_preset {
 679         unsigned int id;
 680         unsigned int mask;
 681         unsigned int subs;
 682         unsigned int subs_mask;
 683         unsigned int rev;
 684         hda_nid_t afg, mfg;
 685         const char *name;
 686         int (*patch)(struct hda_codec *codec);
 687 };
 688
 689 struct hda_codec_preset_list {
 690         const struct hda_codec_preset *preset;
 691         struct module *owner;
 692         struct list_head list;
 693 };
 694
 695 /* initial hook */
 696 int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
 697 int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
 698
 699 /* ops set by the preset patch */
 700 struct hda_codec_ops {
 701         int (*build_controls)(struct hda_codec *codec);
 702         int (*build_pcms)(struct hda_codec *codec);
 703         int (*init)(struct hda_codec *codec);
 704         void (*free)(struct hda_codec *codec);
 705         void (*unsol_event)(struct hda_codec *codec, unsigned int res);
 706         void (*set_power_state)(struct hda_codec *codec, hda_nid_t fg,
 707                                 unsigned int power_state);
 708 #ifdef CONFIG_PM
 709         int (*suspend)(struct hda_codec *codec);
 710         int (*resume)(struct hda_codec *codec);
 711 #endif
 712 #ifdef CONFIG_SND_HDA_POWER_SAVE
 713         int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
 714 #endif
 715         void (*reboot_notify)(struct hda_codec *codec);
 716 };
 717
 718 /* record for amp information cache */
 719 struct hda_cache_head {
 720         u32 key;                /* hash key */
 721         u16 val;                /* assigned value */
 722         u16 next;               /* next link; -1 = terminal */
 723 };
 724
 725 struct hda_amp_info {
 726         struct hda_cache_head head;
 727         u32 amp_caps;           /* amp capabilities */
 728         u16 vol[2];             /* current volume & mute */
 729 };
 730
 731 struct hda_cache_rec {
 732         u16 hash[64];                   /* hash table for index */
 733         struct snd_array buf;           /* record entries */
 734 };
 735
 736 /* PCM callbacks */
 737 struct hda_pcm_ops {
 738         int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
 739                     struct snd_pcm_substream *substream);
 740         int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
 741                      struct snd_pcm_substream *substream);
 742         int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
 743                        unsigned int stream_tag, unsigned int format,
 744                        struct snd_pcm_substream *substream);
 745         int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
 746                        struct snd_pcm_substream *substream);
 747 };
 748
 749 /* PCM information for each substream */
 750 struct hda_pcm_stream {
 751         unsigned int substreams;        /* number of substreams, 0 = not exist*/
 752         unsigned int channels_min;      /* min. number of channels */
 753         unsigned int channels_max;      /* max. number of channels */
 754         hda_nid_t nid;  /* default NID to query rates/formats/bps, or set up */
 755         u32 rates;      /* supported rates */
 756         u64 formats;    /* supported formats (SNDRV_PCM_FMTBIT_) */
 757         unsigned int maxbps;    /* supported max. bit per sample */
 758         struct hda_pcm_ops ops;
 759 };
 760
 761 /* PCM types */
 762 enum {
 763         HDA_PCM_TYPE_AUDIO,
 764         HDA_PCM_TYPE_SPDIF,
 765         HDA_PCM_TYPE_HDMI,
 766         HDA_PCM_TYPE_MODEM,
 767         HDA_PCM_NTYPES
 768 };
 769
 770 /* for PCM creation */
 771 struct hda_pcm {
 772         char *name;
 773         struct hda_pcm_stream stream[2];
 774         unsigned int pcm_type;  /* HDA_PCM_TYPE_XXX */
 775         int device;             /* device number to assign */
 776         struct snd_pcm *pcm;    /* assigned PCM instance */
 777 };
 778
 779 /* codec information */
 780 struct hda_codec {
 781         struct hda_bus *bus;
 782         unsigned int addr;      /* codec addr*/
 783         struct list_head list;  /* list point */
 784
 785         hda_nid_t afg;  /* AFG node id */
 786         hda_nid_t mfg;  /* MFG node id */
 787
 788         /* ids */
 789         u8 afg_function_id;
 790         u8 mfg_function_id;
 791         u8 afg_unsol;
 792         u8 mfg_unsol;
 793         u32 vendor_id;
 794         u32 subsystem_id;
 795         u32 revision_id;
 796
 797         /* detected preset */
 798         const struct hda_codec_preset *preset;
 799         struct module *owner;
 800         const char *vendor_name;        /* codec vendor name */
 801         const char *chip_name;          /* codec chip name */
 802         const char *modelname;  /* model name for preset */
 803
 804         /* set by patch */
 805         struct hda_codec_ops patch_ops;
 806
 807         /* PCM to create, set by patch_ops.build_pcms callback */
 808         unsigned int num_pcms;
 809         struct hda_pcm *pcm_info;
 810
 811         /* codec specific info */
 812         void *spec;
 813
 814         /* beep device */
 815         struct hda_beep *beep;
 816         unsigned int beep_mode;
 817
 818         /* widget capabilities cache */
 819         unsigned int num_nodes;
 820         hda_nid_t start_nid;
 821         u32 *wcaps;
 822
 823         struct snd_array mixers;        /* list of assigned mixer elements */
 824         struct snd_array nids;          /* list of mapped mixer elements */
 825
 826         struct hda_cache_rec amp_cache; /* cache for amp access */
 827         struct hda_cache_rec cmd_cache; /* cache for other commands */
 828
 829         struct snd_array conn_lists;    /* connection-list array */
 830
 831         struct mutex spdif_mutex;
 832         struct mutex control_mutex;
 833         struct mutex hash_mutex;
 834         struct snd_array spdif_out;
 835         unsigned int spdif_in_enable;   /* SPDIF input enable? */
 836         const hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
 837         struct snd_array init_pins;     /* initial (BIOS) pin configurations */
 838         struct snd_array driver_pins;   /* pin configs set by codec parser */
 839         struct snd_array cvt_setups;    /* audio convert setups */
 840
 841 #ifdef CONFIG_SND_HDA_HWDEP
 842         struct snd_hwdep *hwdep;        /* assigned hwdep device */
 843         struct snd_array init_verbs;    /* additional init verbs */
 844         struct snd_array hints;         /* additional hints */
 845         struct snd_array user_pins;     /* default pin configs to override */
 846 #endif
 847
 848         /* misc flags */
 849         unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
 850                                              * status change
 851                                              * (e.g. Realtek codecs)
 852                                              */
 853         unsigned int pin_amp_workaround:1; /* pin out-amp takes index
 854                                             * (e.g. Conexant codecs)
 855                                             */
 856         unsigned int single_adc_amp:1; /* adc in-amp takes no index
 857                                         * (e.g. CX20549 codec)
 858                                         */
 859         unsigned int no_sticky_stream:1; /* no sticky-PCM stream assignment */
 860         unsigned int pins_shutup:1;     /* pins are shut up */
 861         unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */
 862         unsigned int ignore_misc_bit:1; /* ignore MISC_NO_PRESENCE bit */
 863         unsigned int no_jack_detect:1;  /* Machine has no jack-detection */
 864         unsigned int pcm_format_first:1; /* PCM format must be set first */
 865 #ifdef CONFIG_SND_HDA_POWER_SAVE
 866         unsigned int power_on :1;       /* current (global) power-state */
 867         int power_transition;   /* power-state in transition */
 868         int power_count;        /* current (global) power refcount */
 869         struct delayed_work power_work; /* delayed task for powerdown */
 870         unsigned long power_on_acct;
 871         unsigned long power_off_acct;
 872         unsigned long power_jiffies;
 873         spinlock_t power_lock;
 874 #endif
 875
 876         /* codec-specific additional proc output */
 877         void (*proc_widget_hook)(struct snd_info_buffer *buffer,
 878                                  struct hda_codec *codec, hda_nid_t nid);
 879
 880         /* jack detection */
 881         struct snd_array jacktbl;
 882
 883 #ifdef CONFIG_SND_HDA_INPUT_JACK
 884         /* jack detection */
 885         struct snd_array jacks;
 886 #endif
 887 };
 888
 889 /* direction */
 890 enum {
 891         HDA_INPUT, HDA_OUTPUT
 892 };
 893
 894
 895 /*
 896  * constructors
 897  */
 898 int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
 899                     struct hda_bus **busp);
 900 int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
 901                       struct hda_codec **codecp);
 902 int snd_hda_codec_configure(struct hda_codec *codec);
 903
 904 /*
 905  * low level functions
 906  */
 907 unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
 908                                 int direct,
 909                                 unsigned int verb, unsigned int parm);
 910 int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
 911                         unsigned int verb, unsigned int parm);
 912 #define snd_hda_param_read(codec, nid, param) \
 913         snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
 914 int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
 915                           hda_nid_t *start_id);
 916 int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
 917                             hda_nid_t *conn_list, int max_conns);
 918 static inline int
 919 snd_hda_get_num_conns(struct hda_codec *codec, hda_nid_t nid)
 920 {
 921         return snd_hda_get_connections(codec, nid, NULL, 0);
 922 }
 923 int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid,
 924                             hda_nid_t *conn_list, int max_conns);
 925 int snd_hda_override_conn_list(struct hda_codec *codec, hda_nid_t nid, int nums,
 926                           const hda_nid_t *list);
 927 int snd_hda_get_conn_index(struct hda_codec *codec, hda_nid_t mux,
 928                            hda_nid_t nid, int recursive);
 929 int snd_hda_query_supported_pcm(struct hda_codec *codec, hda_nid_t nid,
 930                                 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
 931
 932 struct hda_verb {
 933         hda_nid_t nid;
 934         u32 verb;
 935         u32 param;
 936 };
 937
 938 void snd_hda_sequence_write(struct hda_codec *codec,
 939                             const struct hda_verb *seq);
 940
 941 /* unsolicited event */
 942 int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
 943
 944 /* cached write */
 945 #ifdef CONFIG_PM
 946 int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
 947                               int direct, unsigned int verb, unsigned int parm);
 948 void snd_hda_sequence_write_cache(struct hda_codec *codec,
 949                                   const struct hda_verb *seq);
 950 int snd_hda_codec_update_cache(struct hda_codec *codec, hda_nid_t nid,
 951                               int direct, unsigned int verb, unsigned int parm);
 952 void snd_hda_codec_resume_cache(struct hda_codec *codec);
 953 #else
 954 #define snd_hda_codec_write_cache       snd_hda_codec_write
 955 #define snd_hda_codec_update_cache      snd_hda_codec_write
 956 #define snd_hda_sequence_write_cache    snd_hda_sequence_write
 957 #endif
 958
 959 /* the struct for codec->pin_configs */
 960 struct hda_pincfg {
 961         hda_nid_t nid;
 962         unsigned char ctrl;     /* current pin control value */
 963         unsigned char pad;      /* reserved */
 964         unsigned int cfg;       /* default configuration */
 965 };
 966
 967 unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
 968 int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
 969                              unsigned int cfg);
 970 int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
 971                        hda_nid_t nid, unsigned int cfg); /* for hwdep */
 972 void snd_hda_shutup_pins(struct hda_codec *codec);
 973
 974 /* SPDIF controls */
 975 struct hda_spdif_out {
 976         hda_nid_t nid;          /* Converter nid values relate to */
 977         unsigned int status;    /* IEC958 status bits */
 978         unsigned short ctls;    /* SPDIF control bits */
 979 };
 980 struct hda_spdif_out *snd_hda_spdif_out_of_nid(struct hda_codec *codec,
 981                                                hda_nid_t nid);
 982 void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx);
 983 void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid);
 984
 985 /*
 986  * Mixer
 987  */
 988 int snd_hda_build_controls(struct hda_bus *bus);
 989 int snd_hda_codec_build_controls(struct hda_codec *codec);
 990
 991 /*
 992  * PCM
 993  */
 994 int snd_hda_build_pcms(struct hda_bus *bus);
 995 int snd_hda_codec_build_pcms(struct hda_codec *codec);
 996
 997 int snd_hda_codec_prepare(struct hda_codec *codec,
 998                           struct hda_pcm_stream *hinfo,
 999                           unsigned int stream,
1000                           unsigned int format,
1001                           struct snd_pcm_substream *substream);
1002 void snd_hda_codec_cleanup(struct hda_codec *codec,
1003                            struct hda_pcm_stream *hinfo,
1004                            struct snd_pcm_substream *substream);
1005
1006 void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
1007                                 u32 stream_tag,
1008                                 int channel_id, int format);
1009 void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid,
1010                                     int do_now);
1011 #define snd_hda_codec_cleanup_stream(codec, nid) \
1012         __snd_hda_codec_cleanup_stream(codec, nid, 0)
1013 unsigned int snd_hda_calc_stream_format(unsigned int rate,
1014                                         unsigned int channels,
1015                                         unsigned int format,
1016                                         unsigned int maxbps,
1017                                         unsigned short spdif_ctls);
1018 int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
1019                                 unsigned int format);
1020
1021 /*
1022  * Misc
1023  */
1024 void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
1025 void snd_hda_bus_reboot_notify(struct hda_bus *bus);
1026 void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg,
1027                                     unsigned int power_state,
1028                                     bool eapd_workaround);
1029
1030 int snd_hda_lock_devices(struct hda_bus *bus);
1031 void snd_hda_unlock_devices(struct hda_bus *bus);
1032
1033 /*
1034  * power management
1035  */
1036 #ifdef CONFIG_PM
1037 int snd_hda_suspend(struct hda_bus *bus);
1038 int snd_hda_resume(struct hda_bus *bus);
1039 #endif
1040
1041 static inline
1042 int hda_call_check_power_status(struct hda_codec *codec, hda_nid_t nid)
1043 {
1044 #ifdef CONFIG_SND_HDA_POWER_SAVE
1045         if (codec->patch_ops.check_power_status)
1046                 return codec->patch_ops.check_power_status(codec, nid);
1047 #endif
1048         return 0;
1049 }
1050
1051 /*
1052  * get widget information
1053  */
1054 const char *snd_hda_get_jack_connectivity(u32 cfg);
1055 const char *snd_hda_get_jack_type(u32 cfg);
1056 const char *snd_hda_get_jack_location(u32 cfg);
1057
1058 /*
1059  * power saving
1060  */
1061 #ifdef CONFIG_SND_HDA_POWER_SAVE
1062 void snd_hda_power_up(struct hda_codec *codec);
1063 void snd_hda_power_up_d3wait(struct hda_codec *codec);
1064 void snd_hda_power_down(struct hda_codec *codec);
1065 void snd_hda_update_power_acct(struct hda_codec *codec);
1066 #else
1067 static inline void snd_hda_power_up(struct hda_codec *codec) {}
1068 static inline void snd_hda_power_up_d3wait(struct hda_codec *codec) {}
1069 static inline void snd_hda_power_down(struct hda_codec *codec) {}
1070 #endif
1071
1072 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1073 /*
1074  * patch firmware
1075  */
1076 int snd_hda_load_patch(struct hda_bus *bus, const char *patch);
1077 #endif
1078
1079 /*
1080  * Codec modularization
1081  */
1082
1083 /* Export symbols only for communication with codec drivers;
1084  * When built in kernel, all HD-audio drivers are supposed to be statically
1085  * linked to the kernel.  Thus, the symbols don't have to (or shouldn't) be
1086  * exported unless it's built as a module.
1087  */
1088 #ifdef MODULE
1089 #define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
1090 #else
1091 #define EXPORT_SYMBOL_HDA(sym)
1092 #endif
1093
1094 #endif /* __SOUND_HDA_CODEC_H */