3 * hda_intel.c - Implementation of primary alsa driver code base
6 * Copyright(c) 2004 Intel Corporation. All rights reserved.
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the Free
13 * Software Foundation; either version 2 of the License, or (at your option)
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc., 59
23 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 * Matt Jared matt.jared@intel.com
28 * Andy Kopp andy.kopp@intel.com
29 * Dan Kogan dan.d.kogan@intel.com
33 * 2004.12.01 Major rewrite by tiwai, merged the work of pshou
37 #include <linux/delay.h>
38 #include <linux/interrupt.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/moduleparam.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/mutex.h>
48 #include <linux/pm_runtime.h>
49 #include <linux/clocksource.h>
50 #include <linux/time.h>
51 #include <linux/completion.h>
54 /* for snoop control */
55 #include <asm/pgtable.h>
56 #include <asm/cacheflush.h>
58 #include <sound/core.h>
59 #include <sound/initval.h>
60 #include <sound/hdaudio.h>
61 #include <sound/hda_i915.h>
62 #include <linux/vgaarb.h>
63 #include <linux/vga_switcheroo.h>
64 #include <linux/firmware.h>
65 #include "hda_codec.h"
66 #include "hda_controller.h"
67 #include "hda_intel.h"
69 #define CREATE_TRACE_POINTS
70 #include "hda_intel_trace.h"
72 /* position fix mode */
81 /* Defines for ATI HD Audio support in SB450 south bridge */
82 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42
83 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02
85 /* Defines for Nvidia HDA support */
86 #define NVIDIA_HDA_TRANSREG_ADDR 0x4e
87 #define NVIDIA_HDA_ENABLE_COHBITS 0x0f
88 #define NVIDIA_HDA_ISTRM_COH 0x4d
89 #define NVIDIA_HDA_OSTRM_COH 0x4c
90 #define NVIDIA_HDA_ENABLE_COHBIT 0x01
92 /* Defines for Intel SCH HDA snoop control */
93 #define INTEL_SCH_HDA_DEVC 0x78
94 #define INTEL_SCH_HDA_DEVC_NOSNOOP (0x1<<11)
96 /* Define IN stream 0 FIFO size offset in VIA controller */
97 #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
98 /* Define VIA HD Audio Device ID*/
99 #define VIA_HDAC_DEVICE_ID 0x3288
101 /* max number of SDs */
102 /* ICH, ATI and VIA have 4 playback and 4 capture */
103 #define ICH6_NUM_CAPTURE 4
104 #define ICH6_NUM_PLAYBACK 4
106 /* ULI has 6 playback and 5 capture */
107 #define ULI_NUM_CAPTURE 5
108 #define ULI_NUM_PLAYBACK 6
110 /* ATI HDMI may have up to 8 playbacks and 0 capture */
111 #define ATIHDMI_NUM_CAPTURE 0
112 #define ATIHDMI_NUM_PLAYBACK 8
114 /* TERA has 4 playback and 3 capture */
115 #define TERA_NUM_CAPTURE 3
116 #define TERA_NUM_PLAYBACK 4
119 static int index
[SNDRV_CARDS
] = SNDRV_DEFAULT_IDX
;
120 static char *id
[SNDRV_CARDS
] = SNDRV_DEFAULT_STR
;
121 static bool enable
[SNDRV_CARDS
] = SNDRV_DEFAULT_ENABLE_PNP
;
122 static char *model
[SNDRV_CARDS
];
123 static int position_fix
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
-1)] = -1};
124 static int bdl_pos_adj
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
-1)] = -1};
125 static int probe_mask
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
-1)] = -1};
126 static int probe_only
[SNDRV_CARDS
];
127 static int jackpoll_ms
[SNDRV_CARDS
];
128 static bool single_cmd
;
129 static int enable_msi
= -1;
130 #ifdef CONFIG_SND_HDA_PATCH_LOADER
131 static char *patch
[SNDRV_CARDS
];
133 #ifdef CONFIG_SND_HDA_INPUT_BEEP
134 static bool beep_mode
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
-1)] =
135 CONFIG_SND_HDA_INPUT_BEEP_MODE
};
138 module_param_array(index
, int, NULL
, 0444);
139 MODULE_PARM_DESC(index
, "Index value for Intel HD audio interface.");
140 module_param_array(id
, charp
, NULL
, 0444);
141 MODULE_PARM_DESC(id
, "ID string for Intel HD audio interface.");
142 module_param_array(enable
, bool, NULL
, 0444);
143 MODULE_PARM_DESC(enable
, "Enable Intel HD audio interface.");
144 module_param_array(model
, charp
, NULL
, 0444);
145 MODULE_PARM_DESC(model
, "Use the given board model.");
146 module_param_array(position_fix
, int, NULL
, 0444);
147 MODULE_PARM_DESC(position_fix
, "DMA pointer read method."
148 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
149 module_param_array(bdl_pos_adj
, int, NULL
, 0644);
150 MODULE_PARM_DESC(bdl_pos_adj
, "BDL position adjustment offset.");
151 module_param_array(probe_mask
, int, NULL
, 0444);
152 MODULE_PARM_DESC(probe_mask
, "Bitmask to probe codecs (default = -1).");
153 module_param_array(probe_only
, int, NULL
, 0444);
154 MODULE_PARM_DESC(probe_only
, "Only probing and no codec initialization.");
155 module_param_array(jackpoll_ms
, int, NULL
, 0444);
156 MODULE_PARM_DESC(jackpoll_ms
, "Ms between polling for jack events (default = 0, using unsol events only)");
157 module_param(single_cmd
, bool, 0444);
158 MODULE_PARM_DESC(single_cmd
, "Use single command to communicate with codecs "
159 "(for debugging only).");
160 module_param(enable_msi
, bint
, 0444);
161 MODULE_PARM_DESC(enable_msi
, "Enable Message Signaled Interrupt (MSI)");
162 #ifdef CONFIG_SND_HDA_PATCH_LOADER
163 module_param_array(patch
, charp
, NULL
, 0444);
164 MODULE_PARM_DESC(patch
, "Patch file for Intel HD audio interface.");
166 #ifdef CONFIG_SND_HDA_INPUT_BEEP
167 module_param_array(beep_mode
, bool, NULL
, 0444);
168 MODULE_PARM_DESC(beep_mode
, "Select HDA Beep registration mode "
169 "(0=off, 1=on) (default=1).");
173 static int param_set_xint(const char *val
, const struct kernel_param
*kp
);
174 static const struct kernel_param_ops param_ops_xint
= {
175 .set
= param_set_xint
,
176 .get
= param_get_int
,
178 #define param_check_xint param_check_int
180 static int power_save
= CONFIG_SND_HDA_POWER_SAVE_DEFAULT
;
181 module_param(power_save
, xint
, 0644);
182 MODULE_PARM_DESC(power_save
, "Automatic power-saving timeout "
183 "(in second, 0 = disable).");
185 /* reset the HD-audio controller in power save mode.
186 * this may give more power-saving, but will take longer time to
189 static bool power_save_controller
= 1;
190 module_param(power_save_controller
, bool, 0644);
191 MODULE_PARM_DESC(power_save_controller
, "Reset controller in power save mode.");
194 #endif /* CONFIG_PM */
196 static int align_buffer_size
= -1;
197 module_param(align_buffer_size
, bint
, 0644);
198 MODULE_PARM_DESC(align_buffer_size
,
199 "Force buffer and period sizes to be multiple of 128 bytes.");
202 static int hda_snoop
= -1;
203 module_param_named(snoop
, hda_snoop
, bint
, 0444);
204 MODULE_PARM_DESC(snoop
, "Enable/disable snooping");
206 #define hda_snoop true
210 MODULE_LICENSE("GPL");
211 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
245 MODULE_DESCRIPTION("Intel HDA driver");
247 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
248 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
249 #define SUPPORT_VGA_SWITCHEROO
265 AZX_DRIVER_ATIHDMI_NS
,
275 AZX_NUM_DRIVERS
, /* keep this as last entry */
278 #define azx_get_snoop_type(chip) \
279 (((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
280 #define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)
282 /* quirks for old Intel chipsets */
283 #define AZX_DCAPS_INTEL_ICH \
284 (AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
286 /* quirks for Intel PCH */
287 #define AZX_DCAPS_INTEL_PCH_NOPM \
288 (AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
289 AZX_DCAPS_REVERSE_ASSIGN | AZX_DCAPS_SNOOP_TYPE(SCH))
291 #define AZX_DCAPS_INTEL_PCH \
292 (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
294 #define AZX_DCAPS_INTEL_HASWELL \
295 (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
296 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
297 AZX_DCAPS_SNOOP_TYPE(SCH))
299 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
300 #define AZX_DCAPS_INTEL_BROADWELL \
301 (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
302 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
303 AZX_DCAPS_SNOOP_TYPE(SCH))
305 #define AZX_DCAPS_INTEL_BAYTRAIL \
306 (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_I915_POWERWELL)
308 #define AZX_DCAPS_INTEL_BRASWELL \
309 (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_I915_POWERWELL)
311 #define AZX_DCAPS_INTEL_SKYLAKE \
312 (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
313 AZX_DCAPS_I915_POWERWELL)
315 #define AZX_DCAPS_INTEL_BROXTON \
316 (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
317 AZX_DCAPS_I915_POWERWELL)
319 /* quirks for ATI SB / AMD Hudson */
320 #define AZX_DCAPS_PRESET_ATI_SB \
321 (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
322 AZX_DCAPS_SNOOP_TYPE(ATI))
324 /* quirks for ATI/AMD HDMI */
325 #define AZX_DCAPS_PRESET_ATI_HDMI \
326 (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
329 /* quirks for ATI HDMI with snoop off */
330 #define AZX_DCAPS_PRESET_ATI_HDMI_NS \
331 (AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)
333 /* quirks for Nvidia */
334 #define AZX_DCAPS_PRESET_NVIDIA \
335 (AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI | /*AZX_DCAPS_ALIGN_BUFSIZE |*/ \
336 AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
337 AZX_DCAPS_SNOOP_TYPE(NVIDIA))
339 #define AZX_DCAPS_PRESET_CTHDA \
340 (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
341 AZX_DCAPS_NO_64BIT |\
342 AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
345 * vga_switcheroo support
347 #ifdef SUPPORT_VGA_SWITCHEROO
348 #define use_vga_switcheroo(chip) ((chip)->use_vga_switcheroo)
350 #define use_vga_switcheroo(chip) 0
353 #define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
354 ((pci)->device == 0x0c0c) || \
355 ((pci)->device == 0x0d0c) || \
356 ((pci)->device == 0x160c))
358 #define IS_BROXTON(pci) ((pci)->device == 0x5a98)
360 static char *driver_short_names
[] = {
361 [AZX_DRIVER_ICH
] = "HDA Intel",
362 [AZX_DRIVER_PCH
] = "HDA Intel PCH",
363 [AZX_DRIVER_SCH
] = "HDA Intel MID",
364 [AZX_DRIVER_HDMI
] = "HDA Intel HDMI",
365 [AZX_DRIVER_ATI
] = "HDA ATI SB",
366 [AZX_DRIVER_ATIHDMI
] = "HDA ATI HDMI",
367 [AZX_DRIVER_ATIHDMI_NS
] = "HDA ATI HDMI",
368 [AZX_DRIVER_VIA
] = "HDA VIA VT82xx",
369 [AZX_DRIVER_SIS
] = "HDA SIS966",
370 [AZX_DRIVER_ULI
] = "HDA ULI M5461",
371 [AZX_DRIVER_NVIDIA
] = "HDA NVidia",
372 [AZX_DRIVER_TERA
] = "HDA Teradici",
373 [AZX_DRIVER_CTX
] = "HDA Creative",
374 [AZX_DRIVER_CTHDA
] = "HDA Creative",
375 [AZX_DRIVER_CMEDIA
] = "HDA C-Media",
376 [AZX_DRIVER_GENERIC
] = "HD-Audio Generic",
380 static void __mark_pages_wc(struct azx
*chip
, struct snd_dma_buffer
*dmab
, bool on
)
386 if (!dmab
|| !dmab
->area
|| !dmab
->bytes
)
389 #ifdef CONFIG_SND_DMA_SGBUF
390 if (dmab
->dev
.type
== SNDRV_DMA_TYPE_DEV_SG
) {
391 struct snd_sg_buf
*sgbuf
= dmab
->private_data
;
392 if (chip
->driver_type
== AZX_DRIVER_CMEDIA
)
393 return; /* deal with only CORB/RIRB buffers */
395 set_pages_array_wc(sgbuf
->page_table
, sgbuf
->pages
);
397 set_pages_array_wb(sgbuf
->page_table
, sgbuf
->pages
);
402 pages
= (dmab
->bytes
+ PAGE_SIZE
- 1) >> PAGE_SHIFT
;
404 set_memory_wc((unsigned long)dmab
->area
, pages
);
406 set_memory_wb((unsigned long)dmab
->area
, pages
);
409 static inline void mark_pages_wc(struct azx
*chip
, struct snd_dma_buffer
*buf
,
412 __mark_pages_wc(chip
, buf
, on
);
414 static inline void mark_runtime_wc(struct azx
*chip
, struct azx_dev
*azx_dev
,
415 struct snd_pcm_substream
*substream
, bool on
)
417 if (azx_dev
->wc_marked
!= on
) {
418 __mark_pages_wc(chip
, snd_pcm_get_dma_buf(substream
), on
);
419 azx_dev
->wc_marked
= on
;
423 /* NOP for other archs */
424 static inline void mark_pages_wc(struct azx
*chip
, struct snd_dma_buffer
*buf
,
428 static inline void mark_runtime_wc(struct azx
*chip
, struct azx_dev
*azx_dev
,
429 struct snd_pcm_substream
*substream
, bool on
)
434 static int azx_acquire_irq(struct azx
*chip
, int do_disconnect
);
437 * initialize the PCI registers
439 /* update bits in a PCI register byte */
440 static void update_pci_byte(struct pci_dev
*pci
, unsigned int reg
,
441 unsigned char mask
, unsigned char val
)
445 pci_read_config_byte(pci
, reg
, &data
);
447 data
|= (val
& mask
);
448 pci_write_config_byte(pci
, reg
, data
);
451 static void azx_init_pci(struct azx
*chip
)
453 int snoop_type
= azx_get_snoop_type(chip
);
455 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
456 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
457 * Ensuring these bits are 0 clears playback static on some HD Audio
459 * The PCI register TCSEL is defined in the Intel manuals.
461 if (!(chip
->driver_caps
& AZX_DCAPS_NO_TCSEL
)) {
462 dev_dbg(chip
->card
->dev
, "Clearing TCSEL\n");
463 update_pci_byte(chip
->pci
, AZX_PCIREG_TCSEL
, 0x07, 0);
466 /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
467 * we need to enable snoop.
469 if (snoop_type
== AZX_SNOOP_TYPE_ATI
) {
470 dev_dbg(chip
->card
->dev
, "Setting ATI snoop: %d\n",
472 update_pci_byte(chip
->pci
,
473 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR
, 0x07,
474 azx_snoop(chip
) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP
: 0);
477 /* For NVIDIA HDA, enable snoop */
478 if (snoop_type
== AZX_SNOOP_TYPE_NVIDIA
) {
479 dev_dbg(chip
->card
->dev
, "Setting Nvidia snoop: %d\n",
481 update_pci_byte(chip
->pci
,
482 NVIDIA_HDA_TRANSREG_ADDR
,
483 0x0f, NVIDIA_HDA_ENABLE_COHBITS
);
484 update_pci_byte(chip
->pci
,
485 NVIDIA_HDA_ISTRM_COH
,
486 0x01, NVIDIA_HDA_ENABLE_COHBIT
);
487 update_pci_byte(chip
->pci
,
488 NVIDIA_HDA_OSTRM_COH
,
489 0x01, NVIDIA_HDA_ENABLE_COHBIT
);
492 /* Enable SCH/PCH snoop if needed */
493 if (snoop_type
== AZX_SNOOP_TYPE_SCH
) {
494 unsigned short snoop
;
495 pci_read_config_word(chip
->pci
, INTEL_SCH_HDA_DEVC
, &snoop
);
496 if ((!azx_snoop(chip
) && !(snoop
& INTEL_SCH_HDA_DEVC_NOSNOOP
)) ||
497 (azx_snoop(chip
) && (snoop
& INTEL_SCH_HDA_DEVC_NOSNOOP
))) {
498 snoop
&= ~INTEL_SCH_HDA_DEVC_NOSNOOP
;
499 if (!azx_snoop(chip
))
500 snoop
|= INTEL_SCH_HDA_DEVC_NOSNOOP
;
501 pci_write_config_word(chip
->pci
, INTEL_SCH_HDA_DEVC
, snoop
);
502 pci_read_config_word(chip
->pci
,
503 INTEL_SCH_HDA_DEVC
, &snoop
);
505 dev_dbg(chip
->card
->dev
, "SCH snoop: %s\n",
506 (snoop
& INTEL_SCH_HDA_DEVC_NOSNOOP
) ?
507 "Disabled" : "Enabled");
512 * In BXT-P A0, HD-Audio DMA requests is later than expected,
513 * and makes an audio stream sensitive to system latencies when
514 * 24/32 bits are playing.
515 * Adjusting threshold of DMA fifo to force the DMA request
516 * sooner to improve latency tolerance at the expense of power.
518 static void bxt_reduce_dma_latency(struct azx
*chip
)
522 val
= azx_readl(chip
, SKL_EM4L
);
524 azx_writel(chip
, SKL_EM4L
, val
);
527 static void hda_intel_init_chip(struct azx
*chip
, bool full_reset
)
529 struct hdac_bus
*bus
= azx_bus(chip
);
530 struct pci_dev
*pci
= chip
->pci
;
532 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
)
533 snd_hdac_set_codec_wakeup(bus
, true);
534 azx_init_chip(chip
, full_reset
);
535 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
)
536 snd_hdac_set_codec_wakeup(bus
, false);
538 /* reduce dma latency to avoid noise */
540 bxt_reduce_dma_latency(chip
);
543 /* calculate runtime delay from LPIB */
544 static int azx_get_delay_from_lpib(struct azx
*chip
, struct azx_dev
*azx_dev
,
547 struct snd_pcm_substream
*substream
= azx_dev
->core
.substream
;
548 int stream
= substream
->stream
;
549 unsigned int lpib_pos
= azx_get_pos_lpib(chip
, azx_dev
);
552 if (stream
== SNDRV_PCM_STREAM_PLAYBACK
)
553 delay
= pos
- lpib_pos
;
555 delay
= lpib_pos
- pos
;
557 if (delay
>= azx_dev
->core
.delay_negative_threshold
)
560 delay
+= azx_dev
->core
.bufsize
;
563 if (delay
>= azx_dev
->core
.period_bytes
) {
564 dev_info(chip
->card
->dev
,
565 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
566 delay
, azx_dev
->core
.period_bytes
);
568 chip
->driver_caps
&= ~AZX_DCAPS_COUNT_LPIB_DELAY
;
569 chip
->get_delay
[stream
] = NULL
;
572 return bytes_to_frames(substream
->runtime
, delay
);
575 static int azx_position_ok(struct azx
*chip
, struct azx_dev
*azx_dev
);
577 /* called from IRQ */
578 static int azx_position_check(struct azx
*chip
, struct azx_dev
*azx_dev
)
580 struct hda_intel
*hda
= container_of(chip
, struct hda_intel
, chip
);
583 ok
= azx_position_ok(chip
, azx_dev
);
585 azx_dev
->irq_pending
= 0;
587 } else if (ok
== 0) {
588 /* bogus IRQ, process it later */
589 azx_dev
->irq_pending
= 1;
590 schedule_work(&hda
->irq_pending_work
);
595 /* Enable/disable i915 display power for the link */
596 static int azx_intel_link_power(struct azx
*chip
, bool enable
)
598 struct hdac_bus
*bus
= azx_bus(chip
);
600 return snd_hdac_display_power(bus
, enable
);
604 * Check whether the current DMA position is acceptable for updating
605 * periods. Returns non-zero if it's OK.
607 * Many HD-audio controllers appear pretty inaccurate about
608 * the update-IRQ timing. The IRQ is issued before actually the
609 * data is processed. So, we need to process it afterwords in a
612 static int azx_position_ok(struct azx
*chip
, struct azx_dev
*azx_dev
)
614 struct snd_pcm_substream
*substream
= azx_dev
->core
.substream
;
615 int stream
= substream
->stream
;
619 wallclk
= azx_readl(chip
, WALLCLK
) - azx_dev
->core
.start_wallclk
;
620 if (wallclk
< (azx_dev
->core
.period_wallclk
* 2) / 3)
621 return -1; /* bogus (too early) interrupt */
623 if (chip
->get_position
[stream
])
624 pos
= chip
->get_position
[stream
](chip
, azx_dev
);
625 else { /* use the position buffer as default */
626 pos
= azx_get_pos_posbuf(chip
, azx_dev
);
627 if (!pos
|| pos
== (u32
)-1) {
628 dev_info(chip
->card
->dev
,
629 "Invalid position buffer, using LPIB read method instead.\n");
630 chip
->get_position
[stream
] = azx_get_pos_lpib
;
631 if (chip
->get_position
[0] == azx_get_pos_lpib
&&
632 chip
->get_position
[1] == azx_get_pos_lpib
)
633 azx_bus(chip
)->use_posbuf
= false;
634 pos
= azx_get_pos_lpib(chip
, azx_dev
);
635 chip
->get_delay
[stream
] = NULL
;
637 chip
->get_position
[stream
] = azx_get_pos_posbuf
;
638 if (chip
->driver_caps
& AZX_DCAPS_COUNT_LPIB_DELAY
)
639 chip
->get_delay
[stream
] = azx_get_delay_from_lpib
;
643 if (pos
>= azx_dev
->core
.bufsize
)
646 if (WARN_ONCE(!azx_dev
->core
.period_bytes
,
647 "hda-intel: zero azx_dev->period_bytes"))
648 return -1; /* this shouldn't happen! */
649 if (wallclk
< (azx_dev
->core
.period_wallclk
* 5) / 4 &&
650 pos
% azx_dev
->core
.period_bytes
> azx_dev
->core
.period_bytes
/ 2)
651 /* NG - it's below the first next period boundary */
652 return chip
->bdl_pos_adj
[chip
->dev_index
] ? 0 : -1;
653 azx_dev
->core
.start_wallclk
+= wallclk
;
654 return 1; /* OK, it's fine */
658 * The work for pending PCM period updates.
660 static void azx_irq_pending_work(struct work_struct
*work
)
662 struct hda_intel
*hda
= container_of(work
, struct hda_intel
, irq_pending_work
);
663 struct azx
*chip
= &hda
->chip
;
664 struct hdac_bus
*bus
= azx_bus(chip
);
665 struct hdac_stream
*s
;
668 if (!hda
->irq_pending_warned
) {
669 dev_info(chip
->card
->dev
,
670 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
672 hda
->irq_pending_warned
= 1;
677 spin_lock_irq(&bus
->reg_lock
);
678 list_for_each_entry(s
, &bus
->stream_list
, list
) {
679 struct azx_dev
*azx_dev
= stream_to_azx_dev(s
);
680 if (!azx_dev
->irq_pending
||
684 ok
= azx_position_ok(chip
, azx_dev
);
686 azx_dev
->irq_pending
= 0;
687 spin_unlock(&bus
->reg_lock
);
688 snd_pcm_period_elapsed(s
->substream
);
689 spin_lock(&bus
->reg_lock
);
691 pending
= 0; /* too early */
695 spin_unlock_irq(&bus
->reg_lock
);
702 /* clear irq_pending flags and assure no on-going workq */
703 static void azx_clear_irq_pending(struct azx
*chip
)
705 struct hdac_bus
*bus
= azx_bus(chip
);
706 struct hdac_stream
*s
;
708 spin_lock_irq(&bus
->reg_lock
);
709 list_for_each_entry(s
, &bus
->stream_list
, list
) {
710 struct azx_dev
*azx_dev
= stream_to_azx_dev(s
);
711 azx_dev
->irq_pending
= 0;
713 spin_unlock_irq(&bus
->reg_lock
);
716 static int azx_acquire_irq(struct azx
*chip
, int do_disconnect
)
718 struct hdac_bus
*bus
= azx_bus(chip
);
720 if (request_irq(chip
->pci
->irq
, azx_interrupt
,
721 chip
->msi
? 0 : IRQF_SHARED
,
722 KBUILD_MODNAME
, chip
)) {
723 dev_err(chip
->card
->dev
,
724 "unable to grab IRQ %d, disabling device\n",
727 snd_card_disconnect(chip
->card
);
730 bus
->irq
= chip
->pci
->irq
;
731 pci_intx(chip
->pci
, !chip
->msi
);
735 /* get the current DMA position with correction on VIA chips */
736 static unsigned int azx_via_get_position(struct azx
*chip
,
737 struct azx_dev
*azx_dev
)
739 unsigned int link_pos
, mini_pos
, bound_pos
;
740 unsigned int mod_link_pos
, mod_dma_pos
, mod_mini_pos
;
741 unsigned int fifo_size
;
743 link_pos
= snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev
));
744 if (azx_dev
->core
.substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) {
745 /* Playback, no problem using link position */
751 * use mod to get the DMA position just like old chipset
753 mod_dma_pos
= le32_to_cpu(*azx_dev
->core
.posbuf
);
754 mod_dma_pos
%= azx_dev
->core
.period_bytes
;
756 /* azx_dev->fifo_size can't get FIFO size of in stream.
757 * Get from base address + offset.
759 fifo_size
= readw(azx_bus(chip
)->remap_addr
+
760 VIA_IN_STREAM0_FIFO_SIZE_OFFSET
);
762 if (azx_dev
->insufficient
) {
763 /* Link position never gather than FIFO size */
764 if (link_pos
<= fifo_size
)
767 azx_dev
->insufficient
= 0;
770 if (link_pos
<= fifo_size
)
771 mini_pos
= azx_dev
->core
.bufsize
+ link_pos
- fifo_size
;
773 mini_pos
= link_pos
- fifo_size
;
775 /* Find nearest previous boudary */
776 mod_mini_pos
= mini_pos
% azx_dev
->core
.period_bytes
;
777 mod_link_pos
= link_pos
% azx_dev
->core
.period_bytes
;
778 if (mod_link_pos
>= fifo_size
)
779 bound_pos
= link_pos
- mod_link_pos
;
780 else if (mod_dma_pos
>= mod_mini_pos
)
781 bound_pos
= mini_pos
- mod_mini_pos
;
783 bound_pos
= mini_pos
- mod_mini_pos
+ azx_dev
->core
.period_bytes
;
784 if (bound_pos
>= azx_dev
->core
.bufsize
)
788 /* Calculate real DMA position we want */
789 return bound_pos
+ mod_dma_pos
;
793 static DEFINE_MUTEX(card_list_lock
);
794 static LIST_HEAD(card_list
);
796 static void azx_add_card_list(struct azx
*chip
)
798 struct hda_intel
*hda
= container_of(chip
, struct hda_intel
, chip
);
799 mutex_lock(&card_list_lock
);
800 list_add(&hda
->list
, &card_list
);
801 mutex_unlock(&card_list_lock
);
804 static void azx_del_card_list(struct azx
*chip
)
806 struct hda_intel
*hda
= container_of(chip
, struct hda_intel
, chip
);
807 mutex_lock(&card_list_lock
);
808 list_del_init(&hda
->list
);
809 mutex_unlock(&card_list_lock
);
812 /* trigger power-save check at writing parameter */
813 static int param_set_xint(const char *val
, const struct kernel_param
*kp
)
815 struct hda_intel
*hda
;
817 int prev
= power_save
;
818 int ret
= param_set_int(val
, kp
);
820 if (ret
|| prev
== power_save
)
823 mutex_lock(&card_list_lock
);
824 list_for_each_entry(hda
, &card_list
, list
) {
826 if (!hda
->probe_continued
|| chip
->disabled
)
828 snd_hda_set_power_save(&chip
->bus
, power_save
* 1000);
830 mutex_unlock(&card_list_lock
);
834 #define azx_add_card_list(chip) /* NOP */
835 #define azx_del_card_list(chip) /* NOP */
836 #endif /* CONFIG_PM */
838 /* Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
839 * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value)
840 * are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
841 * BCLK = CDCLK * M / N
842 * The values will be lost when the display power well is disabled and need to
843 * be restored to avoid abnormal playback speed.
845 static void haswell_set_bclk(struct hda_intel
*hda
)
847 struct azx
*chip
= &hda
->chip
;
849 unsigned int bclk_m
, bclk_n
;
851 if (!hda
->need_i915_power
)
854 cdclk_freq
= snd_hdac_get_display_clk(azx_bus(chip
));
855 switch (cdclk_freq
) {
862 default: /* default CDCLK 450MHz */
878 azx_writew(chip
, HSW_EM4
, bclk_m
);
879 azx_writew(chip
, HSW_EM5
, bclk_n
);
882 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
886 static int azx_suspend(struct device
*dev
)
888 struct snd_card
*card
= dev_get_drvdata(dev
);
890 struct hda_intel
*hda
;
891 struct hdac_bus
*bus
;
896 chip
= card
->private_data
;
897 hda
= container_of(chip
, struct hda_intel
, chip
);
898 if (chip
->disabled
|| hda
->init_failed
|| !chip
->running
)
902 snd_power_change_state(card
, SNDRV_CTL_POWER_D3hot
);
903 azx_clear_irq_pending(chip
);
905 azx_enter_link_reset(chip
);
907 free_irq(bus
->irq
, chip
);
912 pci_disable_msi(chip
->pci
);
913 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
914 && hda
->need_i915_power
)
915 snd_hdac_display_power(bus
, false);
917 trace_azx_suspend(chip
);
921 static int azx_resume(struct device
*dev
)
923 struct pci_dev
*pci
= to_pci_dev(dev
);
924 struct snd_card
*card
= dev_get_drvdata(dev
);
926 struct hda_intel
*hda
;
931 chip
= card
->private_data
;
932 hda
= container_of(chip
, struct hda_intel
, chip
);
933 if (chip
->disabled
|| hda
->init_failed
|| !chip
->running
)
936 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
937 && hda
->need_i915_power
) {
938 snd_hdac_display_power(azx_bus(chip
), true);
939 haswell_set_bclk(hda
);
942 if (pci_enable_msi(pci
) < 0)
944 if (azx_acquire_irq(chip
, 1) < 0)
948 hda_intel_init_chip(chip
, true);
950 snd_power_change_state(card
, SNDRV_CTL_POWER_D0
);
952 trace_azx_resume(chip
);
955 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
958 static int azx_runtime_suspend(struct device
*dev
)
960 struct snd_card
*card
= dev_get_drvdata(dev
);
962 struct hda_intel
*hda
;
967 chip
= card
->private_data
;
968 hda
= container_of(chip
, struct hda_intel
, chip
);
969 if (chip
->disabled
|| hda
->init_failed
)
972 if (!azx_has_pm_runtime(chip
))
975 /* enable controller wake up event */
976 azx_writew(chip
, WAKEEN
, azx_readw(chip
, WAKEEN
) |
980 azx_enter_link_reset(chip
);
981 azx_clear_irq_pending(chip
);
982 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
983 && hda
->need_i915_power
)
984 snd_hdac_display_power(azx_bus(chip
), false);
986 trace_azx_runtime_suspend(chip
);
990 static int azx_runtime_resume(struct device
*dev
)
992 struct snd_card
*card
= dev_get_drvdata(dev
);
994 struct hda_intel
*hda
;
995 struct hdac_bus
*bus
;
996 struct hda_codec
*codec
;
1002 chip
= card
->private_data
;
1003 hda
= container_of(chip
, struct hda_intel
, chip
);
1004 if (chip
->disabled
|| hda
->init_failed
)
1007 if (!azx_has_pm_runtime(chip
))
1010 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
) {
1011 bus
= azx_bus(chip
);
1012 if (hda
->need_i915_power
) {
1013 snd_hdac_display_power(bus
, true);
1014 haswell_set_bclk(hda
);
1016 /* toggle codec wakeup bit for STATESTS read */
1017 snd_hdac_set_codec_wakeup(bus
, true);
1018 snd_hdac_set_codec_wakeup(bus
, false);
1022 /* Read STATESTS before controller reset */
1023 status
= azx_readw(chip
, STATESTS
);
1026 hda_intel_init_chip(chip
, true);
1029 list_for_each_codec(codec
, &chip
->bus
)
1030 if (status
& (1 << codec
->addr
))
1031 schedule_delayed_work(&codec
->jackpoll_work
,
1032 codec
->jackpoll_interval
);
1035 /* disable controller Wake Up event*/
1036 azx_writew(chip
, WAKEEN
, azx_readw(chip
, WAKEEN
) &
1037 ~STATESTS_INT_MASK
);
1039 trace_azx_runtime_resume(chip
);
1043 static int azx_runtime_idle(struct device
*dev
)
1045 struct snd_card
*card
= dev_get_drvdata(dev
);
1047 struct hda_intel
*hda
;
1052 chip
= card
->private_data
;
1053 hda
= container_of(chip
, struct hda_intel
, chip
);
1054 if (chip
->disabled
|| hda
->init_failed
)
1057 if (!power_save_controller
|| !azx_has_pm_runtime(chip
) ||
1058 azx_bus(chip
)->codec_powered
|| !chip
->running
)
1064 static const struct dev_pm_ops azx_pm
= {
1065 SET_SYSTEM_SLEEP_PM_OPS(azx_suspend
, azx_resume
)
1066 SET_RUNTIME_PM_OPS(azx_runtime_suspend
, azx_runtime_resume
, azx_runtime_idle
)
1069 #define AZX_PM_OPS &azx_pm
1071 #define AZX_PM_OPS NULL
1072 #endif /* CONFIG_PM */
1075 static int azx_probe_continue(struct azx
*chip
);
1077 #ifdef SUPPORT_VGA_SWITCHEROO
1078 static struct pci_dev
*get_bound_vga(struct pci_dev
*pci
);
1080 static void azx_vs_set_state(struct pci_dev
*pci
,
1081 enum vga_switcheroo_state state
)
1083 struct snd_card
*card
= pci_get_drvdata(pci
);
1084 struct azx
*chip
= card
->private_data
;
1085 struct hda_intel
*hda
= container_of(chip
, struct hda_intel
, chip
);
1088 wait_for_completion(&hda
->probe_wait
);
1089 if (hda
->init_failed
)
1092 disabled
= (state
== VGA_SWITCHEROO_OFF
);
1093 if (chip
->disabled
== disabled
)
1096 if (!hda
->probe_continued
) {
1097 chip
->disabled
= disabled
;
1099 dev_info(chip
->card
->dev
,
1100 "Start delayed initialization\n");
1101 if (azx_probe_continue(chip
) < 0) {
1102 dev_err(chip
->card
->dev
, "initialization error\n");
1103 hda
->init_failed
= true;
1107 dev_info(chip
->card
->dev
, "%s via vga_switcheroo\n",
1108 disabled
? "Disabling" : "Enabling");
1110 pm_runtime_put_sync_suspend(card
->dev
);
1111 azx_suspend(card
->dev
);
1112 /* when we get suspended by vga_switcheroo we end up in D3cold,
1113 * however we have no ACPI handle, so pci/acpi can't put us there,
1114 * put ourselves there */
1115 pci
->current_state
= PCI_D3cold
;
1116 chip
->disabled
= true;
1117 if (snd_hda_lock_devices(&chip
->bus
))
1118 dev_warn(chip
->card
->dev
,
1119 "Cannot lock devices!\n");
1121 snd_hda_unlock_devices(&chip
->bus
);
1122 pm_runtime_get_noresume(card
->dev
);
1123 chip
->disabled
= false;
1124 azx_resume(card
->dev
);
1129 static bool azx_vs_can_switch(struct pci_dev
*pci
)
1131 struct snd_card
*card
= pci_get_drvdata(pci
);
1132 struct azx
*chip
= card
->private_data
;
1133 struct hda_intel
*hda
= container_of(chip
, struct hda_intel
, chip
);
1135 wait_for_completion(&hda
->probe_wait
);
1136 if (hda
->init_failed
)
1138 if (chip
->disabled
|| !hda
->probe_continued
)
1140 if (snd_hda_lock_devices(&chip
->bus
))
1142 snd_hda_unlock_devices(&chip
->bus
);
1146 static void init_vga_switcheroo(struct azx
*chip
)
1148 struct hda_intel
*hda
= container_of(chip
, struct hda_intel
, chip
);
1149 struct pci_dev
*p
= get_bound_vga(chip
->pci
);
1151 dev_info(chip
->card
->dev
,
1152 "Handle vga_switcheroo audio client\n");
1153 hda
->use_vga_switcheroo
= 1;
1158 static const struct vga_switcheroo_client_ops azx_vs_ops
= {
1159 .set_gpu_state
= azx_vs_set_state
,
1160 .can_switch
= azx_vs_can_switch
,
1163 static int register_vga_switcheroo(struct azx
*chip
)
1165 struct hda_intel
*hda
= container_of(chip
, struct hda_intel
, chip
);
1168 if (!hda
->use_vga_switcheroo
)
1170 /* FIXME: currently only handling DIS controller
1171 * is there any machine with two switchable HDMI audio controllers?
1173 err
= vga_switcheroo_register_audio_client(chip
->pci
, &azx_vs_ops
,
1174 VGA_SWITCHEROO_DIS
);
1177 hda
->vga_switcheroo_registered
= 1;
1179 /* register as an optimus hdmi audio power domain */
1180 vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip
->card
->dev
,
1181 &hda
->hdmi_pm_domain
);
1185 #define init_vga_switcheroo(chip) /* NOP */
1186 #define register_vga_switcheroo(chip) 0
1187 #define check_hdmi_disabled(pci) false
1188 #endif /* SUPPORT_VGA_SWITCHER */
1193 static int azx_free(struct azx
*chip
)
1195 struct pci_dev
*pci
= chip
->pci
;
1196 struct hda_intel
*hda
= container_of(chip
, struct hda_intel
, chip
);
1197 struct hdac_bus
*bus
= azx_bus(chip
);
1199 if (azx_has_pm_runtime(chip
) && chip
->running
)
1200 pm_runtime_get_noresume(&pci
->dev
);
1202 azx_del_card_list(chip
);
1204 hda
->init_failed
= 1; /* to be sure */
1205 complete_all(&hda
->probe_wait
);
1207 if (use_vga_switcheroo(hda
)) {
1208 if (chip
->disabled
&& hda
->probe_continued
)
1209 snd_hda_unlock_devices(&chip
->bus
);
1210 if (hda
->vga_switcheroo_registered
)
1211 vga_switcheroo_unregister_client(chip
->pci
);
1214 if (bus
->chip_init
) {
1215 azx_clear_irq_pending(chip
);
1216 azx_stop_all_streams(chip
);
1217 azx_stop_chip(chip
);
1221 free_irq(bus
->irq
, (void*)chip
);
1223 pci_disable_msi(chip
->pci
);
1224 iounmap(bus
->remap_addr
);
1226 azx_free_stream_pages(chip
);
1227 azx_free_streams(chip
);
1228 snd_hdac_bus_exit(bus
);
1230 if (chip
->region_requested
)
1231 pci_release_regions(chip
->pci
);
1233 pci_disable_device(chip
->pci
);
1234 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1235 release_firmware(chip
->fw
);
1238 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
) {
1239 if (hda
->need_i915_power
)
1240 snd_hdac_display_power(bus
, false);
1241 snd_hdac_i915_exit(bus
);
1248 static int azx_dev_disconnect(struct snd_device
*device
)
1250 struct azx
*chip
= device
->device_data
;
1252 chip
->bus
.shutdown
= 1;
1256 static int azx_dev_free(struct snd_device
*device
)
1258 return azx_free(device
->device_data
);
1261 #ifdef SUPPORT_VGA_SWITCHEROO
1263 * Check of disabled HDMI controller by vga_switcheroo
1265 static struct pci_dev
*get_bound_vga(struct pci_dev
*pci
)
1269 /* check only discrete GPU */
1270 switch (pci
->vendor
) {
1271 case PCI_VENDOR_ID_ATI
:
1272 case PCI_VENDOR_ID_AMD
:
1273 case PCI_VENDOR_ID_NVIDIA
:
1274 if (pci
->devfn
== 1) {
1275 p
= pci_get_domain_bus_and_slot(pci_domain_nr(pci
->bus
),
1276 pci
->bus
->number
, 0);
1278 if ((p
->class >> 8) == PCI_CLASS_DISPLAY_VGA
)
1288 static bool check_hdmi_disabled(struct pci_dev
*pci
)
1290 bool vga_inactive
= false;
1291 struct pci_dev
*p
= get_bound_vga(pci
);
1294 if (vga_switcheroo_get_client_state(p
) == VGA_SWITCHEROO_OFF
)
1295 vga_inactive
= true;
1298 return vga_inactive
;
1300 #endif /* SUPPORT_VGA_SWITCHEROO */
1303 * white/black-listing for position_fix
1305 static struct snd_pci_quirk position_fix_list
[] = {
1306 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB
),
1307 SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB
),
1308 SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB
),
1309 SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB
),
1310 SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB
),
1311 SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB
),
1312 SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB
),
1313 SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB
),
1314 SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB
),
1315 SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB
),
1316 SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB
),
1317 SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB
),
1318 SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB
),
1319 SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB
),
1323 static int check_position_fix(struct azx
*chip
, int fix
)
1325 const struct snd_pci_quirk
*q
;
1330 case POS_FIX_POSBUF
:
1331 case POS_FIX_VIACOMBO
:
1336 q
= snd_pci_quirk_lookup(chip
->pci
, position_fix_list
);
1338 dev_info(chip
->card
->dev
,
1339 "position_fix set to %d for device %04x:%04x\n",
1340 q
->value
, q
->subvendor
, q
->subdevice
);
1344 /* Check VIA/ATI HD Audio Controller exist */
1345 if (chip
->driver_caps
& AZX_DCAPS_POSFIX_VIA
) {
1346 dev_dbg(chip
->card
->dev
, "Using VIACOMBO position fix\n");
1347 return POS_FIX_VIACOMBO
;
1349 if (chip
->driver_caps
& AZX_DCAPS_POSFIX_LPIB
) {
1350 dev_dbg(chip
->card
->dev
, "Using LPIB position fix\n");
1351 return POS_FIX_LPIB
;
1353 return POS_FIX_AUTO
;
1356 static void assign_position_fix(struct azx
*chip
, int fix
)
1358 static azx_get_pos_callback_t callbacks
[] = {
1359 [POS_FIX_AUTO
] = NULL
,
1360 [POS_FIX_LPIB
] = azx_get_pos_lpib
,
1361 [POS_FIX_POSBUF
] = azx_get_pos_posbuf
,
1362 [POS_FIX_VIACOMBO
] = azx_via_get_position
,
1363 [POS_FIX_COMBO
] = azx_get_pos_lpib
,
1366 chip
->get_position
[0] = chip
->get_position
[1] = callbacks
[fix
];
1368 /* combo mode uses LPIB only for playback */
1369 if (fix
== POS_FIX_COMBO
)
1370 chip
->get_position
[1] = NULL
;
1372 if (fix
== POS_FIX_POSBUF
&&
1373 (chip
->driver_caps
& AZX_DCAPS_COUNT_LPIB_DELAY
)) {
1374 chip
->get_delay
[0] = chip
->get_delay
[1] =
1375 azx_get_delay_from_lpib
;
1381 * black-lists for probe_mask
1383 static struct snd_pci_quirk probe_mask_list
[] = {
1384 /* Thinkpad often breaks the controller communication when accessing
1385 * to the non-working (or non-existing) modem codec slot.
1387 SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1388 SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1389 SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1391 SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1392 /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1393 SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1394 /* forced codec slots */
1395 SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1396 SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1397 /* WinFast VP200 H (Teradici) user reported broken communication */
1398 SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1402 #define AZX_FORCE_CODEC_MASK 0x100
1404 static void check_probe_mask(struct azx
*chip
, int dev
)
1406 const struct snd_pci_quirk
*q
;
1408 chip
->codec_probe_mask
= probe_mask
[dev
];
1409 if (chip
->codec_probe_mask
== -1) {
1410 q
= snd_pci_quirk_lookup(chip
->pci
, probe_mask_list
);
1412 dev_info(chip
->card
->dev
,
1413 "probe_mask set to 0x%x for device %04x:%04x\n",
1414 q
->value
, q
->subvendor
, q
->subdevice
);
1415 chip
->codec_probe_mask
= q
->value
;
1419 /* check forced option */
1420 if (chip
->codec_probe_mask
!= -1 &&
1421 (chip
->codec_probe_mask
& AZX_FORCE_CODEC_MASK
)) {
1422 azx_bus(chip
)->codec_mask
= chip
->codec_probe_mask
& 0xff;
1423 dev_info(chip
->card
->dev
, "codec_mask forced to 0x%x\n",
1424 (int)azx_bus(chip
)->codec_mask
);
1429 * white/black-list for enable_msi
1431 static struct snd_pci_quirk msi_black_list
[] = {
1432 SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1433 SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1434 SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1435 SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1436 SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1437 SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1438 SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1439 SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1440 SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1441 SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1445 static void check_msi(struct azx
*chip
)
1447 const struct snd_pci_quirk
*q
;
1449 if (enable_msi
>= 0) {
1450 chip
->msi
= !!enable_msi
;
1453 chip
->msi
= 1; /* enable MSI as default */
1454 q
= snd_pci_quirk_lookup(chip
->pci
, msi_black_list
);
1456 dev_info(chip
->card
->dev
,
1457 "msi for device %04x:%04x set to %d\n",
1458 q
->subvendor
, q
->subdevice
, q
->value
);
1459 chip
->msi
= q
->value
;
1463 /* NVidia chipsets seem to cause troubles with MSI */
1464 if (chip
->driver_caps
& AZX_DCAPS_NO_MSI
) {
1465 dev_info(chip
->card
->dev
, "Disabling MSI\n");
1470 /* check the snoop mode availability */
1471 static void azx_check_snoop_available(struct azx
*chip
)
1473 int snoop
= hda_snoop
;
1476 dev_info(chip
->card
->dev
, "Force to %s mode by module option\n",
1477 snoop
? "snoop" : "non-snoop");
1478 chip
->snoop
= snoop
;
1483 if (azx_get_snoop_type(chip
) == AZX_SNOOP_TYPE_NONE
&&
1484 chip
->driver_type
== AZX_DRIVER_VIA
) {
1485 /* force to non-snoop mode for a new VIA controller
1489 pci_read_config_byte(chip
->pci
, 0x42, &val
);
1490 if (!(val
& 0x80) && chip
->pci
->revision
== 0x30)
1494 if (chip
->driver_caps
& AZX_DCAPS_SNOOP_OFF
)
1497 chip
->snoop
= snoop
;
1499 dev_info(chip
->card
->dev
, "Force to non-snoop mode\n");
1502 static void azx_probe_work(struct work_struct
*work
)
1504 struct hda_intel
*hda
= container_of(work
, struct hda_intel
, probe_work
);
1505 azx_probe_continue(&hda
->chip
);
1511 static const struct hdac_io_ops pci_hda_io_ops
;
1512 static const struct hda_controller_ops pci_hda_ops
;
1514 static int azx_create(struct snd_card
*card
, struct pci_dev
*pci
,
1515 int dev
, unsigned int driver_caps
,
1518 static struct snd_device_ops ops
= {
1519 .dev_disconnect
= azx_dev_disconnect
,
1520 .dev_free
= azx_dev_free
,
1522 struct hda_intel
*hda
;
1528 err
= pci_enable_device(pci
);
1532 hda
= kzalloc(sizeof(*hda
), GFP_KERNEL
);
1534 pci_disable_device(pci
);
1539 mutex_init(&chip
->open_mutex
);
1542 chip
->ops
= &pci_hda_ops
;
1543 chip
->driver_caps
= driver_caps
;
1544 chip
->driver_type
= driver_caps
& 0xff;
1546 chip
->dev_index
= dev
;
1547 chip
->jackpoll_ms
= jackpoll_ms
;
1548 INIT_LIST_HEAD(&chip
->pcm_list
);
1549 INIT_WORK(&hda
->irq_pending_work
, azx_irq_pending_work
);
1550 INIT_LIST_HEAD(&hda
->list
);
1551 init_vga_switcheroo(chip
);
1552 init_completion(&hda
->probe_wait
);
1554 assign_position_fix(chip
, check_position_fix(chip
, position_fix
[dev
]));
1556 check_probe_mask(chip
, dev
);
1558 chip
->single_cmd
= single_cmd
;
1559 azx_check_snoop_available(chip
);
1561 if (bdl_pos_adj
[dev
] < 0) {
1562 switch (chip
->driver_type
) {
1563 case AZX_DRIVER_ICH
:
1564 case AZX_DRIVER_PCH
:
1565 bdl_pos_adj
[dev
] = 1;
1568 bdl_pos_adj
[dev
] = 32;
1572 chip
->bdl_pos_adj
= bdl_pos_adj
;
1574 err
= azx_bus_init(chip
, model
[dev
], &pci_hda_io_ops
);
1577 pci_disable_device(pci
);
1581 err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
, chip
, &ops
);
1583 dev_err(card
->dev
, "Error creating device [card]!\n");
1588 /* continue probing in work context as may trigger request module */
1589 INIT_WORK(&hda
->probe_work
, azx_probe_work
);
1596 static int azx_first_init(struct azx
*chip
)
1598 int dev
= chip
->dev_index
;
1599 struct pci_dev
*pci
= chip
->pci
;
1600 struct snd_card
*card
= chip
->card
;
1601 struct hdac_bus
*bus
= azx_bus(chip
);
1603 unsigned short gcap
;
1604 unsigned int dma_bits
= 64;
1606 #if BITS_PER_LONG != 64
1607 /* Fix up base address on ULI M5461 */
1608 if (chip
->driver_type
== AZX_DRIVER_ULI
) {
1610 pci_read_config_word(pci
, 0x40, &tmp3
);
1611 pci_write_config_word(pci
, 0x40, tmp3
| 0x10);
1612 pci_write_config_dword(pci
, PCI_BASE_ADDRESS_1
, 0);
1616 err
= pci_request_regions(pci
, "ICH HD audio");
1619 chip
->region_requested
= 1;
1621 bus
->addr
= pci_resource_start(pci
, 0);
1622 bus
->remap_addr
= pci_ioremap_bar(pci
, 0);
1623 if (bus
->remap_addr
== NULL
) {
1624 dev_err(card
->dev
, "ioremap error\n");
1629 if (chip
->driver_caps
& AZX_DCAPS_NO_MSI64
) {
1630 dev_dbg(card
->dev
, "Disabling 64bit MSI\n");
1631 pci
->no_64bit_msi
= true;
1633 if (pci_enable_msi(pci
) < 0)
1637 if (azx_acquire_irq(chip
, 0) < 0)
1640 pci_set_master(pci
);
1641 synchronize_irq(bus
->irq
);
1643 gcap
= azx_readw(chip
, GCAP
);
1644 dev_dbg(card
->dev
, "chipset global capabilities = 0x%x\n", gcap
);
1646 /* AMD devices support 40 or 48bit DMA, take the safe one */
1647 if (chip
->pci
->vendor
== PCI_VENDOR_ID_AMD
)
1650 /* disable SB600 64bit support for safety */
1651 if (chip
->pci
->vendor
== PCI_VENDOR_ID_ATI
) {
1652 struct pci_dev
*p_smbus
;
1654 p_smbus
= pci_get_device(PCI_VENDOR_ID_ATI
,
1655 PCI_DEVICE_ID_ATI_SBX00_SMBUS
,
1658 if (p_smbus
->revision
< 0x30)
1659 gcap
&= ~AZX_GCAP_64OK
;
1660 pci_dev_put(p_smbus
);
1664 /* disable 64bit DMA address on some devices */
1665 if (chip
->driver_caps
& AZX_DCAPS_NO_64BIT
) {
1666 dev_dbg(card
->dev
, "Disabling 64bit DMA\n");
1667 gcap
&= ~AZX_GCAP_64OK
;
1670 /* disable buffer size rounding to 128-byte multiples if supported */
1671 if (align_buffer_size
>= 0)
1672 chip
->align_buffer_size
= !!align_buffer_size
;
1674 if (chip
->driver_caps
& AZX_DCAPS_NO_ALIGN_BUFSIZE
)
1675 chip
->align_buffer_size
= 0;
1677 chip
->align_buffer_size
= 1;
1680 /* allow 64bit DMA address if supported by H/W */
1681 if (!(gcap
& AZX_GCAP_64OK
))
1683 if (!dma_set_mask(&pci
->dev
, DMA_BIT_MASK(dma_bits
))) {
1684 dma_set_coherent_mask(&pci
->dev
, DMA_BIT_MASK(dma_bits
));
1686 dma_set_mask(&pci
->dev
, DMA_BIT_MASK(32));
1687 dma_set_coherent_mask(&pci
->dev
, DMA_BIT_MASK(32));
1690 /* read number of streams from GCAP register instead of using
1693 chip
->capture_streams
= (gcap
>> 8) & 0x0f;
1694 chip
->playback_streams
= (gcap
>> 12) & 0x0f;
1695 if (!chip
->playback_streams
&& !chip
->capture_streams
) {
1696 /* gcap didn't give any info, switching to old method */
1698 switch (chip
->driver_type
) {
1699 case AZX_DRIVER_ULI
:
1700 chip
->playback_streams
= ULI_NUM_PLAYBACK
;
1701 chip
->capture_streams
= ULI_NUM_CAPTURE
;
1703 case AZX_DRIVER_ATIHDMI
:
1704 case AZX_DRIVER_ATIHDMI_NS
:
1705 chip
->playback_streams
= ATIHDMI_NUM_PLAYBACK
;
1706 chip
->capture_streams
= ATIHDMI_NUM_CAPTURE
;
1708 case AZX_DRIVER_GENERIC
:
1710 chip
->playback_streams
= ICH6_NUM_PLAYBACK
;
1711 chip
->capture_streams
= ICH6_NUM_CAPTURE
;
1715 chip
->capture_index_offset
= 0;
1716 chip
->playback_index_offset
= chip
->capture_streams
;
1717 chip
->num_streams
= chip
->playback_streams
+ chip
->capture_streams
;
1719 /* initialize streams */
1720 err
= azx_init_streams(chip
);
1724 err
= azx_alloc_stream_pages(chip
);
1728 /* initialize chip */
1731 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
) {
1732 struct hda_intel
*hda
;
1734 hda
= container_of(chip
, struct hda_intel
, chip
);
1735 haswell_set_bclk(hda
);
1738 hda_intel_init_chip(chip
, (probe_only
[dev
] & 2) == 0);
1740 /* codec detection */
1741 if (!azx_bus(chip
)->codec_mask
) {
1742 dev_err(card
->dev
, "no codecs found!\n");
1746 strcpy(card
->driver
, "HDA-Intel");
1747 strlcpy(card
->shortname
, driver_short_names
[chip
->driver_type
],
1748 sizeof(card
->shortname
));
1749 snprintf(card
->longname
, sizeof(card
->longname
),
1750 "%s at 0x%lx irq %i",
1751 card
->shortname
, bus
->addr
, bus
->irq
);
1756 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1757 /* callback from request_firmware_nowait() */
1758 static void azx_firmware_cb(const struct firmware
*fw
, void *context
)
1760 struct snd_card
*card
= context
;
1761 struct azx
*chip
= card
->private_data
;
1762 struct pci_dev
*pci
= chip
->pci
;
1765 dev_err(card
->dev
, "Cannot load firmware, aborting\n");
1770 if (!chip
->disabled
) {
1771 /* continue probing */
1772 if (azx_probe_continue(chip
))
1778 snd_card_free(card
);
1779 pci_set_drvdata(pci
, NULL
);
1784 * HDA controller ops.
1787 /* PCI register access. */
1788 static void pci_azx_writel(u32 value
, u32 __iomem
*addr
)
1790 writel(value
, addr
);
1793 static u32
pci_azx_readl(u32 __iomem
*addr
)
1798 static void pci_azx_writew(u16 value
, u16 __iomem
*addr
)
1800 writew(value
, addr
);
1803 static u16
pci_azx_readw(u16 __iomem
*addr
)
1808 static void pci_azx_writeb(u8 value
, u8 __iomem
*addr
)
1810 writeb(value
, addr
);
1813 static u8
pci_azx_readb(u8 __iomem
*addr
)
1818 static int disable_msi_reset_irq(struct azx
*chip
)
1820 struct hdac_bus
*bus
= azx_bus(chip
);
1823 free_irq(bus
->irq
, chip
);
1825 pci_disable_msi(chip
->pci
);
1827 err
= azx_acquire_irq(chip
, 1);
1834 /* DMA page allocation helpers. */
1835 static int dma_alloc_pages(struct hdac_bus
*bus
,
1838 struct snd_dma_buffer
*buf
)
1840 struct azx
*chip
= bus_to_azx(bus
);
1843 err
= snd_dma_alloc_pages(type
,
1848 mark_pages_wc(chip
, buf
, true);
1852 static void dma_free_pages(struct hdac_bus
*bus
, struct snd_dma_buffer
*buf
)
1854 struct azx
*chip
= bus_to_azx(bus
);
1856 mark_pages_wc(chip
, buf
, false);
1857 snd_dma_free_pages(buf
);
1860 static int substream_alloc_pages(struct azx
*chip
,
1861 struct snd_pcm_substream
*substream
,
1864 struct azx_dev
*azx_dev
= get_azx_dev(substream
);
1867 mark_runtime_wc(chip
, azx_dev
, substream
, false);
1868 ret
= snd_pcm_lib_malloc_pages(substream
, size
);
1871 mark_runtime_wc(chip
, azx_dev
, substream
, true);
1875 static int substream_free_pages(struct azx
*chip
,
1876 struct snd_pcm_substream
*substream
)
1878 struct azx_dev
*azx_dev
= get_azx_dev(substream
);
1879 mark_runtime_wc(chip
, azx_dev
, substream
, false);
1880 return snd_pcm_lib_free_pages(substream
);
1883 static void pcm_mmap_prepare(struct snd_pcm_substream
*substream
,
1884 struct vm_area_struct
*area
)
1887 struct azx_pcm
*apcm
= snd_pcm_substream_chip(substream
);
1888 struct azx
*chip
= apcm
->chip
;
1889 if (!azx_snoop(chip
) && chip
->driver_type
!= AZX_DRIVER_CMEDIA
)
1890 area
->vm_page_prot
= pgprot_writecombine(area
->vm_page_prot
);
1894 static const struct hdac_io_ops pci_hda_io_ops
= {
1895 .reg_writel
= pci_azx_writel
,
1896 .reg_readl
= pci_azx_readl
,
1897 .reg_writew
= pci_azx_writew
,
1898 .reg_readw
= pci_azx_readw
,
1899 .reg_writeb
= pci_azx_writeb
,
1900 .reg_readb
= pci_azx_readb
,
1901 .dma_alloc_pages
= dma_alloc_pages
,
1902 .dma_free_pages
= dma_free_pages
,
1905 static const struct hda_controller_ops pci_hda_ops
= {
1906 .disable_msi_reset_irq
= disable_msi_reset_irq
,
1907 .substream_alloc_pages
= substream_alloc_pages
,
1908 .substream_free_pages
= substream_free_pages
,
1909 .pcm_mmap_prepare
= pcm_mmap_prepare
,
1910 .position_check
= azx_position_check
,
1911 .link_power
= azx_intel_link_power
,
1914 static int azx_probe(struct pci_dev
*pci
,
1915 const struct pci_device_id
*pci_id
)
1918 struct snd_card
*card
;
1919 struct hda_intel
*hda
;
1921 bool schedule_probe
;
1924 if (dev
>= SNDRV_CARDS
)
1931 err
= snd_card_new(&pci
->dev
, index
[dev
], id
[dev
], THIS_MODULE
,
1934 dev_err(&pci
->dev
, "Error creating card!\n");
1938 err
= azx_create(card
, pci
, dev
, pci_id
->driver_data
, &chip
);
1941 card
->private_data
= chip
;
1942 hda
= container_of(chip
, struct hda_intel
, chip
);
1944 pci_set_drvdata(pci
, card
);
1946 err
= register_vga_switcheroo(chip
);
1948 dev_err(card
->dev
, "Error registering vga_switcheroo client\n");
1952 if (check_hdmi_disabled(pci
)) {
1953 dev_info(card
->dev
, "VGA controller is disabled\n");
1954 dev_info(card
->dev
, "Delaying initialization\n");
1955 chip
->disabled
= true;
1958 schedule_probe
= !chip
->disabled
;
1960 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1961 if (patch
[dev
] && *patch
[dev
]) {
1962 dev_info(card
->dev
, "Applying patch firmware '%s'\n",
1964 err
= request_firmware_nowait(THIS_MODULE
, true, patch
[dev
],
1965 &pci
->dev
, GFP_KERNEL
, card
,
1969 schedule_probe
= false; /* continued in azx_firmware_cb() */
1971 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1973 #ifndef CONFIG_SND_HDA_I915
1974 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
)
1975 dev_err(card
->dev
, "Haswell must build in CONFIG_SND_HDA_I915\n");
1979 schedule_work(&hda
->probe_work
);
1983 complete_all(&hda
->probe_wait
);
1987 snd_card_free(card
);
1991 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1992 static unsigned int azx_max_codecs
[AZX_NUM_DRIVERS
] = {
1993 [AZX_DRIVER_NVIDIA
] = 8,
1994 [AZX_DRIVER_TERA
] = 1,
1997 static int azx_probe_continue(struct azx
*chip
)
1999 struct hda_intel
*hda
= container_of(chip
, struct hda_intel
, chip
);
2000 struct hdac_bus
*bus
= azx_bus(chip
);
2001 struct pci_dev
*pci
= chip
->pci
;
2002 int dev
= chip
->dev_index
;
2005 hda
->probe_continued
= 1;
2007 /* Request display power well for the HDA controller or codec. For
2008 * Haswell/Broadwell, both the display HDA controller and codec need
2009 * this power. For other platforms, like Baytrail/Braswell, only the
2010 * display codec needs the power and it can be released after probe.
2012 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
) {
2013 /* HSW/BDW controllers need this power */
2014 if (CONTROLLER_IN_GPU(pci
))
2015 hda
->need_i915_power
= 1;
2017 err
= snd_hdac_i915_init(bus
);
2019 /* if the controller is bound only with HDMI/DP
2020 * (for HSW and BDW), we need to abort the probe;
2021 * for other chips, still continue probing as other
2022 * codecs can be on the same link.
2024 if (CONTROLLER_IN_GPU(pci
))
2030 err
= snd_hdac_display_power(bus
, true);
2032 dev_err(chip
->card
->dev
,
2033 "Cannot turn on display power on i915\n");
2034 goto i915_power_fail
;
2039 err
= azx_first_init(chip
);
2043 #ifdef CONFIG_SND_HDA_INPUT_BEEP
2044 chip
->beep_mode
= beep_mode
[dev
];
2047 /* create codec instances */
2048 err
= azx_probe_codecs(chip
, azx_max_codecs
[chip
->driver_type
]);
2052 #ifdef CONFIG_SND_HDA_PATCH_LOADER
2054 err
= snd_hda_load_patch(&chip
->bus
, chip
->fw
->size
,
2059 release_firmware(chip
->fw
); /* no longer needed */
2064 if ((probe_only
[dev
] & 1) == 0) {
2065 err
= azx_codec_configure(chip
);
2070 err
= snd_card_register(chip
->card
);
2075 azx_add_card_list(chip
);
2076 snd_hda_set_power_save(&chip
->bus
, power_save
* 1000);
2077 if (azx_has_pm_runtime(chip
) || hda
->use_vga_switcheroo
)
2078 pm_runtime_put_noidle(&pci
->dev
);
2081 if (chip
->driver_caps
& AZX_DCAPS_I915_POWERWELL
2082 && !hda
->need_i915_power
)
2083 snd_hdac_display_power(bus
, false);
2087 hda
->init_failed
= 1;
2088 complete_all(&hda
->probe_wait
);
2092 static void azx_remove(struct pci_dev
*pci
)
2094 struct snd_card
*card
= pci_get_drvdata(pci
);
2097 snd_card_free(card
);
2100 static void azx_shutdown(struct pci_dev
*pci
)
2102 struct snd_card
*card
= pci_get_drvdata(pci
);
2107 chip
= card
->private_data
;
2108 if (chip
&& chip
->running
)
2109 azx_stop_chip(chip
);
2113 static const struct pci_device_id azx_ids
[] = {
2115 { PCI_DEVICE(0x8086, 0x1c20),
2116 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH_NOPM
},
2118 { PCI_DEVICE(0x8086, 0x1d20),
2119 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH_NOPM
},
2121 { PCI_DEVICE(0x8086, 0x1e20),
2122 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH_NOPM
},
2124 { PCI_DEVICE(0x8086, 0x8c20),
2125 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH
},
2127 { PCI_DEVICE(0x8086, 0x8ca0),
2128 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH
},
2130 { PCI_DEVICE(0x8086, 0x8d20),
2131 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH
},
2132 { PCI_DEVICE(0x8086, 0x8d21),
2133 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH
},
2135 { PCI_DEVICE(0x8086, 0xa1f0),
2136 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH
},
2137 { PCI_DEVICE(0x8086, 0xa270),
2138 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH
},
2140 { PCI_DEVICE(0x8086, 0x9c20),
2141 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH
},
2143 { PCI_DEVICE(0x8086, 0x9c21),
2144 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH
},
2145 /* Wildcat Point-LP */
2146 { PCI_DEVICE(0x8086, 0x9ca0),
2147 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_PCH
},
2149 { PCI_DEVICE(0x8086, 0xa170),
2150 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_SKYLAKE
},
2151 /* Sunrise Point-LP */
2152 { PCI_DEVICE(0x8086, 0x9d70),
2153 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_SKYLAKE
},
2154 /* Broxton-P(Apollolake) */
2155 { PCI_DEVICE(0x8086, 0x5a98),
2156 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_BROXTON
},
2158 { PCI_DEVICE(0x8086, 0x0a0c),
2159 .driver_data
= AZX_DRIVER_HDMI
| AZX_DCAPS_INTEL_HASWELL
},
2160 { PCI_DEVICE(0x8086, 0x0c0c),
2161 .driver_data
= AZX_DRIVER_HDMI
| AZX_DCAPS_INTEL_HASWELL
},
2162 { PCI_DEVICE(0x8086, 0x0d0c),
2163 .driver_data
= AZX_DRIVER_HDMI
| AZX_DCAPS_INTEL_HASWELL
},
2165 { PCI_DEVICE(0x8086, 0x160c),
2166 .driver_data
= AZX_DRIVER_HDMI
| AZX_DCAPS_INTEL_BROADWELL
},
2168 { PCI_DEVICE(0x8086, 0x3b56),
2169 .driver_data
= AZX_DRIVER_SCH
| AZX_DCAPS_INTEL_PCH_NOPM
},
2171 { PCI_DEVICE(0x8086, 0x811b),
2172 .driver_data
= AZX_DRIVER_SCH
| AZX_DCAPS_INTEL_PCH_NOPM
},
2174 { PCI_DEVICE(0x8086, 0x080a),
2175 .driver_data
= AZX_DRIVER_SCH
| AZX_DCAPS_INTEL_PCH_NOPM
},
2177 { PCI_DEVICE(0x8086, 0x0f04),
2178 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_BAYTRAIL
},
2180 { PCI_DEVICE(0x8086, 0x2284),
2181 .driver_data
= AZX_DRIVER_PCH
| AZX_DCAPS_INTEL_BRASWELL
},
2183 { PCI_DEVICE(0x8086, 0x2668),
2184 .driver_data
= AZX_DRIVER_ICH
| AZX_DCAPS_INTEL_ICH
},
2186 { PCI_DEVICE(0x8086, 0x27d8),
2187 .driver_data
= AZX_DRIVER_ICH
| AZX_DCAPS_INTEL_ICH
},
2189 { PCI_DEVICE(0x8086, 0x269a),
2190 .driver_data
= AZX_DRIVER_ICH
| AZX_DCAPS_INTEL_ICH
},
2192 { PCI_DEVICE(0x8086, 0x284b),
2193 .driver_data
= AZX_DRIVER_ICH
| AZX_DCAPS_INTEL_ICH
},
2195 { PCI_DEVICE(0x8086, 0x293e),
2196 .driver_data
= AZX_DRIVER_ICH
| AZX_DCAPS_INTEL_ICH
},
2198 { PCI_DEVICE(0x8086, 0x293f),
2199 .driver_data
= AZX_DRIVER_ICH
| AZX_DCAPS_INTEL_ICH
},
2201 { PCI_DEVICE(0x8086, 0x3a3e),
2202 .driver_data
= AZX_DRIVER_ICH
| AZX_DCAPS_INTEL_ICH
},
2204 { PCI_DEVICE(0x8086, 0x3a6e),
2205 .driver_data
= AZX_DRIVER_ICH
| AZX_DCAPS_INTEL_ICH
},
2207 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_ANY_ID
),
2208 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO
<< 8,
2209 .class_mask
= 0xffffff,
2210 .driver_data
= AZX_DRIVER_ICH
| AZX_DCAPS_NO_ALIGN_BUFSIZE
},
2211 /* ATI SB 450/600/700/800/900 */
2212 { PCI_DEVICE(0x1002, 0x437b),
2213 .driver_data
= AZX_DRIVER_ATI
| AZX_DCAPS_PRESET_ATI_SB
},
2214 { PCI_DEVICE(0x1002, 0x4383),
2215 .driver_data
= AZX_DRIVER_ATI
| AZX_DCAPS_PRESET_ATI_SB
},
2217 { PCI_DEVICE(0x1022, 0x780d),
2218 .driver_data
= AZX_DRIVER_GENERIC
| AZX_DCAPS_PRESET_ATI_SB
},
2220 { PCI_DEVICE(0x1002, 0x1308),
2221 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2222 { PCI_DEVICE(0x1002, 0x157a),
2223 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2224 { PCI_DEVICE(0x1002, 0x793b),
2225 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2226 { PCI_DEVICE(0x1002, 0x7919),
2227 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2228 { PCI_DEVICE(0x1002, 0x960f),
2229 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2230 { PCI_DEVICE(0x1002, 0x970f),
2231 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2232 { PCI_DEVICE(0x1002, 0x9840),
2233 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2234 { PCI_DEVICE(0x1002, 0xaa00),
2235 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2236 { PCI_DEVICE(0x1002, 0xaa08),
2237 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2238 { PCI_DEVICE(0x1002, 0xaa10),
2239 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2240 { PCI_DEVICE(0x1002, 0xaa18),
2241 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2242 { PCI_DEVICE(0x1002, 0xaa20),
2243 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2244 { PCI_DEVICE(0x1002, 0xaa28),
2245 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2246 { PCI_DEVICE(0x1002, 0xaa30),
2247 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2248 { PCI_DEVICE(0x1002, 0xaa38),
2249 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2250 { PCI_DEVICE(0x1002, 0xaa40),
2251 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2252 { PCI_DEVICE(0x1002, 0xaa48),
2253 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2254 { PCI_DEVICE(0x1002, 0xaa50),
2255 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2256 { PCI_DEVICE(0x1002, 0xaa58),
2257 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2258 { PCI_DEVICE(0x1002, 0xaa60),
2259 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2260 { PCI_DEVICE(0x1002, 0xaa68),
2261 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2262 { PCI_DEVICE(0x1002, 0xaa80),
2263 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2264 { PCI_DEVICE(0x1002, 0xaa88),
2265 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2266 { PCI_DEVICE(0x1002, 0xaa90),
2267 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2268 { PCI_DEVICE(0x1002, 0xaa98),
2269 .driver_data
= AZX_DRIVER_ATIHDMI
| AZX_DCAPS_PRESET_ATI_HDMI
},
2270 { PCI_DEVICE(0x1002, 0x9902),
2271 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2272 { PCI_DEVICE(0x1002, 0xaaa0),
2273 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2274 { PCI_DEVICE(0x1002, 0xaaa8),
2275 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2276 { PCI_DEVICE(0x1002, 0xaab0),
2277 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2278 { PCI_DEVICE(0x1002, 0xaac0),
2279 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2280 { PCI_DEVICE(0x1002, 0xaac8),
2281 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2282 { PCI_DEVICE(0x1002, 0xaad8),
2283 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2284 { PCI_DEVICE(0x1002, 0xaae8),
2285 .driver_data
= AZX_DRIVER_ATIHDMI_NS
| AZX_DCAPS_PRESET_ATI_HDMI_NS
},
2286 /* VIA VT8251/VT8237A */
2287 { PCI_DEVICE(0x1106, 0x3288),
2288 .driver_data
= AZX_DRIVER_VIA
| AZX_DCAPS_POSFIX_VIA
},
2289 /* VIA GFX VT7122/VX900 */
2290 { PCI_DEVICE(0x1106, 0x9170), .driver_data
= AZX_DRIVER_GENERIC
},
2291 /* VIA GFX VT6122/VX11 */
2292 { PCI_DEVICE(0x1106, 0x9140), .driver_data
= AZX_DRIVER_GENERIC
},
2294 { PCI_DEVICE(0x1039, 0x7502), .driver_data
= AZX_DRIVER_SIS
},
2296 { PCI_DEVICE(0x10b9, 0x5461), .driver_data
= AZX_DRIVER_ULI
},
2298 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA
, PCI_ANY_ID
),
2299 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO
<< 8,
2300 .class_mask
= 0xffffff,
2301 .driver_data
= AZX_DRIVER_NVIDIA
| AZX_DCAPS_PRESET_NVIDIA
},
2303 { PCI_DEVICE(0x6549, 0x1200),
2304 .driver_data
= AZX_DRIVER_TERA
| AZX_DCAPS_NO_64BIT
},
2305 { PCI_DEVICE(0x6549, 0x2200),
2306 .driver_data
= AZX_DRIVER_TERA
| AZX_DCAPS_NO_64BIT
},
2307 /* Creative X-Fi (CA0110-IBG) */
2309 { PCI_DEVICE(0x1102, 0x0010),
2310 .driver_data
= AZX_DRIVER_CTHDA
| AZX_DCAPS_PRESET_CTHDA
},
2311 { PCI_DEVICE(0x1102, 0x0012),
2312 .driver_data
= AZX_DRIVER_CTHDA
| AZX_DCAPS_PRESET_CTHDA
},
2313 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2314 /* the following entry conflicts with snd-ctxfi driver,
2315 * as ctxfi driver mutates from HD-audio to native mode with
2316 * a special command sequence.
2318 { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE
, PCI_ANY_ID
),
2319 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO
<< 8,
2320 .class_mask
= 0xffffff,
2321 .driver_data
= AZX_DRIVER_CTX
| AZX_DCAPS_CTX_WORKAROUND
|
2322 AZX_DCAPS_NO_64BIT
|
2323 AZX_DCAPS_RIRB_PRE_DELAY
| AZX_DCAPS_POSFIX_LPIB
},
2325 /* this entry seems still valid -- i.e. without emu20kx chip */
2326 { PCI_DEVICE(0x1102, 0x0009),
2327 .driver_data
= AZX_DRIVER_CTX
| AZX_DCAPS_CTX_WORKAROUND
|
2328 AZX_DCAPS_NO_64BIT
|
2329 AZX_DCAPS_RIRB_PRE_DELAY
| AZX_DCAPS_POSFIX_LPIB
},
2332 { PCI_DEVICE(0x13f6, 0x5011),
2333 .driver_data
= AZX_DRIVER_CMEDIA
|
2334 AZX_DCAPS_NO_MSI
| AZX_DCAPS_POSFIX_LPIB
| AZX_DCAPS_SNOOP_OFF
},
2336 { PCI_DEVICE(0x17f3, 0x3010), .driver_data
= AZX_DRIVER_GENERIC
},
2337 /* VMware HDAudio */
2338 { PCI_DEVICE(0x15ad, 0x1977), .driver_data
= AZX_DRIVER_GENERIC
},
2339 /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2340 { PCI_DEVICE(PCI_VENDOR_ID_ATI
, PCI_ANY_ID
),
2341 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO
<< 8,
2342 .class_mask
= 0xffffff,
2343 .driver_data
= AZX_DRIVER_GENERIC
| AZX_DCAPS_PRESET_ATI_HDMI
},
2344 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_ANY_ID
),
2345 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO
<< 8,
2346 .class_mask
= 0xffffff,
2347 .driver_data
= AZX_DRIVER_GENERIC
| AZX_DCAPS_PRESET_ATI_HDMI
},
2350 MODULE_DEVICE_TABLE(pci
, azx_ids
);
2352 /* pci_driver definition */
2353 static struct pci_driver azx_driver
= {
2354 .name
= KBUILD_MODNAME
,
2355 .id_table
= azx_ids
,
2357 .remove
= azx_remove
,
2358 .shutdown
= azx_shutdown
,
2364 module_pci_driver(azx_driver
);