3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
12 * Wu Fengguang <wfg@linux.intel.com>
15 * Wu Fengguang <wfg@linux.intel.com>
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the Free
19 * Software Foundation; either version 2 of the License, or (at your option)
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software Foundation,
29 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/slab.h>
35 #include <linux/module.h>
36 #include <sound/core.h>
37 #include <sound/jack.h>
38 #include <sound/asoundef.h>
39 #include <sound/tlv.h>
40 #include "hda_codec.h"
41 #include "hda_local.h"
44 static bool static_hdmi_pcm
;
45 module_param(static_hdmi_pcm
, bool, 0644);
46 MODULE_PARM_DESC(static_hdmi_pcm
, "Don't restrict PCM parameters per ELD info");
48 #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
50 struct hdmi_spec_per_cvt
{
53 unsigned int channels_min
;
54 unsigned int channels_max
;
60 /* max. connections to a widget */
61 #define HDA_MAX_CONNECTIONS 32
63 struct hdmi_spec_per_pin
{
66 hda_nid_t mux_nids
[HDA_MAX_CONNECTIONS
];
69 struct hda_codec
*codec
;
70 struct hdmi_eld sink_eld
;
72 struct delayed_work work
;
73 struct snd_kcontrol
*eld_ctl
;
75 bool setup
; /* the stream has been set up by prepare callback */
76 int channels
; /* current number of channels */
78 bool chmap_set
; /* channel-map override by ALSA API? */
79 unsigned char chmap
[8]; /* ALSA API channel-map */
80 char pcm_name
[8]; /* filled in build_pcm callbacks */
82 struct snd_info_entry
*proc_entry
;
86 struct cea_channel_speaker_allocation
;
88 /* operations used by generic code that can be overridden by patches */
90 int (*pin_get_eld
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
91 unsigned char *buf
, int *eld_size
);
93 /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
94 int (*pin_get_slot_channel
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
96 int (*pin_set_slot_channel
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
97 int asp_slot
, int channel
);
99 void (*pin_setup_infoframe
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
100 int ca
, int active_channels
, int conn_type
);
102 /* enable/disable HBR (HD passthrough) */
103 int (*pin_hbr_setup
)(struct hda_codec
*codec
, hda_nid_t pin_nid
, bool hbr
);
105 int (*setup_stream
)(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
106 hda_nid_t pin_nid
, u32 stream_tag
, int format
);
108 /* Helpers for producing the channel map TLVs. These can be overridden
109 * for devices that have non-standard mapping requirements. */
110 int (*chmap_cea_alloc_validate_get_type
)(struct cea_channel_speaker_allocation
*cap
,
112 void (*cea_alloc_to_tlv_chmap
)(struct cea_channel_speaker_allocation
*cap
,
113 unsigned int *chmap
, int channels
);
115 /* check that the user-given chmap is supported */
116 int (*chmap_validate
)(int ca
, int channels
, unsigned char *chmap
);
121 struct snd_array cvts
; /* struct hdmi_spec_per_cvt */
122 hda_nid_t cvt_nids
[4]; /* only for haswell fix */
125 struct snd_array pins
; /* struct hdmi_spec_per_pin */
126 struct snd_array pcm_rec
; /* struct hda_pcm */
127 unsigned int channels_max
; /* max over all cvts */
129 struct hdmi_eld temp_eld
;
132 * Non-generic VIA/NVIDIA specific
134 struct hda_multi_out multiout
;
135 struct hda_pcm_stream pcm_playback
;
139 struct hdmi_audio_infoframe
{
146 u8 CC02_CT47
; /* CC in bits 0:2, CT in 4:7 */
150 u8 LFEPBL01_LSV36_DM_INH7
;
153 struct dp_audio_infoframe
{
156 u8 ver
; /* 0x11 << 2 */
158 u8 CC02_CT47
; /* match with HDMI infoframe from this on */
162 u8 LFEPBL01_LSV36_DM_INH7
;
165 union audio_infoframe
{
166 struct hdmi_audio_infoframe hdmi
;
167 struct dp_audio_infoframe dp
;
172 * CEA speaker placement:
175 * FLW FL FLC FC FRC FR FRW
182 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
183 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
185 enum cea_speaker_placement
{
186 FL
= (1 << 0), /* Front Left */
187 FC
= (1 << 1), /* Front Center */
188 FR
= (1 << 2), /* Front Right */
189 FLC
= (1 << 3), /* Front Left Center */
190 FRC
= (1 << 4), /* Front Right Center */
191 RL
= (1 << 5), /* Rear Left */
192 RC
= (1 << 6), /* Rear Center */
193 RR
= (1 << 7), /* Rear Right */
194 RLC
= (1 << 8), /* Rear Left Center */
195 RRC
= (1 << 9), /* Rear Right Center */
196 LFE
= (1 << 10), /* Low Frequency Effect */
197 FLW
= (1 << 11), /* Front Left Wide */
198 FRW
= (1 << 12), /* Front Right Wide */
199 FLH
= (1 << 13), /* Front Left High */
200 FCH
= (1 << 14), /* Front Center High */
201 FRH
= (1 << 15), /* Front Right High */
202 TC
= (1 << 16), /* Top Center */
206 * ELD SA bits in the CEA Speaker Allocation data block
208 static int eld_speaker_allocation_bits
[] = {
216 /* the following are not defined in ELD yet */
223 struct cea_channel_speaker_allocation
{
227 /* derived values, just for convenience */
235 * surround40 surround41 surround50 surround51 surround71
236 * ch0 front left = = = =
237 * ch1 front right = = = =
238 * ch2 rear left = = = =
239 * ch3 rear right = = = =
240 * ch4 LFE center center center
245 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
247 static int hdmi_channel_mapping
[0x32][8] = {
249 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
251 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
253 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
255 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
257 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
259 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
261 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
263 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
265 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
269 * This is an ordered list!
271 * The preceding ones have better chances to be selected by
272 * hdmi_channel_allocation().
274 static struct cea_channel_speaker_allocation channel_allocations
[] = {
275 /* channel: 7 6 5 4 3 2 1 0 */
276 { .ca_index
= 0x00, .speakers
= { 0, 0, 0, 0, 0, 0, FR
, FL
} },
278 { .ca_index
= 0x01, .speakers
= { 0, 0, 0, 0, 0, LFE
, FR
, FL
} },
280 { .ca_index
= 0x02, .speakers
= { 0, 0, 0, 0, FC
, 0, FR
, FL
} },
282 { .ca_index
= 0x08, .speakers
= { 0, 0, RR
, RL
, 0, 0, FR
, FL
} },
284 { .ca_index
= 0x09, .speakers
= { 0, 0, RR
, RL
, 0, LFE
, FR
, FL
} },
286 { .ca_index
= 0x0a, .speakers
= { 0, 0, RR
, RL
, FC
, 0, FR
, FL
} },
288 { .ca_index
= 0x0b, .speakers
= { 0, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
290 { .ca_index
= 0x0f, .speakers
= { 0, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
292 { .ca_index
= 0x13, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
294 { .ca_index
= 0x03, .speakers
= { 0, 0, 0, 0, FC
, LFE
, FR
, FL
} },
295 { .ca_index
= 0x04, .speakers
= { 0, 0, 0, RC
, 0, 0, FR
, FL
} },
296 { .ca_index
= 0x05, .speakers
= { 0, 0, 0, RC
, 0, LFE
, FR
, FL
} },
297 { .ca_index
= 0x06, .speakers
= { 0, 0, 0, RC
, FC
, 0, FR
, FL
} },
298 { .ca_index
= 0x07, .speakers
= { 0, 0, 0, RC
, FC
, LFE
, FR
, FL
} },
299 { .ca_index
= 0x0c, .speakers
= { 0, RC
, RR
, RL
, 0, 0, FR
, FL
} },
300 { .ca_index
= 0x0d, .speakers
= { 0, RC
, RR
, RL
, 0, LFE
, FR
, FL
} },
301 { .ca_index
= 0x0e, .speakers
= { 0, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
302 { .ca_index
= 0x10, .speakers
= { RRC
, RLC
, RR
, RL
, 0, 0, FR
, FL
} },
303 { .ca_index
= 0x11, .speakers
= { RRC
, RLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
304 { .ca_index
= 0x12, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, 0, FR
, FL
} },
305 { .ca_index
= 0x14, .speakers
= { FRC
, FLC
, 0, 0, 0, 0, FR
, FL
} },
306 { .ca_index
= 0x15, .speakers
= { FRC
, FLC
, 0, 0, 0, LFE
, FR
, FL
} },
307 { .ca_index
= 0x16, .speakers
= { FRC
, FLC
, 0, 0, FC
, 0, FR
, FL
} },
308 { .ca_index
= 0x17, .speakers
= { FRC
, FLC
, 0, 0, FC
, LFE
, FR
, FL
} },
309 { .ca_index
= 0x18, .speakers
= { FRC
, FLC
, 0, RC
, 0, 0, FR
, FL
} },
310 { .ca_index
= 0x19, .speakers
= { FRC
, FLC
, 0, RC
, 0, LFE
, FR
, FL
} },
311 { .ca_index
= 0x1a, .speakers
= { FRC
, FLC
, 0, RC
, FC
, 0, FR
, FL
} },
312 { .ca_index
= 0x1b, .speakers
= { FRC
, FLC
, 0, RC
, FC
, LFE
, FR
, FL
} },
313 { .ca_index
= 0x1c, .speakers
= { FRC
, FLC
, RR
, RL
, 0, 0, FR
, FL
} },
314 { .ca_index
= 0x1d, .speakers
= { FRC
, FLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
315 { .ca_index
= 0x1e, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, 0, FR
, FL
} },
316 { .ca_index
= 0x1f, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
317 { .ca_index
= 0x20, .speakers
= { 0, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
318 { .ca_index
= 0x21, .speakers
= { 0, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
319 { .ca_index
= 0x22, .speakers
= { TC
, 0, RR
, RL
, FC
, 0, FR
, FL
} },
320 { .ca_index
= 0x23, .speakers
= { TC
, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
321 { .ca_index
= 0x24, .speakers
= { FRH
, FLH
, RR
, RL
, 0, 0, FR
, FL
} },
322 { .ca_index
= 0x25, .speakers
= { FRH
, FLH
, RR
, RL
, 0, LFE
, FR
, FL
} },
323 { .ca_index
= 0x26, .speakers
= { FRW
, FLW
, RR
, RL
, 0, 0, FR
, FL
} },
324 { .ca_index
= 0x27, .speakers
= { FRW
, FLW
, RR
, RL
, 0, LFE
, FR
, FL
} },
325 { .ca_index
= 0x28, .speakers
= { TC
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
326 { .ca_index
= 0x29, .speakers
= { TC
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
327 { .ca_index
= 0x2a, .speakers
= { FCH
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
328 { .ca_index
= 0x2b, .speakers
= { FCH
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
329 { .ca_index
= 0x2c, .speakers
= { TC
, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
330 { .ca_index
= 0x2d, .speakers
= { TC
, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
331 { .ca_index
= 0x2e, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, 0, FR
, FL
} },
332 { .ca_index
= 0x2f, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
333 { .ca_index
= 0x30, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, 0, FR
, FL
} },
334 { .ca_index
= 0x31, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, LFE
, FR
, FL
} },
342 #define get_pin(spec, idx) \
343 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
344 #define get_cvt(spec, idx) \
345 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
346 #define get_pcm_rec(spec, idx) \
347 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
349 static int pin_nid_to_pin_index(struct hdmi_spec
*spec
, hda_nid_t pin_nid
)
353 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
354 if (get_pin(spec
, pin_idx
)->pin_nid
== pin_nid
)
357 snd_printk(KERN_WARNING
"HDMI: pin nid %d not registered\n", pin_nid
);
361 static int hinfo_to_pin_index(struct hdmi_spec
*spec
,
362 struct hda_pcm_stream
*hinfo
)
366 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
367 if (get_pcm_rec(spec
, pin_idx
)->stream
== hinfo
)
370 snd_printk(KERN_WARNING
"HDMI: hinfo %p not registered\n", hinfo
);
374 static int cvt_nid_to_cvt_index(struct hdmi_spec
*spec
, hda_nid_t cvt_nid
)
378 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++)
379 if (get_cvt(spec
, cvt_idx
)->cvt_nid
== cvt_nid
)
382 snd_printk(KERN_WARNING
"HDMI: cvt nid %d not registered\n", cvt_nid
);
386 static int hdmi_eld_ctl_info(struct snd_kcontrol
*kcontrol
,
387 struct snd_ctl_elem_info
*uinfo
)
389 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
390 struct hdmi_spec
*spec
= codec
->spec
;
391 struct hdmi_spec_per_pin
*per_pin
;
392 struct hdmi_eld
*eld
;
395 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
397 pin_idx
= kcontrol
->private_value
;
398 per_pin
= get_pin(spec
, pin_idx
);
399 eld
= &per_pin
->sink_eld
;
401 mutex_lock(&per_pin
->lock
);
402 uinfo
->count
= eld
->eld_valid
? eld
->eld_size
: 0;
403 mutex_unlock(&per_pin
->lock
);
408 static int hdmi_eld_ctl_get(struct snd_kcontrol
*kcontrol
,
409 struct snd_ctl_elem_value
*ucontrol
)
411 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
412 struct hdmi_spec
*spec
= codec
->spec
;
413 struct hdmi_spec_per_pin
*per_pin
;
414 struct hdmi_eld
*eld
;
417 pin_idx
= kcontrol
->private_value
;
418 per_pin
= get_pin(spec
, pin_idx
);
419 eld
= &per_pin
->sink_eld
;
421 mutex_lock(&per_pin
->lock
);
422 if (eld
->eld_size
> ARRAY_SIZE(ucontrol
->value
.bytes
.data
)) {
423 mutex_unlock(&per_pin
->lock
);
428 memset(ucontrol
->value
.bytes
.data
, 0,
429 ARRAY_SIZE(ucontrol
->value
.bytes
.data
));
431 memcpy(ucontrol
->value
.bytes
.data
, eld
->eld_buffer
,
433 mutex_unlock(&per_pin
->lock
);
438 static struct snd_kcontrol_new eld_bytes_ctl
= {
439 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
,
440 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
442 .info
= hdmi_eld_ctl_info
,
443 .get
= hdmi_eld_ctl_get
,
446 static int hdmi_create_eld_ctl(struct hda_codec
*codec
, int pin_idx
,
449 struct snd_kcontrol
*kctl
;
450 struct hdmi_spec
*spec
= codec
->spec
;
453 kctl
= snd_ctl_new1(&eld_bytes_ctl
, codec
);
456 kctl
->private_value
= pin_idx
;
457 kctl
->id
.device
= device
;
459 err
= snd_hda_ctl_add(codec
, get_pin(spec
, pin_idx
)->pin_nid
, kctl
);
463 get_pin(spec
, pin_idx
)->eld_ctl
= kctl
;
468 static void hdmi_get_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
469 int *packet_index
, int *byte_index
)
473 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
474 AC_VERB_GET_HDMI_DIP_INDEX
, 0);
476 *packet_index
= val
>> 5;
477 *byte_index
= val
& 0x1f;
481 static void hdmi_set_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
482 int packet_index
, int byte_index
)
486 val
= (packet_index
<< 5) | (byte_index
& 0x1f);
488 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_INDEX
, val
);
491 static void hdmi_write_dip_byte(struct hda_codec
*codec
, hda_nid_t pin_nid
,
494 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_DATA
, val
);
497 static void hdmi_init_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
500 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
501 snd_hda_codec_write(codec
, pin_nid
, 0,
502 AC_VERB_SET_AMP_GAIN_MUTE
, AMP_OUT_UNMUTE
);
503 /* Enable pin out: some machines with GM965 gets broken output when
504 * the pin is disabled or changed while using with HDMI
506 snd_hda_codec_write(codec
, pin_nid
, 0,
507 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
510 static int hdmi_get_channel_count(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
512 return 1 + snd_hda_codec_read(codec
, cvt_nid
, 0,
513 AC_VERB_GET_CVT_CHAN_COUNT
, 0);
516 static void hdmi_set_channel_count(struct hda_codec
*codec
,
517 hda_nid_t cvt_nid
, int chs
)
519 if (chs
!= hdmi_get_channel_count(codec
, cvt_nid
))
520 snd_hda_codec_write(codec
, cvt_nid
, 0,
521 AC_VERB_SET_CVT_CHAN_COUNT
, chs
- 1);
528 #ifdef CONFIG_PROC_FS
529 static void print_eld_info(struct snd_info_entry
*entry
,
530 struct snd_info_buffer
*buffer
)
532 struct hdmi_spec_per_pin
*per_pin
= entry
->private_data
;
534 mutex_lock(&per_pin
->lock
);
535 snd_hdmi_print_eld_info(&per_pin
->sink_eld
, buffer
);
536 mutex_unlock(&per_pin
->lock
);
539 static void write_eld_info(struct snd_info_entry
*entry
,
540 struct snd_info_buffer
*buffer
)
542 struct hdmi_spec_per_pin
*per_pin
= entry
->private_data
;
544 mutex_lock(&per_pin
->lock
);
545 snd_hdmi_write_eld_info(&per_pin
->sink_eld
, buffer
);
546 mutex_unlock(&per_pin
->lock
);
549 static int eld_proc_new(struct hdmi_spec_per_pin
*per_pin
, int index
)
552 struct hda_codec
*codec
= per_pin
->codec
;
553 struct snd_info_entry
*entry
;
556 snprintf(name
, sizeof(name
), "eld#%d.%d", codec
->addr
, index
);
557 err
= snd_card_proc_new(codec
->bus
->card
, name
, &entry
);
561 snd_info_set_text_ops(entry
, per_pin
, print_eld_info
);
562 entry
->c
.text
.write
= write_eld_info
;
563 entry
->mode
|= S_IWUSR
;
564 per_pin
->proc_entry
= entry
;
569 static void eld_proc_free(struct hdmi_spec_per_pin
*per_pin
)
571 if (!per_pin
->codec
->bus
->shutdown
&& per_pin
->proc_entry
) {
572 snd_device_free(per_pin
->codec
->bus
->card
, per_pin
->proc_entry
);
573 per_pin
->proc_entry
= NULL
;
577 static inline int eld_proc_new(struct hdmi_spec_per_pin
*per_pin
,
582 static inline void eld_proc_free(struct hdmi_spec_per_pin
*per_pin
)
588 * Channel mapping routines
592 * Compute derived values in channel_allocations[].
594 static void init_channel_allocations(void)
597 struct cea_channel_speaker_allocation
*p
;
599 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
600 p
= channel_allocations
+ i
;
603 for (j
= 0; j
< ARRAY_SIZE(p
->speakers
); j
++)
604 if (p
->speakers
[j
]) {
606 p
->spk_mask
|= p
->speakers
[j
];
611 static int get_channel_allocation_order(int ca
)
615 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
616 if (channel_allocations
[i
].ca_index
== ca
)
623 * The transformation takes two steps:
625 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
626 * spk_mask => (channel_allocations[]) => ai->CA
628 * TODO: it could select the wrong CA from multiple candidates.
630 static int hdmi_channel_allocation(struct hdmi_eld
*eld
, int channels
)
635 char buf
[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE
];
638 * CA defaults to 0 for basic stereo audio
644 * expand ELD's speaker allocation mask
646 * ELD tells the speaker mask in a compact(paired) form,
647 * expand ELD's notions to match the ones used by Audio InfoFrame.
649 for (i
= 0; i
< ARRAY_SIZE(eld_speaker_allocation_bits
); i
++) {
650 if (eld
->info
.spk_alloc
& (1 << i
))
651 spk_mask
|= eld_speaker_allocation_bits
[i
];
654 /* search for the first working match in the CA table */
655 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
656 if (channels
== channel_allocations
[i
].channels
&&
657 (spk_mask
& channel_allocations
[i
].spk_mask
) ==
658 channel_allocations
[i
].spk_mask
) {
659 ca
= channel_allocations
[i
].ca_index
;
665 /* if there was no match, select the regular ALSA channel
666 * allocation with the matching number of channels */
667 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
668 if (channels
== channel_allocations
[i
].channels
) {
669 ca
= channel_allocations
[i
].ca_index
;
675 snd_print_channel_allocation(eld
->info
.spk_alloc
, buf
, sizeof(buf
));
676 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
682 static void hdmi_debug_channel_mapping(struct hda_codec
*codec
,
685 #ifdef CONFIG_SND_DEBUG_VERBOSE
686 struct hdmi_spec
*spec
= codec
->spec
;
690 for (i
= 0; i
< 8; i
++) {
691 channel
= spec
->ops
.pin_get_slot_channel(codec
, pin_nid
, i
);
692 printk(KERN_DEBUG
"HDMI: ASP channel %d => slot %d\n",
698 static void hdmi_std_setup_channel_mapping(struct hda_codec
*codec
,
703 struct hdmi_spec
*spec
= codec
->spec
;
704 struct cea_channel_speaker_allocation
*ch_alloc
;
708 int non_pcm_mapping
[8];
710 order
= get_channel_allocation_order(ca
);
711 ch_alloc
= &channel_allocations
[order
];
713 if (hdmi_channel_mapping
[ca
][1] == 0) {
715 /* fill actual channel mappings in ALSA channel (i) order */
716 for (i
= 0; i
< ch_alloc
->channels
; i
++) {
717 while (!ch_alloc
->speakers
[7 - hdmi_slot
] && !WARN_ON(hdmi_slot
>= 8))
718 hdmi_slot
++; /* skip zero slots */
720 hdmi_channel_mapping
[ca
][i
] = (i
<< 4) | hdmi_slot
++;
722 /* fill the rest of the slots with ALSA channel 0xf */
723 for (hdmi_slot
= 0; hdmi_slot
< 8; hdmi_slot
++)
724 if (!ch_alloc
->speakers
[7 - hdmi_slot
])
725 hdmi_channel_mapping
[ca
][i
++] = (0xf << 4) | hdmi_slot
;
729 for (i
= 0; i
< ch_alloc
->channels
; i
++)
730 non_pcm_mapping
[i
] = (i
<< 4) | i
;
732 non_pcm_mapping
[i
] = (0xf << 4) | i
;
735 for (i
= 0; i
< 8; i
++) {
736 int slotsetup
= non_pcm
? non_pcm_mapping
[i
] : hdmi_channel_mapping
[ca
][i
];
737 int hdmi_slot
= slotsetup
& 0x0f;
738 int channel
= (slotsetup
& 0xf0) >> 4;
739 err
= spec
->ops
.pin_set_slot_channel(codec
, pin_nid
, hdmi_slot
, channel
);
741 snd_printdd(KERN_NOTICE
742 "HDMI: channel mapping failed\n");
748 struct channel_map_table
{
749 unsigned char map
; /* ALSA API channel map position */
750 int spk_mask
; /* speaker position bit mask */
753 static struct channel_map_table map_tables
[] = {
754 { SNDRV_CHMAP_FL
, FL
},
755 { SNDRV_CHMAP_FR
, FR
},
756 { SNDRV_CHMAP_RL
, RL
},
757 { SNDRV_CHMAP_RR
, RR
},
758 { SNDRV_CHMAP_LFE
, LFE
},
759 { SNDRV_CHMAP_FC
, FC
},
760 { SNDRV_CHMAP_RLC
, RLC
},
761 { SNDRV_CHMAP_RRC
, RRC
},
762 { SNDRV_CHMAP_RC
, RC
},
763 { SNDRV_CHMAP_FLC
, FLC
},
764 { SNDRV_CHMAP_FRC
, FRC
},
765 { SNDRV_CHMAP_FLH
, FLH
},
766 { SNDRV_CHMAP_FRH
, FRH
},
767 { SNDRV_CHMAP_FLW
, FLW
},
768 { SNDRV_CHMAP_FRW
, FRW
},
769 { SNDRV_CHMAP_TC
, TC
},
770 { SNDRV_CHMAP_FCH
, FCH
},
774 /* from ALSA API channel position to speaker bit mask */
775 static int to_spk_mask(unsigned char c
)
777 struct channel_map_table
*t
= map_tables
;
778 for (; t
->map
; t
++) {
785 /* from ALSA API channel position to CEA slot */
786 static int to_cea_slot(int ordered_ca
, unsigned char pos
)
788 int mask
= to_spk_mask(pos
);
792 for (i
= 0; i
< 8; i
++) {
793 if (channel_allocations
[ordered_ca
].speakers
[7 - i
] == mask
)
801 /* from speaker bit mask to ALSA API channel position */
802 static int spk_to_chmap(int spk
)
804 struct channel_map_table
*t
= map_tables
;
805 for (; t
->map
; t
++) {
806 if (t
->spk_mask
== spk
)
812 /* from CEA slot to ALSA API channel position */
813 static int from_cea_slot(int ordered_ca
, unsigned char slot
)
815 int mask
= channel_allocations
[ordered_ca
].speakers
[7 - slot
];
817 return spk_to_chmap(mask
);
820 /* get the CA index corresponding to the given ALSA API channel map */
821 static int hdmi_manual_channel_allocation(int chs
, unsigned char *map
)
823 int i
, spks
= 0, spk_mask
= 0;
825 for (i
= 0; i
< chs
; i
++) {
826 int mask
= to_spk_mask(map
[i
]);
833 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
834 if ((chs
== channel_allocations
[i
].channels
||
835 spks
== channel_allocations
[i
].channels
) &&
836 (spk_mask
& channel_allocations
[i
].spk_mask
) ==
837 channel_allocations
[i
].spk_mask
)
838 return channel_allocations
[i
].ca_index
;
843 /* set up the channel slots for the given ALSA API channel map */
844 static int hdmi_manual_setup_channel_mapping(struct hda_codec
*codec
,
846 int chs
, unsigned char *map
,
849 struct hdmi_spec
*spec
= codec
->spec
;
850 int ordered_ca
= get_channel_allocation_order(ca
);
851 int alsa_pos
, hdmi_slot
;
852 int assignments
[8] = {[0 ... 7] = 0xf};
854 for (alsa_pos
= 0; alsa_pos
< chs
; alsa_pos
++) {
856 hdmi_slot
= to_cea_slot(ordered_ca
, map
[alsa_pos
]);
859 continue; /* unassigned channel */
861 assignments
[hdmi_slot
] = alsa_pos
;
864 for (hdmi_slot
= 0; hdmi_slot
< 8; hdmi_slot
++) {
867 err
= spec
->ops
.pin_set_slot_channel(codec
, pin_nid
, hdmi_slot
,
868 assignments
[hdmi_slot
]);
875 /* store ALSA API channel map from the current default map */
876 static void hdmi_setup_fake_chmap(unsigned char *map
, int ca
)
879 int ordered_ca
= get_channel_allocation_order(ca
);
880 for (i
= 0; i
< 8; i
++) {
881 if (i
< channel_allocations
[ordered_ca
].channels
)
882 map
[i
] = from_cea_slot(ordered_ca
, hdmi_channel_mapping
[ca
][i
] & 0x0f);
888 static void hdmi_setup_channel_mapping(struct hda_codec
*codec
,
889 hda_nid_t pin_nid
, bool non_pcm
, int ca
,
890 int channels
, unsigned char *map
,
893 if (!non_pcm
&& chmap_set
) {
894 hdmi_manual_setup_channel_mapping(codec
, pin_nid
,
897 hdmi_std_setup_channel_mapping(codec
, pin_nid
, non_pcm
, ca
);
898 hdmi_setup_fake_chmap(map
, ca
);
901 hdmi_debug_channel_mapping(codec
, pin_nid
);
904 static int hdmi_pin_set_slot_channel(struct hda_codec
*codec
, hda_nid_t pin_nid
,
905 int asp_slot
, int channel
)
907 return snd_hda_codec_write(codec
, pin_nid
, 0,
908 AC_VERB_SET_HDMI_CHAN_SLOT
,
909 (channel
<< 4) | asp_slot
);
912 static int hdmi_pin_get_slot_channel(struct hda_codec
*codec
, hda_nid_t pin_nid
,
915 return (snd_hda_codec_read(codec
, pin_nid
, 0,
916 AC_VERB_GET_HDMI_CHAN_SLOT
,
917 asp_slot
) & 0xf0) >> 4;
921 * Audio InfoFrame routines
925 * Enable Audio InfoFrame Transmission
927 static void hdmi_start_infoframe_trans(struct hda_codec
*codec
,
930 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
931 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
936 * Disable Audio InfoFrame Transmission
938 static void hdmi_stop_infoframe_trans(struct hda_codec
*codec
,
941 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
942 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
946 static void hdmi_debug_dip_size(struct hda_codec
*codec
, hda_nid_t pin_nid
)
948 #ifdef CONFIG_SND_DEBUG_VERBOSE
952 size
= snd_hdmi_get_eld_size(codec
, pin_nid
);
953 printk(KERN_DEBUG
"HDMI: ELD buf size is %d\n", size
);
955 for (i
= 0; i
< 8; i
++) {
956 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
957 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
958 printk(KERN_DEBUG
"HDMI: DIP GP[%d] buf size is %d\n", i
, size
);
963 static void hdmi_clear_dip_buffers(struct hda_codec
*codec
, hda_nid_t pin_nid
)
969 for (i
= 0; i
< 8; i
++) {
970 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
971 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
975 hdmi_set_dip_index(codec
, pin_nid
, i
, 0x0);
976 for (j
= 1; j
< 1000; j
++) {
977 hdmi_write_dip_byte(codec
, pin_nid
, 0x0);
978 hdmi_get_dip_index(codec
, pin_nid
, &pi
, &bi
);
980 snd_printd(KERN_INFO
"dip index %d: %d != %d\n",
982 if (bi
== 0) /* byte index wrapped around */
986 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
992 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe
*hdmi_ai
)
994 u8
*bytes
= (u8
*)hdmi_ai
;
998 hdmi_ai
->checksum
= 0;
1000 for (i
= 0; i
< sizeof(*hdmi_ai
); i
++)
1003 hdmi_ai
->checksum
= -sum
;
1006 static void hdmi_fill_audio_infoframe(struct hda_codec
*codec
,
1012 hdmi_debug_dip_size(codec
, pin_nid
);
1013 hdmi_clear_dip_buffers(codec
, pin_nid
); /* be paranoid */
1015 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
1016 for (i
= 0; i
< size
; i
++)
1017 hdmi_write_dip_byte(codec
, pin_nid
, dip
[i
]);
1020 static bool hdmi_infoframe_uptodate(struct hda_codec
*codec
, hda_nid_t pin_nid
,
1026 if (snd_hda_codec_read(codec
, pin_nid
, 0, AC_VERB_GET_HDMI_DIP_XMIT
, 0)
1030 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
1031 for (i
= 0; i
< size
; i
++) {
1032 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
1033 AC_VERB_GET_HDMI_DIP_DATA
, 0);
1041 static void hdmi_pin_setup_infoframe(struct hda_codec
*codec
,
1043 int ca
, int active_channels
,
1046 union audio_infoframe ai
;
1048 if (conn_type
== 0) { /* HDMI */
1049 struct hdmi_audio_infoframe
*hdmi_ai
= &ai
.hdmi
;
1051 hdmi_ai
->type
= 0x84;
1052 hdmi_ai
->ver
= 0x01;
1053 hdmi_ai
->len
= 0x0a;
1054 hdmi_ai
->CC02_CT47
= active_channels
- 1;
1056 hdmi_checksum_audio_infoframe(hdmi_ai
);
1057 } else if (conn_type
== 1) { /* DisplayPort */
1058 struct dp_audio_infoframe
*dp_ai
= &ai
.dp
;
1062 dp_ai
->ver
= 0x11 << 2;
1063 dp_ai
->CC02_CT47
= active_channels
- 1;
1066 snd_printd("HDMI: unknown connection type at pin %d\n",
1072 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1073 * sizeof(*dp_ai) to avoid partial match/update problems when
1074 * the user switches between HDMI/DP monitors.
1076 if (!hdmi_infoframe_uptodate(codec
, pin_nid
, ai
.bytes
,
1078 snd_printdd("hdmi_pin_setup_infoframe: "
1079 "pin=%d channels=%d ca=0x%02x\n",
1081 active_channels
, ca
);
1082 hdmi_stop_infoframe_trans(codec
, pin_nid
);
1083 hdmi_fill_audio_infoframe(codec
, pin_nid
,
1084 ai
.bytes
, sizeof(ai
));
1085 hdmi_start_infoframe_trans(codec
, pin_nid
);
1089 static void hdmi_setup_audio_infoframe(struct hda_codec
*codec
,
1090 struct hdmi_spec_per_pin
*per_pin
,
1093 struct hdmi_spec
*spec
= codec
->spec
;
1094 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1095 int channels
= per_pin
->channels
;
1096 int active_channels
;
1097 struct hdmi_eld
*eld
;
1103 if (is_haswell(codec
))
1104 snd_hda_codec_write(codec
, pin_nid
, 0,
1105 AC_VERB_SET_AMP_GAIN_MUTE
,
1108 eld
= &per_pin
->sink_eld
;
1109 if (!eld
->monitor_present
)
1112 if (!non_pcm
&& per_pin
->chmap_set
)
1113 ca
= hdmi_manual_channel_allocation(channels
, per_pin
->chmap
);
1115 ca
= hdmi_channel_allocation(eld
, channels
);
1119 ordered_ca
= get_channel_allocation_order(ca
);
1120 active_channels
= channel_allocations
[ordered_ca
].channels
;
1122 hdmi_set_channel_count(codec
, per_pin
->cvt_nid
, active_channels
);
1125 * always configure channel mapping, it may have been changed by the
1126 * user in the meantime
1128 hdmi_setup_channel_mapping(codec
, pin_nid
, non_pcm
, ca
,
1129 channels
, per_pin
->chmap
,
1130 per_pin
->chmap_set
);
1132 spec
->ops
.pin_setup_infoframe(codec
, pin_nid
, ca
, active_channels
,
1133 eld
->info
.conn_type
);
1135 per_pin
->non_pcm
= non_pcm
;
1139 * Unsolicited events
1142 static void hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
);
1144 static void hdmi_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
1146 struct hdmi_spec
*spec
= codec
->spec
;
1147 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
1150 struct hda_jack_tbl
*jack
;
1151 int dev_entry
= (res
& AC_UNSOL_RES_DE
) >> AC_UNSOL_RES_DE_SHIFT
;
1153 jack
= snd_hda_jack_tbl_get_from_tag(codec
, tag
);
1156 pin_nid
= jack
->nid
;
1157 jack
->jack_dirty
= 1;
1159 _snd_printd(SND_PR_VERBOSE
,
1160 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1161 codec
->addr
, pin_nid
, dev_entry
, !!(res
& AC_UNSOL_RES_IA
),
1162 !!(res
& AC_UNSOL_RES_PD
), !!(res
& AC_UNSOL_RES_ELDV
));
1164 pin_idx
= pin_nid_to_pin_index(spec
, pin_nid
);
1168 hdmi_present_sense(get_pin(spec
, pin_idx
), 1);
1169 snd_hda_jack_report_sync(codec
);
1172 static void hdmi_non_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
1174 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
1175 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
1176 int cp_state
= !!(res
& AC_UNSOL_RES_CP_STATE
);
1177 int cp_ready
= !!(res
& AC_UNSOL_RES_CP_READY
);
1180 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1195 static void hdmi_unsol_event(struct hda_codec
*codec
, unsigned int res
)
1197 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
1198 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
1200 if (!snd_hda_jack_tbl_get_from_tag(codec
, tag
)) {
1201 snd_printd(KERN_INFO
"Unexpected HDMI event tag 0x%x\n", tag
);
1206 hdmi_intrinsic_event(codec
, res
);
1208 hdmi_non_intrinsic_event(codec
, res
);
1211 static void haswell_verify_D0(struct hda_codec
*codec
,
1212 hda_nid_t cvt_nid
, hda_nid_t nid
)
1216 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1217 * thus pins could only choose converter 0 for use. Make sure the
1218 * converters are in correct power state */
1219 if (!snd_hda_check_power_state(codec
, cvt_nid
, AC_PWRST_D0
))
1220 snd_hda_codec_write(codec
, cvt_nid
, 0, AC_VERB_SET_POWER_STATE
, AC_PWRST_D0
);
1222 if (!snd_hda_check_power_state(codec
, nid
, AC_PWRST_D0
)) {
1223 snd_hda_codec_write(codec
, nid
, 0, AC_VERB_SET_POWER_STATE
,
1226 pwr
= snd_hda_codec_read(codec
, nid
, 0, AC_VERB_GET_POWER_STATE
, 0);
1227 pwr
= (pwr
& AC_PWRST_ACTUAL
) >> AC_PWRST_ACTUAL_SHIFT
;
1228 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid
, pwr
);
1236 /* HBR should be Non-PCM, 8 channels */
1237 #define is_hbr_format(format) \
1238 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1240 static int hdmi_pin_hbr_setup(struct hda_codec
*codec
, hda_nid_t pin_nid
,
1243 int pinctl
, new_pinctl
;
1245 if (snd_hda_query_pin_caps(codec
, pin_nid
) & AC_PINCAP_HBR
) {
1246 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
1247 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1249 new_pinctl
= pinctl
& ~AC_PINCTL_EPT
;
1251 new_pinctl
|= AC_PINCTL_EPT_HBR
;
1253 new_pinctl
|= AC_PINCTL_EPT_NATIVE
;
1255 snd_printdd("hdmi_pin_hbr_setup: "
1256 "NID=0x%x, %spinctl=0x%x\n",
1258 pinctl
== new_pinctl
? "" : "new-",
1261 if (pinctl
!= new_pinctl
)
1262 snd_hda_codec_write(codec
, pin_nid
, 0,
1263 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1271 static int hdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
1272 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
1274 struct hdmi_spec
*spec
= codec
->spec
;
1277 if (is_haswell(codec
))
1278 haswell_verify_D0(codec
, cvt_nid
, pin_nid
);
1280 err
= spec
->ops
.pin_hbr_setup(codec
, pin_nid
, is_hbr_format(format
));
1283 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1287 snd_hda_codec_setup_stream(codec
, cvt_nid
, stream_tag
, 0, format
);
1291 static int hdmi_choose_cvt(struct hda_codec
*codec
,
1292 int pin_idx
, int *cvt_id
, int *mux_id
)
1294 struct hdmi_spec
*spec
= codec
->spec
;
1295 struct hdmi_spec_per_pin
*per_pin
;
1296 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1297 int cvt_idx
, mux_idx
= 0;
1299 per_pin
= get_pin(spec
, pin_idx
);
1301 /* Dynamically assign converter to stream */
1302 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
1303 per_cvt
= get_cvt(spec
, cvt_idx
);
1305 /* Must not already be assigned */
1306 if (per_cvt
->assigned
)
1308 /* Must be in pin's mux's list of converters */
1309 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
1310 if (per_pin
->mux_nids
[mux_idx
] == per_cvt
->cvt_nid
)
1312 /* Not in mux list */
1313 if (mux_idx
== per_pin
->num_mux_nids
)
1318 /* No free converters */
1319 if (cvt_idx
== spec
->num_cvts
)
1330 static void haswell_config_cvts(struct hda_codec
*codec
,
1331 hda_nid_t pin_nid
, int mux_idx
)
1333 struct hdmi_spec
*spec
= codec
->spec
;
1334 hda_nid_t nid
, end_nid
;
1336 struct hdmi_spec_per_cvt
*per_cvt
;
1338 /* configure all pins, including "no physical connection" ones */
1339 end_nid
= codec
->start_nid
+ codec
->num_nodes
;
1340 for (nid
= codec
->start_nid
; nid
< end_nid
; nid
++) {
1341 unsigned int wid_caps
= get_wcaps(codec
, nid
);
1342 unsigned int wid_type
= get_wcaps_type(wid_caps
);
1344 if (wid_type
!= AC_WID_PIN
)
1350 curr
= snd_hda_codec_read(codec
, nid
, 0,
1351 AC_VERB_GET_CONNECT_SEL
, 0);
1352 if (curr
!= mux_idx
)
1355 /* choose an unassigned converter. The conveters in the
1356 * connection list are in the same order as in the codec.
1358 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
1359 per_cvt
= get_cvt(spec
, cvt_idx
);
1360 if (!per_cvt
->assigned
) {
1361 snd_printdd("choose cvt %d for pin nid %d\n",
1363 snd_hda_codec_write_cache(codec
, nid
, 0,
1364 AC_VERB_SET_CONNECT_SEL
,
1375 static int hdmi_pcm_open(struct hda_pcm_stream
*hinfo
,
1376 struct hda_codec
*codec
,
1377 struct snd_pcm_substream
*substream
)
1379 struct hdmi_spec
*spec
= codec
->spec
;
1380 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1381 int pin_idx
, cvt_idx
, mux_idx
= 0;
1382 struct hdmi_spec_per_pin
*per_pin
;
1383 struct hdmi_eld
*eld
;
1384 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1387 /* Validate hinfo */
1388 pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1389 if (snd_BUG_ON(pin_idx
< 0))
1391 per_pin
= get_pin(spec
, pin_idx
);
1392 eld
= &per_pin
->sink_eld
;
1394 err
= hdmi_choose_cvt(codec
, pin_idx
, &cvt_idx
, &mux_idx
);
1398 per_cvt
= get_cvt(spec
, cvt_idx
);
1399 /* Claim converter */
1400 per_cvt
->assigned
= 1;
1401 per_pin
->cvt_nid
= per_cvt
->cvt_nid
;
1402 hinfo
->nid
= per_cvt
->cvt_nid
;
1404 snd_hda_codec_write_cache(codec
, per_pin
->pin_nid
, 0,
1405 AC_VERB_SET_CONNECT_SEL
,
1408 /* configure unused pins to choose other converters */
1409 if (is_haswell(codec
))
1410 haswell_config_cvts(codec
, per_pin
->pin_nid
, mux_idx
);
1412 snd_hda_spdif_ctls_assign(codec
, pin_idx
, per_cvt
->cvt_nid
);
1414 /* Initially set the converter's capabilities */
1415 hinfo
->channels_min
= per_cvt
->channels_min
;
1416 hinfo
->channels_max
= per_cvt
->channels_max
;
1417 hinfo
->rates
= per_cvt
->rates
;
1418 hinfo
->formats
= per_cvt
->formats
;
1419 hinfo
->maxbps
= per_cvt
->maxbps
;
1421 /* Restrict capabilities by ELD if this isn't disabled */
1422 if (!static_hdmi_pcm
&& eld
->eld_valid
) {
1423 snd_hdmi_eld_update_pcm_info(&eld
->info
, hinfo
);
1424 if (hinfo
->channels_min
> hinfo
->channels_max
||
1425 !hinfo
->rates
|| !hinfo
->formats
) {
1426 per_cvt
->assigned
= 0;
1428 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1433 /* Store the updated parameters */
1434 runtime
->hw
.channels_min
= hinfo
->channels_min
;
1435 runtime
->hw
.channels_max
= hinfo
->channels_max
;
1436 runtime
->hw
.formats
= hinfo
->formats
;
1437 runtime
->hw
.rates
= hinfo
->rates
;
1439 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1440 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1445 * HDA/HDMI auto parsing
1447 static int hdmi_read_pin_conn(struct hda_codec
*codec
, int pin_idx
)
1449 struct hdmi_spec
*spec
= codec
->spec
;
1450 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1451 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1453 if (!(get_wcaps(codec
, pin_nid
) & AC_WCAP_CONN_LIST
)) {
1454 snd_printk(KERN_WARNING
1455 "HDMI: pin %d wcaps %#x "
1456 "does not support connection list\n",
1457 pin_nid
, get_wcaps(codec
, pin_nid
));
1461 per_pin
->num_mux_nids
= snd_hda_get_connections(codec
, pin_nid
,
1463 HDA_MAX_CONNECTIONS
);
1468 static void hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
)
1470 struct hda_codec
*codec
= per_pin
->codec
;
1471 struct hdmi_spec
*spec
= codec
->spec
;
1472 struct hdmi_eld
*eld
= &spec
->temp_eld
;
1473 struct hdmi_eld
*pin_eld
= &per_pin
->sink_eld
;
1474 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1476 * Always execute a GetPinSense verb here, even when called from
1477 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1478 * response's PD bit is not the real PD value, but indicates that
1479 * the real PD value changed. An older version of the HD-audio
1480 * specification worked this way. Hence, we just ignore the data in
1481 * the unsolicited response to avoid custom WARs.
1483 int present
= snd_hda_pin_sense(codec
, pin_nid
);
1484 bool update_eld
= false;
1485 bool eld_changed
= false;
1487 mutex_lock(&per_pin
->lock
);
1488 pin_eld
->monitor_present
= !!(present
& AC_PINSENSE_PRESENCE
);
1489 if (pin_eld
->monitor_present
)
1490 eld
->eld_valid
= !!(present
& AC_PINSENSE_ELDV
);
1492 eld
->eld_valid
= false;
1494 _snd_printd(SND_PR_VERBOSE
,
1495 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1496 codec
->addr
, pin_nid
, pin_eld
->monitor_present
, eld
->eld_valid
);
1498 if (eld
->eld_valid
) {
1499 if (spec
->ops
.pin_get_eld(codec
, pin_nid
, eld
->eld_buffer
,
1500 &eld
->eld_size
) < 0)
1501 eld
->eld_valid
= false;
1503 memset(&eld
->info
, 0, sizeof(struct parsed_hdmi_eld
));
1504 if (snd_hdmi_parse_eld(&eld
->info
, eld
->eld_buffer
,
1506 eld
->eld_valid
= false;
1509 if (eld
->eld_valid
) {
1510 snd_hdmi_show_eld(&eld
->info
);
1514 queue_delayed_work(codec
->bus
->workq
,
1516 msecs_to_jiffies(300));
1521 if (pin_eld
->eld_valid
&& !eld
->eld_valid
) {
1526 bool old_eld_valid
= pin_eld
->eld_valid
;
1527 pin_eld
->eld_valid
= eld
->eld_valid
;
1528 eld_changed
= pin_eld
->eld_size
!= eld
->eld_size
||
1529 memcmp(pin_eld
->eld_buffer
, eld
->eld_buffer
,
1530 eld
->eld_size
) != 0;
1532 memcpy(pin_eld
->eld_buffer
, eld
->eld_buffer
,
1534 pin_eld
->eld_size
= eld
->eld_size
;
1535 pin_eld
->info
= eld
->info
;
1537 /* Haswell-specific workaround: re-setup when the transcoder is
1538 * changed during the stream playback
1540 if (is_haswell(codec
) &&
1541 eld
->eld_valid
&& !old_eld_valid
&& per_pin
->setup
)
1542 hdmi_setup_audio_infoframe(codec
, per_pin
,
1547 snd_ctl_notify(codec
->bus
->card
,
1548 SNDRV_CTL_EVENT_MASK_VALUE
| SNDRV_CTL_EVENT_MASK_INFO
,
1549 &per_pin
->eld_ctl
->id
);
1551 mutex_unlock(&per_pin
->lock
);
1554 static void hdmi_repoll_eld(struct work_struct
*work
)
1556 struct hdmi_spec_per_pin
*per_pin
=
1557 container_of(to_delayed_work(work
), struct hdmi_spec_per_pin
, work
);
1559 if (per_pin
->repoll_count
++ > 6)
1560 per_pin
->repoll_count
= 0;
1562 hdmi_present_sense(per_pin
, per_pin
->repoll_count
);
1565 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
,
1568 static int hdmi_add_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
1570 struct hdmi_spec
*spec
= codec
->spec
;
1571 unsigned int caps
, config
;
1573 struct hdmi_spec_per_pin
*per_pin
;
1576 caps
= snd_hda_query_pin_caps(codec
, pin_nid
);
1577 if (!(caps
& (AC_PINCAP_HDMI
| AC_PINCAP_DP
)))
1580 config
= snd_hda_codec_get_pincfg(codec
, pin_nid
);
1581 if (get_defcfg_connect(config
) == AC_JACK_PORT_NONE
)
1584 if (is_haswell(codec
))
1585 intel_haswell_fixup_connect_list(codec
, pin_nid
);
1587 pin_idx
= spec
->num_pins
;
1588 per_pin
= snd_array_new(&spec
->pins
);
1592 per_pin
->pin_nid
= pin_nid
;
1593 per_pin
->non_pcm
= false;
1595 err
= hdmi_read_pin_conn(codec
, pin_idx
);
1604 static int hdmi_add_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1606 struct hdmi_spec
*spec
= codec
->spec
;
1607 struct hdmi_spec_per_cvt
*per_cvt
;
1611 chans
= get_wcaps(codec
, cvt_nid
);
1612 chans
= get_wcaps_channels(chans
);
1614 per_cvt
= snd_array_new(&spec
->cvts
);
1618 per_cvt
->cvt_nid
= cvt_nid
;
1619 per_cvt
->channels_min
= 2;
1621 per_cvt
->channels_max
= chans
;
1622 if (chans
> spec
->channels_max
)
1623 spec
->channels_max
= chans
;
1626 err
= snd_hda_query_supported_pcm(codec
, cvt_nid
,
1633 if (spec
->num_cvts
< ARRAY_SIZE(spec
->cvt_nids
))
1634 spec
->cvt_nids
[spec
->num_cvts
] = cvt_nid
;
1640 static int hdmi_parse_codec(struct hda_codec
*codec
)
1645 nodes
= snd_hda_get_sub_nodes(codec
, codec
->afg
, &nid
);
1646 if (!nid
|| nodes
< 0) {
1647 snd_printk(KERN_WARNING
"HDMI: failed to get afg sub nodes\n");
1651 for (i
= 0; i
< nodes
; i
++, nid
++) {
1655 caps
= get_wcaps(codec
, nid
);
1656 type
= get_wcaps_type(caps
);
1658 if (!(caps
& AC_WCAP_DIGITAL
))
1662 case AC_WID_AUD_OUT
:
1663 hdmi_add_cvt(codec
, nid
);
1666 hdmi_add_pin(codec
, nid
);
1672 /* We're seeing some problems with unsolicited hot plug events on
1673 * PantherPoint after S3, if this is not enabled */
1674 if (codec
->vendor_id
== 0x80862806)
1675 codec
->bus
->power_keep_link_on
= 1;
1677 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1678 * can be lost and presence sense verb will become inaccurate if the
1679 * HDA link is powered off at hot plug or hw initialization time.
1681 else if (!(snd_hda_param_read(codec
, codec
->afg
, AC_PAR_POWER_STATE
) &
1683 codec
->bus
->power_keep_link_on
= 1;
1691 static bool check_non_pcm_per_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1693 struct hda_spdif_out
*spdif
;
1696 mutex_lock(&codec
->spdif_mutex
);
1697 spdif
= snd_hda_spdif_out_of_nid(codec
, cvt_nid
);
1698 non_pcm
= !!(spdif
->status
& IEC958_AES0_NONAUDIO
);
1699 mutex_unlock(&codec
->spdif_mutex
);
1708 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1709 struct hda_codec
*codec
,
1710 unsigned int stream_tag
,
1711 unsigned int format
,
1712 struct snd_pcm_substream
*substream
)
1714 hda_nid_t cvt_nid
= hinfo
->nid
;
1715 struct hdmi_spec
*spec
= codec
->spec
;
1716 int pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1717 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1718 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1721 non_pcm
= check_non_pcm_per_cvt(codec
, cvt_nid
);
1722 mutex_lock(&per_pin
->lock
);
1723 per_pin
->channels
= substream
->runtime
->channels
;
1724 per_pin
->setup
= true;
1726 hdmi_setup_audio_infoframe(codec
, per_pin
, non_pcm
);
1727 mutex_unlock(&per_pin
->lock
);
1729 return spec
->ops
.setup_stream(codec
, cvt_nid
, pin_nid
, stream_tag
, format
);
1732 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
1733 struct hda_codec
*codec
,
1734 struct snd_pcm_substream
*substream
)
1736 snd_hda_codec_cleanup_stream(codec
, hinfo
->nid
);
1740 static int hdmi_pcm_close(struct hda_pcm_stream
*hinfo
,
1741 struct hda_codec
*codec
,
1742 struct snd_pcm_substream
*substream
)
1744 struct hdmi_spec
*spec
= codec
->spec
;
1745 int cvt_idx
, pin_idx
;
1746 struct hdmi_spec_per_cvt
*per_cvt
;
1747 struct hdmi_spec_per_pin
*per_pin
;
1750 cvt_idx
= cvt_nid_to_cvt_index(spec
, hinfo
->nid
);
1751 if (snd_BUG_ON(cvt_idx
< 0))
1753 per_cvt
= get_cvt(spec
, cvt_idx
);
1755 snd_BUG_ON(!per_cvt
->assigned
);
1756 per_cvt
->assigned
= 0;
1759 pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1760 if (snd_BUG_ON(pin_idx
< 0))
1762 per_pin
= get_pin(spec
, pin_idx
);
1764 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1766 mutex_lock(&per_pin
->lock
);
1767 per_pin
->chmap_set
= false;
1768 memset(per_pin
->chmap
, 0, sizeof(per_pin
->chmap
));
1770 per_pin
->setup
= false;
1771 per_pin
->channels
= 0;
1772 mutex_unlock(&per_pin
->lock
);
1778 static const struct hda_pcm_ops generic_ops
= {
1779 .open
= hdmi_pcm_open
,
1780 .close
= hdmi_pcm_close
,
1781 .prepare
= generic_hdmi_playback_pcm_prepare
,
1782 .cleanup
= generic_hdmi_playback_pcm_cleanup
,
1786 * ALSA API channel-map control callbacks
1788 static int hdmi_chmap_ctl_info(struct snd_kcontrol
*kcontrol
,
1789 struct snd_ctl_elem_info
*uinfo
)
1791 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1792 struct hda_codec
*codec
= info
->private_data
;
1793 struct hdmi_spec
*spec
= codec
->spec
;
1794 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
1795 uinfo
->count
= spec
->channels_max
;
1796 uinfo
->value
.integer
.min
= 0;
1797 uinfo
->value
.integer
.max
= SNDRV_CHMAP_LAST
;
1801 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation
*cap
,
1804 /* If the speaker allocation matches the channel count, it is OK.*/
1805 if (cap
->channels
!= channels
)
1808 /* all channels are remappable freely */
1809 return SNDRV_CTL_TLVT_CHMAP_VAR
;
1812 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation
*cap
,
1813 unsigned int *chmap
, int channels
)
1818 for (c
= 7; c
>= 0; c
--) {
1819 int spk
= cap
->speakers
[c
];
1823 chmap
[count
++] = spk_to_chmap(spk
);
1826 WARN_ON(count
!= channels
);
1829 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol
*kcontrol
, int op_flag
,
1830 unsigned int size
, unsigned int __user
*tlv
)
1832 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1833 struct hda_codec
*codec
= info
->private_data
;
1834 struct hdmi_spec
*spec
= codec
->spec
;
1835 unsigned int __user
*dst
;
1840 if (put_user(SNDRV_CTL_TLVT_CONTAINER
, tlv
))
1844 for (chs
= 2; chs
<= spec
->channels_max
; chs
++) {
1846 struct cea_channel_speaker_allocation
*cap
;
1847 cap
= channel_allocations
;
1848 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++, cap
++) {
1849 int chs_bytes
= chs
* 4;
1850 int type
= spec
->ops
.chmap_cea_alloc_validate_get_type(cap
, chs
);
1851 unsigned int tlv_chmap
[8];
1857 if (put_user(type
, dst
) ||
1858 put_user(chs_bytes
, dst
+ 1))
1863 if (size
< chs_bytes
)
1867 spec
->ops
.cea_alloc_to_tlv_chmap(cap
, tlv_chmap
, chs
);
1868 if (copy_to_user(dst
, tlv_chmap
, chs_bytes
))
1873 if (put_user(count
, tlv
+ 1))
1878 static int hdmi_chmap_ctl_get(struct snd_kcontrol
*kcontrol
,
1879 struct snd_ctl_elem_value
*ucontrol
)
1881 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1882 struct hda_codec
*codec
= info
->private_data
;
1883 struct hdmi_spec
*spec
= codec
->spec
;
1884 int pin_idx
= kcontrol
->private_value
;
1885 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1888 for (i
= 0; i
< ARRAY_SIZE(per_pin
->chmap
); i
++)
1889 ucontrol
->value
.integer
.value
[i
] = per_pin
->chmap
[i
];
1893 static int hdmi_chmap_ctl_put(struct snd_kcontrol
*kcontrol
,
1894 struct snd_ctl_elem_value
*ucontrol
)
1896 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1897 struct hda_codec
*codec
= info
->private_data
;
1898 struct hdmi_spec
*spec
= codec
->spec
;
1899 int pin_idx
= kcontrol
->private_value
;
1900 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1901 unsigned int ctl_idx
;
1902 struct snd_pcm_substream
*substream
;
1903 unsigned char chmap
[8];
1904 int i
, err
, ca
, prepared
= 0;
1906 ctl_idx
= snd_ctl_get_ioffidx(kcontrol
, &ucontrol
->id
);
1907 substream
= snd_pcm_chmap_substream(info
, ctl_idx
);
1908 if (!substream
|| !substream
->runtime
)
1909 return 0; /* just for avoiding error from alsactl restore */
1910 switch (substream
->runtime
->status
->state
) {
1911 case SNDRV_PCM_STATE_OPEN
:
1912 case SNDRV_PCM_STATE_SETUP
:
1914 case SNDRV_PCM_STATE_PREPARED
:
1920 memset(chmap
, 0, sizeof(chmap
));
1921 for (i
= 0; i
< ARRAY_SIZE(chmap
); i
++)
1922 chmap
[i
] = ucontrol
->value
.integer
.value
[i
];
1923 if (!memcmp(chmap
, per_pin
->chmap
, sizeof(chmap
)))
1925 ca
= hdmi_manual_channel_allocation(ARRAY_SIZE(chmap
), chmap
);
1928 if (spec
->ops
.chmap_validate
) {
1929 err
= spec
->ops
.chmap_validate(ca
, ARRAY_SIZE(chmap
), chmap
);
1933 mutex_lock(&per_pin
->lock
);
1934 per_pin
->chmap_set
= true;
1935 memcpy(per_pin
->chmap
, chmap
, sizeof(chmap
));
1937 hdmi_setup_audio_infoframe(codec
, per_pin
, per_pin
->non_pcm
);
1938 mutex_unlock(&per_pin
->lock
);
1943 static int generic_hdmi_build_pcms(struct hda_codec
*codec
)
1945 struct hdmi_spec
*spec
= codec
->spec
;
1948 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1949 struct hda_pcm
*info
;
1950 struct hda_pcm_stream
*pstr
;
1951 struct hdmi_spec_per_pin
*per_pin
;
1953 per_pin
= get_pin(spec
, pin_idx
);
1954 sprintf(per_pin
->pcm_name
, "HDMI %d", pin_idx
);
1955 info
= snd_array_new(&spec
->pcm_rec
);
1958 info
->name
= per_pin
->pcm_name
;
1959 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
1960 info
->own_chmap
= true;
1962 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
1963 pstr
->substreams
= 1;
1964 pstr
->ops
= generic_ops
;
1965 /* other pstr fields are set in open */
1968 codec
->num_pcms
= spec
->num_pins
;
1969 codec
->pcm_info
= spec
->pcm_rec
.list
;
1974 static int generic_hdmi_build_jack(struct hda_codec
*codec
, int pin_idx
)
1976 char hdmi_str
[32] = "HDMI/DP";
1977 struct hdmi_spec
*spec
= codec
->spec
;
1978 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1979 int pcmdev
= get_pcm_rec(spec
, pin_idx
)->device
;
1982 sprintf(hdmi_str
+ strlen(hdmi_str
), ",pcm=%d", pcmdev
);
1983 if (!is_jack_detectable(codec
, per_pin
->pin_nid
))
1984 strncat(hdmi_str
, " Phantom",
1985 sizeof(hdmi_str
) - strlen(hdmi_str
) - 1);
1987 return snd_hda_jack_add_kctl(codec
, per_pin
->pin_nid
, hdmi_str
, 0);
1990 static int generic_hdmi_build_controls(struct hda_codec
*codec
)
1992 struct hdmi_spec
*spec
= codec
->spec
;
1996 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1997 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1999 err
= generic_hdmi_build_jack(codec
, pin_idx
);
2003 err
= snd_hda_create_dig_out_ctls(codec
,
2005 per_pin
->mux_nids
[0],
2009 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
2011 /* add control for ELD Bytes */
2012 err
= hdmi_create_eld_ctl(codec
, pin_idx
,
2013 get_pcm_rec(spec
, pin_idx
)->device
);
2018 hdmi_present_sense(per_pin
, 0);
2021 /* add channel maps */
2022 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2023 struct snd_pcm_chmap
*chmap
;
2024 struct snd_kcontrol
*kctl
;
2027 if (!codec
->pcm_info
[pin_idx
].pcm
)
2029 err
= snd_pcm_add_chmap_ctls(codec
->pcm_info
[pin_idx
].pcm
,
2030 SNDRV_PCM_STREAM_PLAYBACK
,
2031 NULL
, 0, pin_idx
, &chmap
);
2034 /* override handlers */
2035 chmap
->private_data
= codec
;
2037 for (i
= 0; i
< kctl
->count
; i
++)
2038 kctl
->vd
[i
].access
|= SNDRV_CTL_ELEM_ACCESS_WRITE
;
2039 kctl
->info
= hdmi_chmap_ctl_info
;
2040 kctl
->get
= hdmi_chmap_ctl_get
;
2041 kctl
->put
= hdmi_chmap_ctl_put
;
2042 kctl
->tlv
.c
= hdmi_chmap_ctl_tlv
;
2048 static int generic_hdmi_init_per_pins(struct hda_codec
*codec
)
2050 struct hdmi_spec
*spec
= codec
->spec
;
2053 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2054 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2056 per_pin
->codec
= codec
;
2057 mutex_init(&per_pin
->lock
);
2058 INIT_DELAYED_WORK(&per_pin
->work
, hdmi_repoll_eld
);
2059 eld_proc_new(per_pin
, pin_idx
);
2064 static int generic_hdmi_init(struct hda_codec
*codec
)
2066 struct hdmi_spec
*spec
= codec
->spec
;
2069 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2070 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2071 hda_nid_t pin_nid
= per_pin
->pin_nid
;
2073 hdmi_init_pin(codec
, pin_nid
);
2074 snd_hda_jack_detect_enable(codec
, pin_nid
, pin_nid
);
2079 static void hdmi_array_init(struct hdmi_spec
*spec
, int nums
)
2081 snd_array_init(&spec
->pins
, sizeof(struct hdmi_spec_per_pin
), nums
);
2082 snd_array_init(&spec
->cvts
, sizeof(struct hdmi_spec_per_cvt
), nums
);
2083 snd_array_init(&spec
->pcm_rec
, sizeof(struct hda_pcm
), nums
);
2086 static void hdmi_array_free(struct hdmi_spec
*spec
)
2088 snd_array_free(&spec
->pins
);
2089 snd_array_free(&spec
->cvts
);
2090 snd_array_free(&spec
->pcm_rec
);
2093 static void generic_hdmi_free(struct hda_codec
*codec
)
2095 struct hdmi_spec
*spec
= codec
->spec
;
2098 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2099 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2101 cancel_delayed_work(&per_pin
->work
);
2102 eld_proc_free(per_pin
);
2105 flush_workqueue(codec
->bus
->workq
);
2106 hdmi_array_free(spec
);
2111 static int generic_hdmi_resume(struct hda_codec
*codec
)
2113 struct hdmi_spec
*spec
= codec
->spec
;
2116 generic_hdmi_init(codec
);
2117 snd_hda_codec_resume_amp(codec
);
2118 snd_hda_codec_resume_cache(codec
);
2120 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2121 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2122 hdmi_present_sense(per_pin
, 1);
2128 static const struct hda_codec_ops generic_hdmi_patch_ops
= {
2129 .init
= generic_hdmi_init
,
2130 .free
= generic_hdmi_free
,
2131 .build_pcms
= generic_hdmi_build_pcms
,
2132 .build_controls
= generic_hdmi_build_controls
,
2133 .unsol_event
= hdmi_unsol_event
,
2135 .resume
= generic_hdmi_resume
,
2139 static const struct hdmi_ops generic_standard_hdmi_ops
= {
2140 .pin_get_eld
= snd_hdmi_get_eld
,
2141 .pin_get_slot_channel
= hdmi_pin_get_slot_channel
,
2142 .pin_set_slot_channel
= hdmi_pin_set_slot_channel
,
2143 .pin_setup_infoframe
= hdmi_pin_setup_infoframe
,
2144 .pin_hbr_setup
= hdmi_pin_hbr_setup
,
2145 .setup_stream
= hdmi_setup_stream
,
2146 .chmap_cea_alloc_validate_get_type
= hdmi_chmap_cea_alloc_validate_get_type
,
2147 .cea_alloc_to_tlv_chmap
= hdmi_cea_alloc_to_tlv_chmap
,
2151 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
,
2154 struct hdmi_spec
*spec
= codec
->spec
;
2158 nconns
= snd_hda_get_connections(codec
, nid
, conns
, ARRAY_SIZE(conns
));
2159 if (nconns
== spec
->num_cvts
&&
2160 !memcmp(conns
, spec
->cvt_nids
, spec
->num_cvts
* sizeof(hda_nid_t
)))
2163 /* override pins connection list */
2164 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid
);
2165 snd_hda_override_conn_list(codec
, nid
, spec
->num_cvts
, spec
->cvt_nids
);
2168 #define INTEL_VENDOR_NID 0x08
2169 #define INTEL_GET_VENDOR_VERB 0xf81
2170 #define INTEL_SET_VENDOR_VERB 0x781
2171 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2172 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2174 static void intel_haswell_enable_all_pins(struct hda_codec
*codec
,
2177 unsigned int vendor_param
;
2179 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2180 INTEL_GET_VENDOR_VERB
, 0);
2181 if (vendor_param
== -1 || vendor_param
& INTEL_EN_ALL_PIN_CVTS
)
2184 vendor_param
|= INTEL_EN_ALL_PIN_CVTS
;
2185 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2186 INTEL_SET_VENDOR_VERB
, vendor_param
);
2187 if (vendor_param
== -1)
2191 snd_hda_codec_update_widgets(codec
);
2194 static void intel_haswell_fixup_enable_dp12(struct hda_codec
*codec
)
2196 unsigned int vendor_param
;
2198 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2199 INTEL_GET_VENDOR_VERB
, 0);
2200 if (vendor_param
== -1 || vendor_param
& INTEL_EN_DP12
)
2203 /* enable DP1.2 mode */
2204 vendor_param
|= INTEL_EN_DP12
;
2205 snd_hda_codec_write_cache(codec
, INTEL_VENDOR_NID
, 0,
2206 INTEL_SET_VENDOR_VERB
, vendor_param
);
2209 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2210 * Otherwise you may get severe h/w communication errors.
2212 static void haswell_set_power_state(struct hda_codec
*codec
, hda_nid_t fg
,
2213 unsigned int power_state
)
2215 if (power_state
== AC_PWRST_D0
) {
2216 intel_haswell_enable_all_pins(codec
, false);
2217 intel_haswell_fixup_enable_dp12(codec
);
2220 snd_hda_codec_read(codec
, fg
, 0, AC_VERB_SET_POWER_STATE
, power_state
);
2221 snd_hda_codec_set_power_to_all(codec
, fg
, power_state
);
2224 static int patch_generic_hdmi(struct hda_codec
*codec
)
2226 struct hdmi_spec
*spec
;
2228 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
2232 spec
->ops
= generic_standard_hdmi_ops
;
2234 hdmi_array_init(spec
, 4);
2236 if (is_haswell(codec
)) {
2237 intel_haswell_enable_all_pins(codec
, true);
2238 intel_haswell_fixup_enable_dp12(codec
);
2241 if (hdmi_parse_codec(codec
) < 0) {
2246 codec
->patch_ops
= generic_hdmi_patch_ops
;
2247 if (is_haswell(codec
)) {
2248 codec
->patch_ops
.set_power_state
= haswell_set_power_state
;
2249 codec
->dp_mst
= true;
2252 generic_hdmi_init_per_pins(codec
);
2254 init_channel_allocations();
2260 * Shared non-generic implementations
2263 static int simple_playback_build_pcms(struct hda_codec
*codec
)
2265 struct hdmi_spec
*spec
= codec
->spec
;
2266 struct hda_pcm
*info
;
2268 struct hda_pcm_stream
*pstr
;
2269 struct hdmi_spec_per_cvt
*per_cvt
;
2271 per_cvt
= get_cvt(spec
, 0);
2272 chans
= get_wcaps(codec
, per_cvt
->cvt_nid
);
2273 chans
= get_wcaps_channels(chans
);
2275 info
= snd_array_new(&spec
->pcm_rec
);
2278 info
->name
= get_pin(spec
, 0)->pcm_name
;
2279 sprintf(info
->name
, "HDMI 0");
2280 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
2281 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
2282 *pstr
= spec
->pcm_playback
;
2283 pstr
->nid
= per_cvt
->cvt_nid
;
2284 if (pstr
->channels_max
<= 2 && chans
&& chans
<= 16)
2285 pstr
->channels_max
= chans
;
2287 codec
->num_pcms
= 1;
2288 codec
->pcm_info
= info
;
2293 /* unsolicited event for jack sensing */
2294 static void simple_hdmi_unsol_event(struct hda_codec
*codec
,
2297 snd_hda_jack_set_dirty_all(codec
);
2298 snd_hda_jack_report_sync(codec
);
2301 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2302 * as long as spec->pins[] is set correctly
2304 #define simple_hdmi_build_jack generic_hdmi_build_jack
2306 static int simple_playback_build_controls(struct hda_codec
*codec
)
2308 struct hdmi_spec
*spec
= codec
->spec
;
2309 struct hdmi_spec_per_cvt
*per_cvt
;
2312 per_cvt
= get_cvt(spec
, 0);
2313 err
= snd_hda_create_spdif_out_ctls(codec
, per_cvt
->cvt_nid
,
2317 return simple_hdmi_build_jack(codec
, 0);
2320 static int simple_playback_init(struct hda_codec
*codec
)
2322 struct hdmi_spec
*spec
= codec
->spec
;
2323 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, 0);
2324 hda_nid_t pin
= per_pin
->pin_nid
;
2326 snd_hda_codec_write(codec
, pin
, 0,
2327 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
2328 /* some codecs require to unmute the pin */
2329 if (get_wcaps(codec
, pin
) & AC_WCAP_OUT_AMP
)
2330 snd_hda_codec_write(codec
, pin
, 0, AC_VERB_SET_AMP_GAIN_MUTE
,
2332 snd_hda_jack_detect_enable(codec
, pin
, pin
);
2336 static void simple_playback_free(struct hda_codec
*codec
)
2338 struct hdmi_spec
*spec
= codec
->spec
;
2340 hdmi_array_free(spec
);
2345 * Nvidia specific implementations
2348 #define Nv_VERB_SET_Channel_Allocation 0xF79
2349 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2350 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2351 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2353 #define nvhdmi_master_con_nid_7x 0x04
2354 #define nvhdmi_master_pin_nid_7x 0x05
2356 static const hda_nid_t nvhdmi_con_nids_7x
[4] = {
2357 /*front, rear, clfe, rear_surr */
2361 static const struct hda_verb nvhdmi_basic_init_7x_2ch
[] = {
2362 /* set audio protect on */
2363 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2364 /* enable digital output on pin widget */
2365 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2369 static const struct hda_verb nvhdmi_basic_init_7x_8ch
[] = {
2370 /* set audio protect on */
2371 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2372 /* enable digital output on pin widget */
2373 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2374 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2375 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2376 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2377 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2381 #ifdef LIMITED_RATE_FMT_SUPPORT
2382 /* support only the safe format and rate */
2383 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2384 #define SUPPORTED_MAXBPS 16
2385 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2387 /* support all rates and formats */
2388 #define SUPPORTED_RATES \
2389 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2390 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2391 SNDRV_PCM_RATE_192000)
2392 #define SUPPORTED_MAXBPS 24
2393 #define SUPPORTED_FORMATS \
2394 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2397 static int nvhdmi_7x_init_2ch(struct hda_codec
*codec
)
2399 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_2ch
);
2403 static int nvhdmi_7x_init_8ch(struct hda_codec
*codec
)
2405 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_8ch
);
2409 static unsigned int channels_2_6_8
[] = {
2413 static unsigned int channels_2_8
[] = {
2417 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels
= {
2418 .count
= ARRAY_SIZE(channels_2_6_8
),
2419 .list
= channels_2_6_8
,
2423 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels
= {
2424 .count
= ARRAY_SIZE(channels_2_8
),
2425 .list
= channels_2_8
,
2429 static int simple_playback_pcm_open(struct hda_pcm_stream
*hinfo
,
2430 struct hda_codec
*codec
,
2431 struct snd_pcm_substream
*substream
)
2433 struct hdmi_spec
*spec
= codec
->spec
;
2434 struct snd_pcm_hw_constraint_list
*hw_constraints_channels
= NULL
;
2436 switch (codec
->preset
->id
) {
2441 hw_constraints_channels
= &hw_constraints_2_8_channels
;
2444 hw_constraints_channels
= &hw_constraints_2_6_8_channels
;
2450 if (hw_constraints_channels
!= NULL
) {
2451 snd_pcm_hw_constraint_list(substream
->runtime
, 0,
2452 SNDRV_PCM_HW_PARAM_CHANNELS
,
2453 hw_constraints_channels
);
2455 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
2456 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
2459 return snd_hda_multi_out_dig_open(codec
, &spec
->multiout
);
2462 static int simple_playback_pcm_close(struct hda_pcm_stream
*hinfo
,
2463 struct hda_codec
*codec
,
2464 struct snd_pcm_substream
*substream
)
2466 struct hdmi_spec
*spec
= codec
->spec
;
2467 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2470 static int simple_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2471 struct hda_codec
*codec
,
2472 unsigned int stream_tag
,
2473 unsigned int format
,
2474 struct snd_pcm_substream
*substream
)
2476 struct hdmi_spec
*spec
= codec
->spec
;
2477 return snd_hda_multi_out_dig_prepare(codec
, &spec
->multiout
,
2478 stream_tag
, format
, substream
);
2481 static const struct hda_pcm_stream simple_pcm_playback
= {
2486 .open
= simple_playback_pcm_open
,
2487 .close
= simple_playback_pcm_close
,
2488 .prepare
= simple_playback_pcm_prepare
2492 static const struct hda_codec_ops simple_hdmi_patch_ops
= {
2493 .build_controls
= simple_playback_build_controls
,
2494 .build_pcms
= simple_playback_build_pcms
,
2495 .init
= simple_playback_init
,
2496 .free
= simple_playback_free
,
2497 .unsol_event
= simple_hdmi_unsol_event
,
2500 static int patch_simple_hdmi(struct hda_codec
*codec
,
2501 hda_nid_t cvt_nid
, hda_nid_t pin_nid
)
2503 struct hdmi_spec
*spec
;
2504 struct hdmi_spec_per_cvt
*per_cvt
;
2505 struct hdmi_spec_per_pin
*per_pin
;
2507 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
2512 hdmi_array_init(spec
, 1);
2514 spec
->multiout
.num_dacs
= 0; /* no analog */
2515 spec
->multiout
.max_channels
= 2;
2516 spec
->multiout
.dig_out_nid
= cvt_nid
;
2519 per_pin
= snd_array_new(&spec
->pins
);
2520 per_cvt
= snd_array_new(&spec
->cvts
);
2521 if (!per_pin
|| !per_cvt
) {
2522 simple_playback_free(codec
);
2525 per_cvt
->cvt_nid
= cvt_nid
;
2526 per_pin
->pin_nid
= pin_nid
;
2527 spec
->pcm_playback
= simple_pcm_playback
;
2529 codec
->patch_ops
= simple_hdmi_patch_ops
;
2534 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec
*codec
,
2537 unsigned int chanmask
;
2538 int chan
= channels
? (channels
- 1) : 1;
2557 /* Set the audio infoframe channel allocation and checksum fields. The
2558 * channel count is computed implicitly by the hardware. */
2559 snd_hda_codec_write(codec
, 0x1, 0,
2560 Nv_VERB_SET_Channel_Allocation
, chanmask
);
2562 snd_hda_codec_write(codec
, 0x1, 0,
2563 Nv_VERB_SET_Info_Frame_Checksum
,
2564 (0x71 - chan
- chanmask
));
2567 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream
*hinfo
,
2568 struct hda_codec
*codec
,
2569 struct snd_pcm_substream
*substream
)
2571 struct hdmi_spec
*spec
= codec
->spec
;
2574 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
,
2575 0, AC_VERB_SET_CHANNEL_STREAMID
, 0);
2576 for (i
= 0; i
< 4; i
++) {
2577 /* set the stream id */
2578 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2579 AC_VERB_SET_CHANNEL_STREAMID
, 0);
2580 /* set the stream format */
2581 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2582 AC_VERB_SET_STREAM_FORMAT
, 0);
2585 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2586 * streams are disabled. */
2587 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
2589 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2592 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2593 struct hda_codec
*codec
,
2594 unsigned int stream_tag
,
2595 unsigned int format
,
2596 struct snd_pcm_substream
*substream
)
2599 unsigned int dataDCC2
, channel_id
;
2601 struct hdmi_spec
*spec
= codec
->spec
;
2602 struct hda_spdif_out
*spdif
;
2603 struct hdmi_spec_per_cvt
*per_cvt
;
2605 mutex_lock(&codec
->spdif_mutex
);
2606 per_cvt
= get_cvt(spec
, 0);
2607 spdif
= snd_hda_spdif_out_of_nid(codec
, per_cvt
->cvt_nid
);
2609 chs
= substream
->runtime
->channels
;
2613 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2614 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
))
2615 snd_hda_codec_write(codec
,
2616 nvhdmi_master_con_nid_7x
,
2618 AC_VERB_SET_DIGI_CONVERT_1
,
2619 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2621 /* set the stream id */
2622 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2623 AC_VERB_SET_CHANNEL_STREAMID
, (stream_tag
<< 4) | 0x0);
2625 /* set the stream format */
2626 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2627 AC_VERB_SET_STREAM_FORMAT
, format
);
2629 /* turn on again (if needed) */
2630 /* enable and set the channel status audio/data flag */
2631 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2632 snd_hda_codec_write(codec
,
2633 nvhdmi_master_con_nid_7x
,
2635 AC_VERB_SET_DIGI_CONVERT_1
,
2636 spdif
->ctls
& 0xff);
2637 snd_hda_codec_write(codec
,
2638 nvhdmi_master_con_nid_7x
,
2640 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
2643 for (i
= 0; i
< 4; i
++) {
2649 /* turn off SPDIF once;
2650 *otherwise the IEC958 bits won't be updated
2652 if (codec
->spdif_status_reset
&&
2653 (spdif
->ctls
& AC_DIG1_ENABLE
))
2654 snd_hda_codec_write(codec
,
2655 nvhdmi_con_nids_7x
[i
],
2657 AC_VERB_SET_DIGI_CONVERT_1
,
2658 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2659 /* set the stream id */
2660 snd_hda_codec_write(codec
,
2661 nvhdmi_con_nids_7x
[i
],
2663 AC_VERB_SET_CHANNEL_STREAMID
,
2664 (stream_tag
<< 4) | channel_id
);
2665 /* set the stream format */
2666 snd_hda_codec_write(codec
,
2667 nvhdmi_con_nids_7x
[i
],
2669 AC_VERB_SET_STREAM_FORMAT
,
2671 /* turn on again (if needed) */
2672 /* enable and set the channel status audio/data flag */
2673 if (codec
->spdif_status_reset
&&
2674 (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2675 snd_hda_codec_write(codec
,
2676 nvhdmi_con_nids_7x
[i
],
2678 AC_VERB_SET_DIGI_CONVERT_1
,
2679 spdif
->ctls
& 0xff);
2680 snd_hda_codec_write(codec
,
2681 nvhdmi_con_nids_7x
[i
],
2683 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
2687 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, chs
);
2689 mutex_unlock(&codec
->spdif_mutex
);
2693 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x
= {
2697 .nid
= nvhdmi_master_con_nid_7x
,
2698 .rates
= SUPPORTED_RATES
,
2699 .maxbps
= SUPPORTED_MAXBPS
,
2700 .formats
= SUPPORTED_FORMATS
,
2702 .open
= simple_playback_pcm_open
,
2703 .close
= nvhdmi_8ch_7x_pcm_close
,
2704 .prepare
= nvhdmi_8ch_7x_pcm_prepare
2708 static int patch_nvhdmi_2ch(struct hda_codec
*codec
)
2710 struct hdmi_spec
*spec
;
2711 int err
= patch_simple_hdmi(codec
, nvhdmi_master_con_nid_7x
,
2712 nvhdmi_master_pin_nid_7x
);
2716 codec
->patch_ops
.init
= nvhdmi_7x_init_2ch
;
2717 /* override the PCM rates, etc, as the codec doesn't give full list */
2719 spec
->pcm_playback
.rates
= SUPPORTED_RATES
;
2720 spec
->pcm_playback
.maxbps
= SUPPORTED_MAXBPS
;
2721 spec
->pcm_playback
.formats
= SUPPORTED_FORMATS
;
2725 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec
*codec
)
2727 struct hdmi_spec
*spec
= codec
->spec
;
2728 int err
= simple_playback_build_pcms(codec
);
2730 struct hda_pcm
*info
= get_pcm_rec(spec
, 0);
2731 info
->own_chmap
= true;
2736 static int nvhdmi_7x_8ch_build_controls(struct hda_codec
*codec
)
2738 struct hdmi_spec
*spec
= codec
->spec
;
2739 struct hda_pcm
*info
;
2740 struct snd_pcm_chmap
*chmap
;
2743 err
= simple_playback_build_controls(codec
);
2747 /* add channel maps */
2748 info
= get_pcm_rec(spec
, 0);
2749 err
= snd_pcm_add_chmap_ctls(info
->pcm
,
2750 SNDRV_PCM_STREAM_PLAYBACK
,
2751 snd_pcm_alt_chmaps
, 8, 0, &chmap
);
2754 switch (codec
->preset
->id
) {
2759 chmap
->channel_mask
= (1U << 2) | (1U << 8);
2762 chmap
->channel_mask
= (1U << 2) | (1U << 6) | (1U << 8);
2767 static int patch_nvhdmi_8ch_7x(struct hda_codec
*codec
)
2769 struct hdmi_spec
*spec
;
2770 int err
= patch_nvhdmi_2ch(codec
);
2774 spec
->multiout
.max_channels
= 8;
2775 spec
->pcm_playback
= nvhdmi_pcm_playback_8ch_7x
;
2776 codec
->patch_ops
.init
= nvhdmi_7x_init_8ch
;
2777 codec
->patch_ops
.build_pcms
= nvhdmi_7x_8ch_build_pcms
;
2778 codec
->patch_ops
.build_controls
= nvhdmi_7x_8ch_build_controls
;
2780 /* Initialize the audio infoframe channel mask and checksum to something
2782 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
2788 * ATI/AMD-specific implementations
2791 #define is_amdhdmi_rev3_or_later(codec) \
2792 ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2793 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2795 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2796 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2797 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
2798 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
2799 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
2800 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
2801 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
2802 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
2803 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
2804 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
2805 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
2806 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
2807 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2808 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
2809 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
2810 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
2811 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
2812 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
2813 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
2814 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
2815 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
2816 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
2817 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
2819 #define ATI_OUT_ENABLE 0x1
2821 #define ATI_MULTICHANNEL_MODE_PAIRED 0
2822 #define ATI_MULTICHANNEL_MODE_SINGLE 1
2824 static int atihdmi_pin_get_eld(struct hda_codec
*codec
, hda_nid_t nid
,
2825 unsigned char *buf
, int *eld_size
)
2827 /* call hda_eld.c ATI/AMD-specific function */
2828 return snd_hdmi_get_eld_ati(codec
, nid
, buf
, eld_size
,
2829 is_amdhdmi_rev3_or_later(codec
));
2832 static void atihdmi_pin_setup_infoframe(struct hda_codec
*codec
, hda_nid_t pin_nid
, int ca
,
2833 int active_channels
, int conn_type
)
2835 snd_hda_codec_write(codec
, pin_nid
, 0, ATI_VERB_SET_CHANNEL_ALLOCATION
, ca
);
2838 static int atihdmi_paired_swap_fc_lfe(int pos
)
2841 * ATI/AMD have automatic FC/LFE swap built-in
2842 * when in pairwise mapping mode.
2846 /* see channel_allocations[].speakers[] */
2855 static int atihdmi_paired_chmap_validate(int ca
, int chs
, unsigned char *map
)
2857 struct cea_channel_speaker_allocation
*cap
;
2860 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
2862 cap
= &channel_allocations
[get_channel_allocation_order(ca
)];
2863 for (i
= 0; i
< chs
; ++i
) {
2864 int mask
= to_spk_mask(map
[i
]);
2866 bool companion_ok
= false;
2871 for (j
= 0 + i
% 2; j
< 8; j
+= 2) {
2872 int chan_idx
= 7 - atihdmi_paired_swap_fc_lfe(j
);
2873 if (cap
->speakers
[chan_idx
] == mask
) {
2874 /* channel is in a supported position */
2877 if (i
% 2 == 0 && i
+ 1 < chs
) {
2878 /* even channel, check the odd companion */
2879 int comp_chan_idx
= 7 - atihdmi_paired_swap_fc_lfe(j
+ 1);
2880 int comp_mask_req
= to_spk_mask(map
[i
+1]);
2881 int comp_mask_act
= cap
->speakers
[comp_chan_idx
];
2883 if (comp_mask_req
== comp_mask_act
)
2884 companion_ok
= true;
2896 i
++; /* companion channel already checked */
2902 static int atihdmi_pin_set_slot_channel(struct hda_codec
*codec
, hda_nid_t pin_nid
,
2903 int hdmi_slot
, int stream_channel
)
2906 int ati_channel_setup
= 0;
2911 if (!has_amd_full_remap_support(codec
)) {
2912 hdmi_slot
= atihdmi_paired_swap_fc_lfe(hdmi_slot
);
2914 /* In case this is an odd slot but without stream channel, do not
2915 * disable the slot since the corresponding even slot could have a
2916 * channel. In case neither have a channel, the slot pair will be
2917 * disabled when this function is called for the even slot. */
2918 if (hdmi_slot
% 2 != 0 && stream_channel
== 0xf)
2921 hdmi_slot
-= hdmi_slot
% 2;
2923 if (stream_channel
!= 0xf)
2924 stream_channel
-= stream_channel
% 2;
2927 verb
= ATI_VERB_SET_MULTICHANNEL_01
+ hdmi_slot
/2 + (hdmi_slot
% 2) * 0x00e;
2929 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
2931 if (stream_channel
!= 0xf)
2932 ati_channel_setup
= (stream_channel
<< 4) | ATI_OUT_ENABLE
;
2934 return snd_hda_codec_write(codec
, pin_nid
, 0, verb
, ati_channel_setup
);
2937 static int atihdmi_pin_get_slot_channel(struct hda_codec
*codec
, hda_nid_t pin_nid
,
2940 bool was_odd
= false;
2941 int ati_asp_slot
= asp_slot
;
2943 int ati_channel_setup
;
2948 if (!has_amd_full_remap_support(codec
)) {
2949 ati_asp_slot
= atihdmi_paired_swap_fc_lfe(asp_slot
);
2950 if (ati_asp_slot
% 2 != 0) {
2956 verb
= ATI_VERB_GET_MULTICHANNEL_01
+ ati_asp_slot
/2 + (ati_asp_slot
% 2) * 0x00e;
2958 ati_channel_setup
= snd_hda_codec_read(codec
, pin_nid
, 0, verb
, 0);
2960 if (!(ati_channel_setup
& ATI_OUT_ENABLE
))
2963 return ((ati_channel_setup
& 0xf0) >> 4) + !!was_odd
;
2966 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation
*cap
,
2972 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
2973 * we need to take that into account (a single channel may take 2
2974 * channel slots if we need to carry a silent channel next to it).
2975 * On Rev3+ AMD codecs this function is not used.
2979 /* We only produce even-numbered channel count TLVs */
2980 if ((channels
% 2) != 0)
2983 for (c
= 0; c
< 7; c
+= 2) {
2984 if (cap
->speakers
[c
] || cap
->speakers
[c
+1])
2988 if (chanpairs
* 2 != channels
)
2991 return SNDRV_CTL_TLVT_CHMAP_PAIRED
;
2994 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation
*cap
,
2995 unsigned int *chmap
, int channels
)
2997 /* produce paired maps for pre-rev3 ATI/AMD codecs */
3001 for (c
= 7; c
>= 0; c
--) {
3002 int chan
= 7 - atihdmi_paired_swap_fc_lfe(7 - c
);
3003 int spk
= cap
->speakers
[chan
];
3005 /* add N/A channel if the companion channel is occupied */
3006 if (cap
->speakers
[chan
+ (chan
% 2 ? -1 : 1)])
3007 chmap
[count
++] = SNDRV_CHMAP_NA
;
3012 chmap
[count
++] = spk_to_chmap(spk
);
3015 WARN_ON(count
!= channels
);
3018 static int atihdmi_init(struct hda_codec
*codec
)
3020 struct hdmi_spec
*spec
= codec
->spec
;
3023 err
= generic_hdmi_init(codec
);
3028 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
3029 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
3031 /* make sure downmix information in infoframe is zero */
3032 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0, ATI_VERB_SET_DOWNMIX_INFO
, 0);
3034 /* enable channel-wise remap mode if supported */
3035 if (has_amd_full_remap_support(codec
))
3036 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
3037 ATI_VERB_SET_MULTICHANNEL_MODE
,
3038 ATI_MULTICHANNEL_MODE_SINGLE
);
3044 static int patch_atihdmi(struct hda_codec
*codec
)
3046 struct hdmi_spec
*spec
;
3047 struct hdmi_spec_per_cvt
*per_cvt
;
3050 err
= patch_generic_hdmi(codec
);
3055 codec
->patch_ops
.init
= atihdmi_init
;
3059 spec
->ops
.pin_get_eld
= atihdmi_pin_get_eld
;
3060 spec
->ops
.pin_get_slot_channel
= atihdmi_pin_get_slot_channel
;
3061 spec
->ops
.pin_set_slot_channel
= atihdmi_pin_set_slot_channel
;
3062 spec
->ops
.pin_setup_infoframe
= atihdmi_pin_setup_infoframe
;
3064 if (!has_amd_full_remap_support(codec
)) {
3065 /* override to ATI/AMD-specific versions with pairwise mapping */
3066 spec
->ops
.chmap_cea_alloc_validate_get_type
=
3067 atihdmi_paired_chmap_cea_alloc_validate_get_type
;
3068 spec
->ops
.cea_alloc_to_tlv_chmap
= atihdmi_paired_cea_alloc_to_tlv_chmap
;
3069 spec
->ops
.chmap_validate
= atihdmi_paired_chmap_validate
;
3072 /* ATI/AMD converters do not advertise all of their capabilities */
3073 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
3074 per_cvt
= get_cvt(spec
, cvt_idx
);
3075 per_cvt
->channels_max
= max(per_cvt
->channels_max
, 8u);
3076 per_cvt
->rates
|= SUPPORTED_RATES
;
3077 per_cvt
->formats
|= SUPPORTED_FORMATS
;
3078 per_cvt
->maxbps
= max(per_cvt
->maxbps
, 24u);
3081 spec
->channels_max
= max(spec
->channels_max
, 8u);
3086 /* VIA HDMI Implementation */
3087 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
3088 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
3090 static int patch_via_hdmi(struct hda_codec
*codec
)
3092 return patch_simple_hdmi(codec
, VIAHDMI_CVT_NID
, VIAHDMI_PIN_NID
);
3098 static const struct hda_codec_preset snd_hda_preset_hdmi
[] = {
3099 { .id
= 0x1002793c, .name
= "RS600 HDMI", .patch
= patch_atihdmi
},
3100 { .id
= 0x10027919, .name
= "RS600 HDMI", .patch
= patch_atihdmi
},
3101 { .id
= 0x1002791a, .name
= "RS690/780 HDMI", .patch
= patch_atihdmi
},
3102 { .id
= 0x1002aa01, .name
= "R6xx HDMI", .patch
= patch_atihdmi
},
3103 { .id
= 0x10951390, .name
= "SiI1390 HDMI", .patch
= patch_generic_hdmi
},
3104 { .id
= 0x10951392, .name
= "SiI1392 HDMI", .patch
= patch_generic_hdmi
},
3105 { .id
= 0x17e80047, .name
= "Chrontel HDMI", .patch
= patch_generic_hdmi
},
3106 { .id
= 0x10de0002, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
3107 { .id
= 0x10de0003, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
3108 { .id
= 0x10de0005, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
3109 { .id
= 0x10de0006, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
3110 { .id
= 0x10de0007, .name
= "MCP79/7A HDMI", .patch
= patch_nvhdmi_8ch_7x
},
3111 { .id
= 0x10de000a, .name
= "GPU 0a HDMI/DP", .patch
= patch_generic_hdmi
},
3112 { .id
= 0x10de000b, .name
= "GPU 0b HDMI/DP", .patch
= patch_generic_hdmi
},
3113 { .id
= 0x10de000c, .name
= "MCP89 HDMI", .patch
= patch_generic_hdmi
},
3114 { .id
= 0x10de000d, .name
= "GPU 0d HDMI/DP", .patch
= patch_generic_hdmi
},
3115 { .id
= 0x10de0010, .name
= "GPU 10 HDMI/DP", .patch
= patch_generic_hdmi
},
3116 { .id
= 0x10de0011, .name
= "GPU 11 HDMI/DP", .patch
= patch_generic_hdmi
},
3117 { .id
= 0x10de0012, .name
= "GPU 12 HDMI/DP", .patch
= patch_generic_hdmi
},
3118 { .id
= 0x10de0013, .name
= "GPU 13 HDMI/DP", .patch
= patch_generic_hdmi
},
3119 { .id
= 0x10de0014, .name
= "GPU 14 HDMI/DP", .patch
= patch_generic_hdmi
},
3120 { .id
= 0x10de0015, .name
= "GPU 15 HDMI/DP", .patch
= patch_generic_hdmi
},
3121 { .id
= 0x10de0016, .name
= "GPU 16 HDMI/DP", .patch
= patch_generic_hdmi
},
3122 /* 17 is known to be absent */
3123 { .id
= 0x10de0018, .name
= "GPU 18 HDMI/DP", .patch
= patch_generic_hdmi
},
3124 { .id
= 0x10de0019, .name
= "GPU 19 HDMI/DP", .patch
= patch_generic_hdmi
},
3125 { .id
= 0x10de001a, .name
= "GPU 1a HDMI/DP", .patch
= patch_generic_hdmi
},
3126 { .id
= 0x10de001b, .name
= "GPU 1b HDMI/DP", .patch
= patch_generic_hdmi
},
3127 { .id
= 0x10de001c, .name
= "GPU 1c HDMI/DP", .patch
= patch_generic_hdmi
},
3128 { .id
= 0x10de0040, .name
= "GPU 40 HDMI/DP", .patch
= patch_generic_hdmi
},
3129 { .id
= 0x10de0041, .name
= "GPU 41 HDMI/DP", .patch
= patch_generic_hdmi
},
3130 { .id
= 0x10de0042, .name
= "GPU 42 HDMI/DP", .patch
= patch_generic_hdmi
},
3131 { .id
= 0x10de0043, .name
= "GPU 43 HDMI/DP", .patch
= patch_generic_hdmi
},
3132 { .id
= 0x10de0044, .name
= "GPU 44 HDMI/DP", .patch
= patch_generic_hdmi
},
3133 { .id
= 0x10de0051, .name
= "GPU 51 HDMI/DP", .patch
= patch_generic_hdmi
},
3134 { .id
= 0x10de0060, .name
= "GPU 60 HDMI/DP", .patch
= patch_generic_hdmi
},
3135 { .id
= 0x10de0067, .name
= "MCP67 HDMI", .patch
= patch_nvhdmi_2ch
},
3136 { .id
= 0x10de8001, .name
= "MCP73 HDMI", .patch
= patch_nvhdmi_2ch
},
3137 { .id
= 0x11069f80, .name
= "VX900 HDMI/DP", .patch
= patch_via_hdmi
},
3138 { .id
= 0x11069f81, .name
= "VX900 HDMI/DP", .patch
= patch_via_hdmi
},
3139 { .id
= 0x11069f84, .name
= "VX11 HDMI/DP", .patch
= patch_generic_hdmi
},
3140 { .id
= 0x11069f85, .name
= "VX11 HDMI/DP", .patch
= patch_generic_hdmi
},
3141 { .id
= 0x80860054, .name
= "IbexPeak HDMI", .patch
= patch_generic_hdmi
},
3142 { .id
= 0x80862801, .name
= "Bearlake HDMI", .patch
= patch_generic_hdmi
},
3143 { .id
= 0x80862802, .name
= "Cantiga HDMI", .patch
= patch_generic_hdmi
},
3144 { .id
= 0x80862803, .name
= "Eaglelake HDMI", .patch
= patch_generic_hdmi
},
3145 { .id
= 0x80862804, .name
= "IbexPeak HDMI", .patch
= patch_generic_hdmi
},
3146 { .id
= 0x80862805, .name
= "CougarPoint HDMI", .patch
= patch_generic_hdmi
},
3147 { .id
= 0x80862806, .name
= "PantherPoint HDMI", .patch
= patch_generic_hdmi
},
3148 { .id
= 0x80862807, .name
= "Haswell HDMI", .patch
= patch_generic_hdmi
},
3149 { .id
= 0x80862880, .name
= "CedarTrail HDMI", .patch
= patch_generic_hdmi
},
3150 { .id
= 0x80862882, .name
= "Valleyview2 HDMI", .patch
= patch_generic_hdmi
},
3151 { .id
= 0x808629fb, .name
= "Crestline HDMI", .patch
= patch_generic_hdmi
},
3155 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3156 MODULE_ALIAS("snd-hda-codec-id:10027919");
3157 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3158 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3159 MODULE_ALIAS("snd-hda-codec-id:10951390");
3160 MODULE_ALIAS("snd-hda-codec-id:10951392");
3161 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3162 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3163 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3164 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3165 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3166 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3167 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3168 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3169 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3170 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3171 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3172 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3173 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3174 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3175 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3176 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3177 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3178 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3179 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3180 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3181 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3182 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3183 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3184 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3185 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3186 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3187 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3188 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3189 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3190 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3191 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3192 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3193 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3194 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3195 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3196 MODULE_ALIAS("snd-hda-codec-id:80860054");
3197 MODULE_ALIAS("snd-hda-codec-id:80862801");
3198 MODULE_ALIAS("snd-hda-codec-id:80862802");
3199 MODULE_ALIAS("snd-hda-codec-id:80862803");
3200 MODULE_ALIAS("snd-hda-codec-id:80862804");
3201 MODULE_ALIAS("snd-hda-codec-id:80862805");
3202 MODULE_ALIAS("snd-hda-codec-id:80862806");
3203 MODULE_ALIAS("snd-hda-codec-id:80862807");
3204 MODULE_ALIAS("snd-hda-codec-id:80862880");
3205 MODULE_ALIAS("snd-hda-codec-id:80862882");
3206 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3208 MODULE_LICENSE("GPL");
3209 MODULE_DESCRIPTION("HDMI HD-audio codec");
3210 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3211 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3212 MODULE_ALIAS("snd-hda-codec-atihdmi");
3214 static struct hda_codec_preset_list intel_list
= {
3215 .preset
= snd_hda_preset_hdmi
,
3216 .owner
= THIS_MODULE
,
3219 static int __init
patch_hdmi_init(void)
3221 return snd_hda_add_codec_preset(&intel_list
);
3224 static void __exit
patch_hdmi_exit(void)
3226 snd_hda_delete_codec_preset(&intel_list
);
3229 module_init(patch_hdmi_init
)
3230 module_exit(patch_hdmi_exit
)