3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
12 * Wu Fengguang <wfg@linux.intel.com>
15 * Wu Fengguang <wfg@linux.intel.com>
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the Free
19 * Software Foundation; either version 2 of the License, or (at your option)
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software Foundation,
29 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/slab.h>
35 #include <linux/module.h>
36 #include <sound/core.h>
37 #include <sound/jack.h>
38 #include <sound/asoundef.h>
39 #include <sound/tlv.h>
40 #include "hda_codec.h"
41 #include "hda_local.h"
44 static bool static_hdmi_pcm
;
45 module_param(static_hdmi_pcm
, bool, 0644);
46 MODULE_PARM_DESC(static_hdmi_pcm
, "Don't restrict PCM parameters per ELD info");
48 #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
49 #define is_broadwell(codec) ((codec)->vendor_id == 0x80862808)
50 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec))
52 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
54 struct hdmi_spec_per_cvt
{
57 unsigned int channels_min
;
58 unsigned int channels_max
;
64 /* max. connections to a widget */
65 #define HDA_MAX_CONNECTIONS 32
67 struct hdmi_spec_per_pin
{
70 hda_nid_t mux_nids
[HDA_MAX_CONNECTIONS
];
73 struct hda_codec
*codec
;
74 struct hdmi_eld sink_eld
;
76 struct delayed_work work
;
77 struct snd_kcontrol
*eld_ctl
;
79 bool setup
; /* the stream has been set up by prepare callback */
80 int channels
; /* current number of channels */
82 bool chmap_set
; /* channel-map override by ALSA API? */
83 unsigned char chmap
[8]; /* ALSA API channel-map */
84 char pcm_name
[8]; /* filled in build_pcm callbacks */
86 struct snd_info_entry
*proc_entry
;
90 struct cea_channel_speaker_allocation
;
92 /* operations used by generic code that can be overridden by patches */
94 int (*pin_get_eld
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
95 unsigned char *buf
, int *eld_size
);
97 /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
98 int (*pin_get_slot_channel
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
100 int (*pin_set_slot_channel
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
101 int asp_slot
, int channel
);
103 void (*pin_setup_infoframe
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
104 int ca
, int active_channels
, int conn_type
);
106 /* enable/disable HBR (HD passthrough) */
107 int (*pin_hbr_setup
)(struct hda_codec
*codec
, hda_nid_t pin_nid
, bool hbr
);
109 int (*setup_stream
)(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
110 hda_nid_t pin_nid
, u32 stream_tag
, int format
);
112 /* Helpers for producing the channel map TLVs. These can be overridden
113 * for devices that have non-standard mapping requirements. */
114 int (*chmap_cea_alloc_validate_get_type
)(struct cea_channel_speaker_allocation
*cap
,
116 void (*cea_alloc_to_tlv_chmap
)(struct cea_channel_speaker_allocation
*cap
,
117 unsigned int *chmap
, int channels
);
119 /* check that the user-given chmap is supported */
120 int (*chmap_validate
)(int ca
, int channels
, unsigned char *chmap
);
125 struct snd_array cvts
; /* struct hdmi_spec_per_cvt */
126 hda_nid_t cvt_nids
[4]; /* only for haswell fix */
129 struct snd_array pins
; /* struct hdmi_spec_per_pin */
130 struct snd_array pcm_rec
; /* struct hda_pcm */
131 unsigned int channels_max
; /* max over all cvts */
133 struct hdmi_eld temp_eld
;
139 * Non-generic VIA/NVIDIA specific
141 struct hda_multi_out multiout
;
142 struct hda_pcm_stream pcm_playback
;
146 struct hdmi_audio_infoframe
{
153 u8 CC02_CT47
; /* CC in bits 0:2, CT in 4:7 */
157 u8 LFEPBL01_LSV36_DM_INH7
;
160 struct dp_audio_infoframe
{
163 u8 ver
; /* 0x11 << 2 */
165 u8 CC02_CT47
; /* match with HDMI infoframe from this on */
169 u8 LFEPBL01_LSV36_DM_INH7
;
172 union audio_infoframe
{
173 struct hdmi_audio_infoframe hdmi
;
174 struct dp_audio_infoframe dp
;
179 * CEA speaker placement:
182 * FLW FL FLC FC FRC FR FRW
189 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
190 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
192 enum cea_speaker_placement
{
193 FL
= (1 << 0), /* Front Left */
194 FC
= (1 << 1), /* Front Center */
195 FR
= (1 << 2), /* Front Right */
196 FLC
= (1 << 3), /* Front Left Center */
197 FRC
= (1 << 4), /* Front Right Center */
198 RL
= (1 << 5), /* Rear Left */
199 RC
= (1 << 6), /* Rear Center */
200 RR
= (1 << 7), /* Rear Right */
201 RLC
= (1 << 8), /* Rear Left Center */
202 RRC
= (1 << 9), /* Rear Right Center */
203 LFE
= (1 << 10), /* Low Frequency Effect */
204 FLW
= (1 << 11), /* Front Left Wide */
205 FRW
= (1 << 12), /* Front Right Wide */
206 FLH
= (1 << 13), /* Front Left High */
207 FCH
= (1 << 14), /* Front Center High */
208 FRH
= (1 << 15), /* Front Right High */
209 TC
= (1 << 16), /* Top Center */
213 * ELD SA bits in the CEA Speaker Allocation data block
215 static int eld_speaker_allocation_bits
[] = {
223 /* the following are not defined in ELD yet */
230 struct cea_channel_speaker_allocation
{
234 /* derived values, just for convenience */
242 * surround40 surround41 surround50 surround51 surround71
243 * ch0 front left = = = =
244 * ch1 front right = = = =
245 * ch2 rear left = = = =
246 * ch3 rear right = = = =
247 * ch4 LFE center center center
252 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
254 static int hdmi_channel_mapping
[0x32][8] = {
256 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
258 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
260 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
262 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
264 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
266 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
268 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
270 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
272 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
276 * This is an ordered list!
278 * The preceding ones have better chances to be selected by
279 * hdmi_channel_allocation().
281 static struct cea_channel_speaker_allocation channel_allocations
[] = {
282 /* channel: 7 6 5 4 3 2 1 0 */
283 { .ca_index
= 0x00, .speakers
= { 0, 0, 0, 0, 0, 0, FR
, FL
} },
285 { .ca_index
= 0x01, .speakers
= { 0, 0, 0, 0, 0, LFE
, FR
, FL
} },
287 { .ca_index
= 0x02, .speakers
= { 0, 0, 0, 0, FC
, 0, FR
, FL
} },
289 { .ca_index
= 0x08, .speakers
= { 0, 0, RR
, RL
, 0, 0, FR
, FL
} },
291 { .ca_index
= 0x09, .speakers
= { 0, 0, RR
, RL
, 0, LFE
, FR
, FL
} },
293 { .ca_index
= 0x0a, .speakers
= { 0, 0, RR
, RL
, FC
, 0, FR
, FL
} },
295 { .ca_index
= 0x0b, .speakers
= { 0, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
297 { .ca_index
= 0x0f, .speakers
= { 0, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
299 { .ca_index
= 0x13, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
301 { .ca_index
= 0x03, .speakers
= { 0, 0, 0, 0, FC
, LFE
, FR
, FL
} },
302 { .ca_index
= 0x04, .speakers
= { 0, 0, 0, RC
, 0, 0, FR
, FL
} },
303 { .ca_index
= 0x05, .speakers
= { 0, 0, 0, RC
, 0, LFE
, FR
, FL
} },
304 { .ca_index
= 0x06, .speakers
= { 0, 0, 0, RC
, FC
, 0, FR
, FL
} },
305 { .ca_index
= 0x07, .speakers
= { 0, 0, 0, RC
, FC
, LFE
, FR
, FL
} },
306 { .ca_index
= 0x0c, .speakers
= { 0, RC
, RR
, RL
, 0, 0, FR
, FL
} },
307 { .ca_index
= 0x0d, .speakers
= { 0, RC
, RR
, RL
, 0, LFE
, FR
, FL
} },
308 { .ca_index
= 0x0e, .speakers
= { 0, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
309 { .ca_index
= 0x10, .speakers
= { RRC
, RLC
, RR
, RL
, 0, 0, FR
, FL
} },
310 { .ca_index
= 0x11, .speakers
= { RRC
, RLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
311 { .ca_index
= 0x12, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, 0, FR
, FL
} },
312 { .ca_index
= 0x14, .speakers
= { FRC
, FLC
, 0, 0, 0, 0, FR
, FL
} },
313 { .ca_index
= 0x15, .speakers
= { FRC
, FLC
, 0, 0, 0, LFE
, FR
, FL
} },
314 { .ca_index
= 0x16, .speakers
= { FRC
, FLC
, 0, 0, FC
, 0, FR
, FL
} },
315 { .ca_index
= 0x17, .speakers
= { FRC
, FLC
, 0, 0, FC
, LFE
, FR
, FL
} },
316 { .ca_index
= 0x18, .speakers
= { FRC
, FLC
, 0, RC
, 0, 0, FR
, FL
} },
317 { .ca_index
= 0x19, .speakers
= { FRC
, FLC
, 0, RC
, 0, LFE
, FR
, FL
} },
318 { .ca_index
= 0x1a, .speakers
= { FRC
, FLC
, 0, RC
, FC
, 0, FR
, FL
} },
319 { .ca_index
= 0x1b, .speakers
= { FRC
, FLC
, 0, RC
, FC
, LFE
, FR
, FL
} },
320 { .ca_index
= 0x1c, .speakers
= { FRC
, FLC
, RR
, RL
, 0, 0, FR
, FL
} },
321 { .ca_index
= 0x1d, .speakers
= { FRC
, FLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
322 { .ca_index
= 0x1e, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, 0, FR
, FL
} },
323 { .ca_index
= 0x1f, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
324 { .ca_index
= 0x20, .speakers
= { 0, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
325 { .ca_index
= 0x21, .speakers
= { 0, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
326 { .ca_index
= 0x22, .speakers
= { TC
, 0, RR
, RL
, FC
, 0, FR
, FL
} },
327 { .ca_index
= 0x23, .speakers
= { TC
, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
328 { .ca_index
= 0x24, .speakers
= { FRH
, FLH
, RR
, RL
, 0, 0, FR
, FL
} },
329 { .ca_index
= 0x25, .speakers
= { FRH
, FLH
, RR
, RL
, 0, LFE
, FR
, FL
} },
330 { .ca_index
= 0x26, .speakers
= { FRW
, FLW
, RR
, RL
, 0, 0, FR
, FL
} },
331 { .ca_index
= 0x27, .speakers
= { FRW
, FLW
, RR
, RL
, 0, LFE
, FR
, FL
} },
332 { .ca_index
= 0x28, .speakers
= { TC
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
333 { .ca_index
= 0x29, .speakers
= { TC
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
334 { .ca_index
= 0x2a, .speakers
= { FCH
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
335 { .ca_index
= 0x2b, .speakers
= { FCH
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
336 { .ca_index
= 0x2c, .speakers
= { TC
, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
337 { .ca_index
= 0x2d, .speakers
= { TC
, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
338 { .ca_index
= 0x2e, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, 0, FR
, FL
} },
339 { .ca_index
= 0x2f, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
340 { .ca_index
= 0x30, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, 0, FR
, FL
} },
341 { .ca_index
= 0x31, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, LFE
, FR
, FL
} },
349 #define get_pin(spec, idx) \
350 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
351 #define get_cvt(spec, idx) \
352 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
353 #define get_pcm_rec(spec, idx) \
354 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
356 static int pin_nid_to_pin_index(struct hda_codec
*codec
, hda_nid_t pin_nid
)
358 struct hdmi_spec
*spec
= codec
->spec
;
361 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
362 if (get_pin(spec
, pin_idx
)->pin_nid
== pin_nid
)
365 codec_warn(codec
, "HDMI: pin nid %d not registered\n", pin_nid
);
369 static int hinfo_to_pin_index(struct hda_codec
*codec
,
370 struct hda_pcm_stream
*hinfo
)
372 struct hdmi_spec
*spec
= codec
->spec
;
375 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
376 if (get_pcm_rec(spec
, pin_idx
)->stream
== hinfo
)
379 codec_warn(codec
, "HDMI: hinfo %p not registered\n", hinfo
);
383 static int cvt_nid_to_cvt_index(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
385 struct hdmi_spec
*spec
= codec
->spec
;
388 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++)
389 if (get_cvt(spec
, cvt_idx
)->cvt_nid
== cvt_nid
)
392 codec_warn(codec
, "HDMI: cvt nid %d not registered\n", cvt_nid
);
396 static int hdmi_eld_ctl_info(struct snd_kcontrol
*kcontrol
,
397 struct snd_ctl_elem_info
*uinfo
)
399 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
400 struct hdmi_spec
*spec
= codec
->spec
;
401 struct hdmi_spec_per_pin
*per_pin
;
402 struct hdmi_eld
*eld
;
405 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
407 pin_idx
= kcontrol
->private_value
;
408 per_pin
= get_pin(spec
, pin_idx
);
409 eld
= &per_pin
->sink_eld
;
411 mutex_lock(&per_pin
->lock
);
412 uinfo
->count
= eld
->eld_valid
? eld
->eld_size
: 0;
413 mutex_unlock(&per_pin
->lock
);
418 static int hdmi_eld_ctl_get(struct snd_kcontrol
*kcontrol
,
419 struct snd_ctl_elem_value
*ucontrol
)
421 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
422 struct hdmi_spec
*spec
= codec
->spec
;
423 struct hdmi_spec_per_pin
*per_pin
;
424 struct hdmi_eld
*eld
;
427 pin_idx
= kcontrol
->private_value
;
428 per_pin
= get_pin(spec
, pin_idx
);
429 eld
= &per_pin
->sink_eld
;
431 mutex_lock(&per_pin
->lock
);
432 if (eld
->eld_size
> ARRAY_SIZE(ucontrol
->value
.bytes
.data
)) {
433 mutex_unlock(&per_pin
->lock
);
438 memset(ucontrol
->value
.bytes
.data
, 0,
439 ARRAY_SIZE(ucontrol
->value
.bytes
.data
));
441 memcpy(ucontrol
->value
.bytes
.data
, eld
->eld_buffer
,
443 mutex_unlock(&per_pin
->lock
);
448 static struct snd_kcontrol_new eld_bytes_ctl
= {
449 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
,
450 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
452 .info
= hdmi_eld_ctl_info
,
453 .get
= hdmi_eld_ctl_get
,
456 static int hdmi_create_eld_ctl(struct hda_codec
*codec
, int pin_idx
,
459 struct snd_kcontrol
*kctl
;
460 struct hdmi_spec
*spec
= codec
->spec
;
463 kctl
= snd_ctl_new1(&eld_bytes_ctl
, codec
);
466 kctl
->private_value
= pin_idx
;
467 kctl
->id
.device
= device
;
469 err
= snd_hda_ctl_add(codec
, get_pin(spec
, pin_idx
)->pin_nid
, kctl
);
473 get_pin(spec
, pin_idx
)->eld_ctl
= kctl
;
478 static void hdmi_get_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
479 int *packet_index
, int *byte_index
)
483 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
484 AC_VERB_GET_HDMI_DIP_INDEX
, 0);
486 *packet_index
= val
>> 5;
487 *byte_index
= val
& 0x1f;
491 static void hdmi_set_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
492 int packet_index
, int byte_index
)
496 val
= (packet_index
<< 5) | (byte_index
& 0x1f);
498 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_INDEX
, val
);
501 static void hdmi_write_dip_byte(struct hda_codec
*codec
, hda_nid_t pin_nid
,
504 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_DATA
, val
);
507 static void hdmi_init_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
509 struct hdmi_spec
*spec
= codec
->spec
;
513 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
514 snd_hda_codec_write(codec
, pin_nid
, 0,
515 AC_VERB_SET_AMP_GAIN_MUTE
, AMP_OUT_UNMUTE
);
517 if (spec
->dyn_pin_out
)
518 /* Disable pin out until stream is active */
521 /* Enable pin out: some machines with GM965 gets broken output
522 * when the pin is disabled or changed while using with HDMI
526 snd_hda_codec_write(codec
, pin_nid
, 0,
527 AC_VERB_SET_PIN_WIDGET_CONTROL
, pin_out
);
530 static int hdmi_get_channel_count(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
532 return 1 + snd_hda_codec_read(codec
, cvt_nid
, 0,
533 AC_VERB_GET_CVT_CHAN_COUNT
, 0);
536 static void hdmi_set_channel_count(struct hda_codec
*codec
,
537 hda_nid_t cvt_nid
, int chs
)
539 if (chs
!= hdmi_get_channel_count(codec
, cvt_nid
))
540 snd_hda_codec_write(codec
, cvt_nid
, 0,
541 AC_VERB_SET_CVT_CHAN_COUNT
, chs
- 1);
548 #ifdef CONFIG_PROC_FS
549 static void print_eld_info(struct snd_info_entry
*entry
,
550 struct snd_info_buffer
*buffer
)
552 struct hdmi_spec_per_pin
*per_pin
= entry
->private_data
;
554 mutex_lock(&per_pin
->lock
);
555 snd_hdmi_print_eld_info(&per_pin
->sink_eld
, buffer
);
556 mutex_unlock(&per_pin
->lock
);
559 static void write_eld_info(struct snd_info_entry
*entry
,
560 struct snd_info_buffer
*buffer
)
562 struct hdmi_spec_per_pin
*per_pin
= entry
->private_data
;
564 mutex_lock(&per_pin
->lock
);
565 snd_hdmi_write_eld_info(&per_pin
->sink_eld
, buffer
);
566 mutex_unlock(&per_pin
->lock
);
569 static int eld_proc_new(struct hdmi_spec_per_pin
*per_pin
, int index
)
572 struct hda_codec
*codec
= per_pin
->codec
;
573 struct snd_info_entry
*entry
;
576 snprintf(name
, sizeof(name
), "eld#%d.%d", codec
->addr
, index
);
577 err
= snd_card_proc_new(codec
->bus
->card
, name
, &entry
);
581 snd_info_set_text_ops(entry
, per_pin
, print_eld_info
);
582 entry
->c
.text
.write
= write_eld_info
;
583 entry
->mode
|= S_IWUSR
;
584 per_pin
->proc_entry
= entry
;
589 static void eld_proc_free(struct hdmi_spec_per_pin
*per_pin
)
591 if (!per_pin
->codec
->bus
->shutdown
&& per_pin
->proc_entry
) {
592 snd_device_free(per_pin
->codec
->bus
->card
, per_pin
->proc_entry
);
593 per_pin
->proc_entry
= NULL
;
597 static inline int eld_proc_new(struct hdmi_spec_per_pin
*per_pin
,
602 static inline void eld_proc_free(struct hdmi_spec_per_pin
*per_pin
)
608 * Channel mapping routines
612 * Compute derived values in channel_allocations[].
614 static void init_channel_allocations(void)
617 struct cea_channel_speaker_allocation
*p
;
619 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
620 p
= channel_allocations
+ i
;
623 for (j
= 0; j
< ARRAY_SIZE(p
->speakers
); j
++)
624 if (p
->speakers
[j
]) {
626 p
->spk_mask
|= p
->speakers
[j
];
631 static int get_channel_allocation_order(int ca
)
635 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
636 if (channel_allocations
[i
].ca_index
== ca
)
643 * The transformation takes two steps:
645 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
646 * spk_mask => (channel_allocations[]) => ai->CA
648 * TODO: it could select the wrong CA from multiple candidates.
650 static int hdmi_channel_allocation(struct hdmi_eld
*eld
, int channels
)
655 char buf
[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE
];
658 * CA defaults to 0 for basic stereo audio
664 * expand ELD's speaker allocation mask
666 * ELD tells the speaker mask in a compact(paired) form,
667 * expand ELD's notions to match the ones used by Audio InfoFrame.
669 for (i
= 0; i
< ARRAY_SIZE(eld_speaker_allocation_bits
); i
++) {
670 if (eld
->info
.spk_alloc
& (1 << i
))
671 spk_mask
|= eld_speaker_allocation_bits
[i
];
674 /* search for the first working match in the CA table */
675 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
676 if (channels
== channel_allocations
[i
].channels
&&
677 (spk_mask
& channel_allocations
[i
].spk_mask
) ==
678 channel_allocations
[i
].spk_mask
) {
679 ca
= channel_allocations
[i
].ca_index
;
685 /* if there was no match, select the regular ALSA channel
686 * allocation with the matching number of channels */
687 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
688 if (channels
== channel_allocations
[i
].channels
) {
689 ca
= channel_allocations
[i
].ca_index
;
695 snd_print_channel_allocation(eld
->info
.spk_alloc
, buf
, sizeof(buf
));
696 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
702 static void hdmi_debug_channel_mapping(struct hda_codec
*codec
,
705 #ifdef CONFIG_SND_DEBUG_VERBOSE
706 struct hdmi_spec
*spec
= codec
->spec
;
710 for (i
= 0; i
< 8; i
++) {
711 channel
= spec
->ops
.pin_get_slot_channel(codec
, pin_nid
, i
);
712 codec_dbg(codec
, "HDMI: ASP channel %d => slot %d\n",
718 static void hdmi_std_setup_channel_mapping(struct hda_codec
*codec
,
723 struct hdmi_spec
*spec
= codec
->spec
;
724 struct cea_channel_speaker_allocation
*ch_alloc
;
728 int non_pcm_mapping
[8];
730 order
= get_channel_allocation_order(ca
);
731 ch_alloc
= &channel_allocations
[order
];
733 if (hdmi_channel_mapping
[ca
][1] == 0) {
735 /* fill actual channel mappings in ALSA channel (i) order */
736 for (i
= 0; i
< ch_alloc
->channels
; i
++) {
737 while (!ch_alloc
->speakers
[7 - hdmi_slot
] && !WARN_ON(hdmi_slot
>= 8))
738 hdmi_slot
++; /* skip zero slots */
740 hdmi_channel_mapping
[ca
][i
] = (i
<< 4) | hdmi_slot
++;
742 /* fill the rest of the slots with ALSA channel 0xf */
743 for (hdmi_slot
= 0; hdmi_slot
< 8; hdmi_slot
++)
744 if (!ch_alloc
->speakers
[7 - hdmi_slot
])
745 hdmi_channel_mapping
[ca
][i
++] = (0xf << 4) | hdmi_slot
;
749 for (i
= 0; i
< ch_alloc
->channels
; i
++)
750 non_pcm_mapping
[i
] = (i
<< 4) | i
;
752 non_pcm_mapping
[i
] = (0xf << 4) | i
;
755 for (i
= 0; i
< 8; i
++) {
756 int slotsetup
= non_pcm
? non_pcm_mapping
[i
] : hdmi_channel_mapping
[ca
][i
];
757 int hdmi_slot
= slotsetup
& 0x0f;
758 int channel
= (slotsetup
& 0xf0) >> 4;
759 err
= spec
->ops
.pin_set_slot_channel(codec
, pin_nid
, hdmi_slot
, channel
);
761 codec_dbg(codec
, "HDMI: channel mapping failed\n");
767 struct channel_map_table
{
768 unsigned char map
; /* ALSA API channel map position */
769 int spk_mask
; /* speaker position bit mask */
772 static struct channel_map_table map_tables
[] = {
773 { SNDRV_CHMAP_FL
, FL
},
774 { SNDRV_CHMAP_FR
, FR
},
775 { SNDRV_CHMAP_RL
, RL
},
776 { SNDRV_CHMAP_RR
, RR
},
777 { SNDRV_CHMAP_LFE
, LFE
},
778 { SNDRV_CHMAP_FC
, FC
},
779 { SNDRV_CHMAP_RLC
, RLC
},
780 { SNDRV_CHMAP_RRC
, RRC
},
781 { SNDRV_CHMAP_RC
, RC
},
782 { SNDRV_CHMAP_FLC
, FLC
},
783 { SNDRV_CHMAP_FRC
, FRC
},
784 { SNDRV_CHMAP_TFL
, FLH
},
785 { SNDRV_CHMAP_TFR
, FRH
},
786 { SNDRV_CHMAP_FLW
, FLW
},
787 { SNDRV_CHMAP_FRW
, FRW
},
788 { SNDRV_CHMAP_TC
, TC
},
789 { SNDRV_CHMAP_TFC
, FCH
},
793 /* from ALSA API channel position to speaker bit mask */
794 static int to_spk_mask(unsigned char c
)
796 struct channel_map_table
*t
= map_tables
;
797 for (; t
->map
; t
++) {
804 /* from ALSA API channel position to CEA slot */
805 static int to_cea_slot(int ordered_ca
, unsigned char pos
)
807 int mask
= to_spk_mask(pos
);
811 for (i
= 0; i
< 8; i
++) {
812 if (channel_allocations
[ordered_ca
].speakers
[7 - i
] == mask
)
820 /* from speaker bit mask to ALSA API channel position */
821 static int spk_to_chmap(int spk
)
823 struct channel_map_table
*t
= map_tables
;
824 for (; t
->map
; t
++) {
825 if (t
->spk_mask
== spk
)
831 /* from CEA slot to ALSA API channel position */
832 static int from_cea_slot(int ordered_ca
, unsigned char slot
)
834 int mask
= channel_allocations
[ordered_ca
].speakers
[7 - slot
];
836 return spk_to_chmap(mask
);
839 /* get the CA index corresponding to the given ALSA API channel map */
840 static int hdmi_manual_channel_allocation(int chs
, unsigned char *map
)
842 int i
, spks
= 0, spk_mask
= 0;
844 for (i
= 0; i
< chs
; i
++) {
845 int mask
= to_spk_mask(map
[i
]);
852 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
853 if ((chs
== channel_allocations
[i
].channels
||
854 spks
== channel_allocations
[i
].channels
) &&
855 (spk_mask
& channel_allocations
[i
].spk_mask
) ==
856 channel_allocations
[i
].spk_mask
)
857 return channel_allocations
[i
].ca_index
;
862 /* set up the channel slots for the given ALSA API channel map */
863 static int hdmi_manual_setup_channel_mapping(struct hda_codec
*codec
,
865 int chs
, unsigned char *map
,
868 struct hdmi_spec
*spec
= codec
->spec
;
869 int ordered_ca
= get_channel_allocation_order(ca
);
870 int alsa_pos
, hdmi_slot
;
871 int assignments
[8] = {[0 ... 7] = 0xf};
873 for (alsa_pos
= 0; alsa_pos
< chs
; alsa_pos
++) {
875 hdmi_slot
= to_cea_slot(ordered_ca
, map
[alsa_pos
]);
878 continue; /* unassigned channel */
880 assignments
[hdmi_slot
] = alsa_pos
;
883 for (hdmi_slot
= 0; hdmi_slot
< 8; hdmi_slot
++) {
886 err
= spec
->ops
.pin_set_slot_channel(codec
, pin_nid
, hdmi_slot
,
887 assignments
[hdmi_slot
]);
894 /* store ALSA API channel map from the current default map */
895 static void hdmi_setup_fake_chmap(unsigned char *map
, int ca
)
898 int ordered_ca
= get_channel_allocation_order(ca
);
899 for (i
= 0; i
< 8; i
++) {
900 if (i
< channel_allocations
[ordered_ca
].channels
)
901 map
[i
] = from_cea_slot(ordered_ca
, hdmi_channel_mapping
[ca
][i
] & 0x0f);
907 static void hdmi_setup_channel_mapping(struct hda_codec
*codec
,
908 hda_nid_t pin_nid
, bool non_pcm
, int ca
,
909 int channels
, unsigned char *map
,
912 if (!non_pcm
&& chmap_set
) {
913 hdmi_manual_setup_channel_mapping(codec
, pin_nid
,
916 hdmi_std_setup_channel_mapping(codec
, pin_nid
, non_pcm
, ca
);
917 hdmi_setup_fake_chmap(map
, ca
);
920 hdmi_debug_channel_mapping(codec
, pin_nid
);
923 static int hdmi_pin_set_slot_channel(struct hda_codec
*codec
, hda_nid_t pin_nid
,
924 int asp_slot
, int channel
)
926 return snd_hda_codec_write(codec
, pin_nid
, 0,
927 AC_VERB_SET_HDMI_CHAN_SLOT
,
928 (channel
<< 4) | asp_slot
);
931 static int hdmi_pin_get_slot_channel(struct hda_codec
*codec
, hda_nid_t pin_nid
,
934 return (snd_hda_codec_read(codec
, pin_nid
, 0,
935 AC_VERB_GET_HDMI_CHAN_SLOT
,
936 asp_slot
) & 0xf0) >> 4;
940 * Audio InfoFrame routines
944 * Enable Audio InfoFrame Transmission
946 static void hdmi_start_infoframe_trans(struct hda_codec
*codec
,
949 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
950 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
955 * Disable Audio InfoFrame Transmission
957 static void hdmi_stop_infoframe_trans(struct hda_codec
*codec
,
960 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
961 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
965 static void hdmi_debug_dip_size(struct hda_codec
*codec
, hda_nid_t pin_nid
)
967 #ifdef CONFIG_SND_DEBUG_VERBOSE
971 size
= snd_hdmi_get_eld_size(codec
, pin_nid
);
972 codec_dbg(codec
, "HDMI: ELD buf size is %d\n", size
);
974 for (i
= 0; i
< 8; i
++) {
975 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
976 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
977 codec_dbg(codec
, "HDMI: DIP GP[%d] buf size is %d\n", i
, size
);
982 static void hdmi_clear_dip_buffers(struct hda_codec
*codec
, hda_nid_t pin_nid
)
988 for (i
= 0; i
< 8; i
++) {
989 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
990 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
994 hdmi_set_dip_index(codec
, pin_nid
, i
, 0x0);
995 for (j
= 1; j
< 1000; j
++) {
996 hdmi_write_dip_byte(codec
, pin_nid
, 0x0);
997 hdmi_get_dip_index(codec
, pin_nid
, &pi
, &bi
);
999 codec_dbg(codec
, "dip index %d: %d != %d\n",
1001 if (bi
== 0) /* byte index wrapped around */
1005 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1011 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe
*hdmi_ai
)
1013 u8
*bytes
= (u8
*)hdmi_ai
;
1017 hdmi_ai
->checksum
= 0;
1019 for (i
= 0; i
< sizeof(*hdmi_ai
); i
++)
1022 hdmi_ai
->checksum
= -sum
;
1025 static void hdmi_fill_audio_infoframe(struct hda_codec
*codec
,
1031 hdmi_debug_dip_size(codec
, pin_nid
);
1032 hdmi_clear_dip_buffers(codec
, pin_nid
); /* be paranoid */
1034 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
1035 for (i
= 0; i
< size
; i
++)
1036 hdmi_write_dip_byte(codec
, pin_nid
, dip
[i
]);
1039 static bool hdmi_infoframe_uptodate(struct hda_codec
*codec
, hda_nid_t pin_nid
,
1045 if (snd_hda_codec_read(codec
, pin_nid
, 0, AC_VERB_GET_HDMI_DIP_XMIT
, 0)
1049 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
1050 for (i
= 0; i
< size
; i
++) {
1051 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
1052 AC_VERB_GET_HDMI_DIP_DATA
, 0);
1060 static void hdmi_pin_setup_infoframe(struct hda_codec
*codec
,
1062 int ca
, int active_channels
,
1065 union audio_infoframe ai
;
1067 memset(&ai
, 0, sizeof(ai
));
1068 if (conn_type
== 0) { /* HDMI */
1069 struct hdmi_audio_infoframe
*hdmi_ai
= &ai
.hdmi
;
1071 hdmi_ai
->type
= 0x84;
1072 hdmi_ai
->ver
= 0x01;
1073 hdmi_ai
->len
= 0x0a;
1074 hdmi_ai
->CC02_CT47
= active_channels
- 1;
1076 hdmi_checksum_audio_infoframe(hdmi_ai
);
1077 } else if (conn_type
== 1) { /* DisplayPort */
1078 struct dp_audio_infoframe
*dp_ai
= &ai
.dp
;
1082 dp_ai
->ver
= 0x11 << 2;
1083 dp_ai
->CC02_CT47
= active_channels
- 1;
1086 codec_dbg(codec
, "HDMI: unknown connection type at pin %d\n",
1092 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1093 * sizeof(*dp_ai) to avoid partial match/update problems when
1094 * the user switches between HDMI/DP monitors.
1096 if (!hdmi_infoframe_uptodate(codec
, pin_nid
, ai
.bytes
,
1099 "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1101 active_channels
, ca
);
1102 hdmi_stop_infoframe_trans(codec
, pin_nid
);
1103 hdmi_fill_audio_infoframe(codec
, pin_nid
,
1104 ai
.bytes
, sizeof(ai
));
1105 hdmi_start_infoframe_trans(codec
, pin_nid
);
1109 static void hdmi_setup_audio_infoframe(struct hda_codec
*codec
,
1110 struct hdmi_spec_per_pin
*per_pin
,
1113 struct hdmi_spec
*spec
= codec
->spec
;
1114 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1115 int channels
= per_pin
->channels
;
1116 int active_channels
;
1117 struct hdmi_eld
*eld
;
1123 if (is_haswell_plus(codec
))
1124 snd_hda_codec_write(codec
, pin_nid
, 0,
1125 AC_VERB_SET_AMP_GAIN_MUTE
,
1128 eld
= &per_pin
->sink_eld
;
1129 if (!eld
->monitor_present
)
1132 if (!non_pcm
&& per_pin
->chmap_set
)
1133 ca
= hdmi_manual_channel_allocation(channels
, per_pin
->chmap
);
1135 ca
= hdmi_channel_allocation(eld
, channels
);
1139 ordered_ca
= get_channel_allocation_order(ca
);
1140 active_channels
= channel_allocations
[ordered_ca
].channels
;
1142 hdmi_set_channel_count(codec
, per_pin
->cvt_nid
, active_channels
);
1145 * always configure channel mapping, it may have been changed by the
1146 * user in the meantime
1148 hdmi_setup_channel_mapping(codec
, pin_nid
, non_pcm
, ca
,
1149 channels
, per_pin
->chmap
,
1150 per_pin
->chmap_set
);
1152 spec
->ops
.pin_setup_infoframe(codec
, pin_nid
, ca
, active_channels
,
1153 eld
->info
.conn_type
);
1155 per_pin
->non_pcm
= non_pcm
;
1159 * Unsolicited events
1162 static bool hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
);
1164 static void jack_callback(struct hda_codec
*codec
, struct hda_jack_tbl
*jack
)
1166 struct hdmi_spec
*spec
= codec
->spec
;
1167 int pin_idx
= pin_nid_to_pin_index(codec
, jack
->nid
);
1171 if (hdmi_present_sense(get_pin(spec
, pin_idx
), 1))
1172 snd_hda_jack_report_sync(codec
);
1175 static void hdmi_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
1177 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
1178 struct hda_jack_tbl
*jack
;
1179 int dev_entry
= (res
& AC_UNSOL_RES_DE
) >> AC_UNSOL_RES_DE_SHIFT
;
1181 jack
= snd_hda_jack_tbl_get_from_tag(codec
, tag
);
1184 jack
->jack_dirty
= 1;
1187 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1188 codec
->addr
, jack
->nid
, dev_entry
, !!(res
& AC_UNSOL_RES_IA
),
1189 !!(res
& AC_UNSOL_RES_PD
), !!(res
& AC_UNSOL_RES_ELDV
));
1191 jack_callback(codec
, jack
);
1194 static void hdmi_non_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
1196 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
1197 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
1198 int cp_state
= !!(res
& AC_UNSOL_RES_CP_STATE
);
1199 int cp_ready
= !!(res
& AC_UNSOL_RES_CP_READY
);
1202 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1217 static void hdmi_unsol_event(struct hda_codec
*codec
, unsigned int res
)
1219 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
1220 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
1222 if (!snd_hda_jack_tbl_get_from_tag(codec
, tag
)) {
1223 codec_dbg(codec
, "Unexpected HDMI event tag 0x%x\n", tag
);
1228 hdmi_intrinsic_event(codec
, res
);
1230 hdmi_non_intrinsic_event(codec
, res
);
1233 static void haswell_verify_D0(struct hda_codec
*codec
,
1234 hda_nid_t cvt_nid
, hda_nid_t nid
)
1238 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1239 * thus pins could only choose converter 0 for use. Make sure the
1240 * converters are in correct power state */
1241 if (!snd_hda_check_power_state(codec
, cvt_nid
, AC_PWRST_D0
))
1242 snd_hda_codec_write(codec
, cvt_nid
, 0, AC_VERB_SET_POWER_STATE
, AC_PWRST_D0
);
1244 if (!snd_hda_check_power_state(codec
, nid
, AC_PWRST_D0
)) {
1245 snd_hda_codec_write(codec
, nid
, 0, AC_VERB_SET_POWER_STATE
,
1248 pwr
= snd_hda_codec_read(codec
, nid
, 0, AC_VERB_GET_POWER_STATE
, 0);
1249 pwr
= (pwr
& AC_PWRST_ACTUAL
) >> AC_PWRST_ACTUAL_SHIFT
;
1250 codec_dbg(codec
, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid
, pwr
);
1258 /* HBR should be Non-PCM, 8 channels */
1259 #define is_hbr_format(format) \
1260 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1262 static int hdmi_pin_hbr_setup(struct hda_codec
*codec
, hda_nid_t pin_nid
,
1265 int pinctl
, new_pinctl
;
1267 if (snd_hda_query_pin_caps(codec
, pin_nid
) & AC_PINCAP_HBR
) {
1268 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
1269 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1272 return hbr
? -EINVAL
: 0;
1274 new_pinctl
= pinctl
& ~AC_PINCTL_EPT
;
1276 new_pinctl
|= AC_PINCTL_EPT_HBR
;
1278 new_pinctl
|= AC_PINCTL_EPT_NATIVE
;
1281 "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1283 pinctl
== new_pinctl
? "" : "new-",
1286 if (pinctl
!= new_pinctl
)
1287 snd_hda_codec_write(codec
, pin_nid
, 0,
1288 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1296 static int hdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
1297 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
1299 struct hdmi_spec
*spec
= codec
->spec
;
1302 if (is_haswell_plus(codec
))
1303 haswell_verify_D0(codec
, cvt_nid
, pin_nid
);
1305 err
= spec
->ops
.pin_hbr_setup(codec
, pin_nid
, is_hbr_format(format
));
1308 codec_dbg(codec
, "hdmi_setup_stream: HBR is not supported\n");
1312 snd_hda_codec_setup_stream(codec
, cvt_nid
, stream_tag
, 0, format
);
1316 static int hdmi_choose_cvt(struct hda_codec
*codec
,
1317 int pin_idx
, int *cvt_id
, int *mux_id
)
1319 struct hdmi_spec
*spec
= codec
->spec
;
1320 struct hdmi_spec_per_pin
*per_pin
;
1321 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1322 int cvt_idx
, mux_idx
= 0;
1324 per_pin
= get_pin(spec
, pin_idx
);
1326 /* Dynamically assign converter to stream */
1327 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
1328 per_cvt
= get_cvt(spec
, cvt_idx
);
1330 /* Must not already be assigned */
1331 if (per_cvt
->assigned
)
1333 /* Must be in pin's mux's list of converters */
1334 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
1335 if (per_pin
->mux_nids
[mux_idx
] == per_cvt
->cvt_nid
)
1337 /* Not in mux list */
1338 if (mux_idx
== per_pin
->num_mux_nids
)
1343 /* No free converters */
1344 if (cvt_idx
== spec
->num_cvts
)
1355 /* Intel HDMI workaround to fix audio routing issue:
1356 * For some Intel display codecs, pins share the same connection list.
1357 * So a conveter can be selected by multiple pins and playback on any of these
1358 * pins will generate sound on the external display, because audio flows from
1359 * the same converter to the display pipeline. Also muting one pin may make
1360 * other pins have no sound output.
1361 * So this function assures that an assigned converter for a pin is not selected
1362 * by any other pins.
1364 static void intel_not_share_assigned_cvt(struct hda_codec
*codec
,
1365 hda_nid_t pin_nid
, int mux_idx
)
1367 struct hdmi_spec
*spec
= codec
->spec
;
1368 hda_nid_t nid
, end_nid
;
1370 struct hdmi_spec_per_cvt
*per_cvt
;
1372 /* configure all pins, including "no physical connection" ones */
1373 end_nid
= codec
->start_nid
+ codec
->num_nodes
;
1374 for (nid
= codec
->start_nid
; nid
< end_nid
; nid
++) {
1375 unsigned int wid_caps
= get_wcaps(codec
, nid
);
1376 unsigned int wid_type
= get_wcaps_type(wid_caps
);
1378 if (wid_type
!= AC_WID_PIN
)
1384 curr
= snd_hda_codec_read(codec
, nid
, 0,
1385 AC_VERB_GET_CONNECT_SEL
, 0);
1386 if (curr
!= mux_idx
)
1389 /* choose an unassigned converter. The conveters in the
1390 * connection list are in the same order as in the codec.
1392 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
1393 per_cvt
= get_cvt(spec
, cvt_idx
);
1394 if (!per_cvt
->assigned
) {
1396 "choose cvt %d for pin nid %d\n",
1398 snd_hda_codec_write_cache(codec
, nid
, 0,
1399 AC_VERB_SET_CONNECT_SEL
,
1410 static int hdmi_pcm_open(struct hda_pcm_stream
*hinfo
,
1411 struct hda_codec
*codec
,
1412 struct snd_pcm_substream
*substream
)
1414 struct hdmi_spec
*spec
= codec
->spec
;
1415 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1416 int pin_idx
, cvt_idx
, mux_idx
= 0;
1417 struct hdmi_spec_per_pin
*per_pin
;
1418 struct hdmi_eld
*eld
;
1419 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1422 /* Validate hinfo */
1423 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1424 if (snd_BUG_ON(pin_idx
< 0))
1426 per_pin
= get_pin(spec
, pin_idx
);
1427 eld
= &per_pin
->sink_eld
;
1429 err
= hdmi_choose_cvt(codec
, pin_idx
, &cvt_idx
, &mux_idx
);
1433 per_cvt
= get_cvt(spec
, cvt_idx
);
1434 /* Claim converter */
1435 per_cvt
->assigned
= 1;
1436 per_pin
->cvt_nid
= per_cvt
->cvt_nid
;
1437 hinfo
->nid
= per_cvt
->cvt_nid
;
1439 snd_hda_codec_write_cache(codec
, per_pin
->pin_nid
, 0,
1440 AC_VERB_SET_CONNECT_SEL
,
1443 /* configure unused pins to choose other converters */
1444 if (is_haswell_plus(codec
) || is_valleyview(codec
))
1445 intel_not_share_assigned_cvt(codec
, per_pin
->pin_nid
, mux_idx
);
1447 snd_hda_spdif_ctls_assign(codec
, pin_idx
, per_cvt
->cvt_nid
);
1449 /* Initially set the converter's capabilities */
1450 hinfo
->channels_min
= per_cvt
->channels_min
;
1451 hinfo
->channels_max
= per_cvt
->channels_max
;
1452 hinfo
->rates
= per_cvt
->rates
;
1453 hinfo
->formats
= per_cvt
->formats
;
1454 hinfo
->maxbps
= per_cvt
->maxbps
;
1456 /* Restrict capabilities by ELD if this isn't disabled */
1457 if (!static_hdmi_pcm
&& eld
->eld_valid
) {
1458 snd_hdmi_eld_update_pcm_info(&eld
->info
, hinfo
);
1459 if (hinfo
->channels_min
> hinfo
->channels_max
||
1460 !hinfo
->rates
|| !hinfo
->formats
) {
1461 per_cvt
->assigned
= 0;
1463 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1468 /* Store the updated parameters */
1469 runtime
->hw
.channels_min
= hinfo
->channels_min
;
1470 runtime
->hw
.channels_max
= hinfo
->channels_max
;
1471 runtime
->hw
.formats
= hinfo
->formats
;
1472 runtime
->hw
.rates
= hinfo
->rates
;
1474 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1475 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1480 * HDA/HDMI auto parsing
1482 static int hdmi_read_pin_conn(struct hda_codec
*codec
, int pin_idx
)
1484 struct hdmi_spec
*spec
= codec
->spec
;
1485 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1486 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1488 if (!(get_wcaps(codec
, pin_nid
) & AC_WCAP_CONN_LIST
)) {
1490 "HDMI: pin %d wcaps %#x does not support connection list\n",
1491 pin_nid
, get_wcaps(codec
, pin_nid
));
1495 per_pin
->num_mux_nids
= snd_hda_get_connections(codec
, pin_nid
,
1497 HDA_MAX_CONNECTIONS
);
1502 static bool hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
)
1504 struct hda_jack_tbl
*jack
;
1505 struct hda_codec
*codec
= per_pin
->codec
;
1506 struct hdmi_spec
*spec
= codec
->spec
;
1507 struct hdmi_eld
*eld
= &spec
->temp_eld
;
1508 struct hdmi_eld
*pin_eld
= &per_pin
->sink_eld
;
1509 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1511 * Always execute a GetPinSense verb here, even when called from
1512 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1513 * response's PD bit is not the real PD value, but indicates that
1514 * the real PD value changed. An older version of the HD-audio
1515 * specification worked this way. Hence, we just ignore the data in
1516 * the unsolicited response to avoid custom WARs.
1519 bool update_eld
= false;
1520 bool eld_changed
= false;
1523 snd_hda_power_up(codec
);
1524 present
= snd_hda_pin_sense(codec
, pin_nid
);
1526 mutex_lock(&per_pin
->lock
);
1527 pin_eld
->monitor_present
= !!(present
& AC_PINSENSE_PRESENCE
);
1528 if (pin_eld
->monitor_present
)
1529 eld
->eld_valid
= !!(present
& AC_PINSENSE_ELDV
);
1531 eld
->eld_valid
= false;
1534 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1535 codec
->addr
, pin_nid
, pin_eld
->monitor_present
, eld
->eld_valid
);
1537 if (eld
->eld_valid
) {
1538 if (spec
->ops
.pin_get_eld(codec
, pin_nid
, eld
->eld_buffer
,
1539 &eld
->eld_size
) < 0)
1540 eld
->eld_valid
= false;
1542 memset(&eld
->info
, 0, sizeof(struct parsed_hdmi_eld
));
1543 if (snd_hdmi_parse_eld(&eld
->info
, eld
->eld_buffer
,
1545 eld
->eld_valid
= false;
1548 if (eld
->eld_valid
) {
1549 snd_hdmi_show_eld(&eld
->info
);
1553 queue_delayed_work(codec
->bus
->workq
,
1555 msecs_to_jiffies(300));
1560 if (pin_eld
->eld_valid
&& !eld
->eld_valid
) {
1565 bool old_eld_valid
= pin_eld
->eld_valid
;
1566 pin_eld
->eld_valid
= eld
->eld_valid
;
1567 eld_changed
= pin_eld
->eld_size
!= eld
->eld_size
||
1568 memcmp(pin_eld
->eld_buffer
, eld
->eld_buffer
,
1569 eld
->eld_size
) != 0;
1571 memcpy(pin_eld
->eld_buffer
, eld
->eld_buffer
,
1573 pin_eld
->eld_size
= eld
->eld_size
;
1574 pin_eld
->info
= eld
->info
;
1577 * Re-setup pin and infoframe. This is needed e.g. when
1578 * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1579 * - transcoder can change during stream playback on Haswell
1581 if (eld
->eld_valid
&& !old_eld_valid
&& per_pin
->setup
)
1582 hdmi_setup_audio_infoframe(codec
, per_pin
,
1587 snd_ctl_notify(codec
->bus
->card
,
1588 SNDRV_CTL_EVENT_MASK_VALUE
| SNDRV_CTL_EVENT_MASK_INFO
,
1589 &per_pin
->eld_ctl
->id
);
1591 ret
= !repoll
|| !pin_eld
->monitor_present
|| pin_eld
->eld_valid
;
1593 jack
= snd_hda_jack_tbl_get(codec
, pin_nid
);
1595 jack
->block_report
= !ret
;
1597 mutex_unlock(&per_pin
->lock
);
1598 snd_hda_power_down(codec
);
1602 static void hdmi_repoll_eld(struct work_struct
*work
)
1604 struct hdmi_spec_per_pin
*per_pin
=
1605 container_of(to_delayed_work(work
), struct hdmi_spec_per_pin
, work
);
1607 if (per_pin
->repoll_count
++ > 6)
1608 per_pin
->repoll_count
= 0;
1610 if (hdmi_present_sense(per_pin
, per_pin
->repoll_count
))
1611 snd_hda_jack_report_sync(per_pin
->codec
);
1614 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
,
1617 static int hdmi_add_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
1619 struct hdmi_spec
*spec
= codec
->spec
;
1620 unsigned int caps
, config
;
1622 struct hdmi_spec_per_pin
*per_pin
;
1625 caps
= snd_hda_query_pin_caps(codec
, pin_nid
);
1626 if (!(caps
& (AC_PINCAP_HDMI
| AC_PINCAP_DP
)))
1629 config
= snd_hda_codec_get_pincfg(codec
, pin_nid
);
1630 if (get_defcfg_connect(config
) == AC_JACK_PORT_NONE
)
1633 if (is_haswell_plus(codec
))
1634 intel_haswell_fixup_connect_list(codec
, pin_nid
);
1636 pin_idx
= spec
->num_pins
;
1637 per_pin
= snd_array_new(&spec
->pins
);
1641 per_pin
->pin_nid
= pin_nid
;
1642 per_pin
->non_pcm
= false;
1644 err
= hdmi_read_pin_conn(codec
, pin_idx
);
1653 static int hdmi_add_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1655 struct hdmi_spec
*spec
= codec
->spec
;
1656 struct hdmi_spec_per_cvt
*per_cvt
;
1660 chans
= get_wcaps(codec
, cvt_nid
);
1661 chans
= get_wcaps_channels(chans
);
1663 per_cvt
= snd_array_new(&spec
->cvts
);
1667 per_cvt
->cvt_nid
= cvt_nid
;
1668 per_cvt
->channels_min
= 2;
1670 per_cvt
->channels_max
= chans
;
1671 if (chans
> spec
->channels_max
)
1672 spec
->channels_max
= chans
;
1675 err
= snd_hda_query_supported_pcm(codec
, cvt_nid
,
1682 if (spec
->num_cvts
< ARRAY_SIZE(spec
->cvt_nids
))
1683 spec
->cvt_nids
[spec
->num_cvts
] = cvt_nid
;
1689 static int hdmi_parse_codec(struct hda_codec
*codec
)
1694 nodes
= snd_hda_get_sub_nodes(codec
, codec
->afg
, &nid
);
1695 if (!nid
|| nodes
< 0) {
1696 codec_warn(codec
, "HDMI: failed to get afg sub nodes\n");
1700 for (i
= 0; i
< nodes
; i
++, nid
++) {
1704 caps
= get_wcaps(codec
, nid
);
1705 type
= get_wcaps_type(caps
);
1707 if (!(caps
& AC_WCAP_DIGITAL
))
1711 case AC_WID_AUD_OUT
:
1712 hdmi_add_cvt(codec
, nid
);
1715 hdmi_add_pin(codec
, nid
);
1725 static bool check_non_pcm_per_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1727 struct hda_spdif_out
*spdif
;
1730 mutex_lock(&codec
->spdif_mutex
);
1731 spdif
= snd_hda_spdif_out_of_nid(codec
, cvt_nid
);
1732 non_pcm
= !!(spdif
->status
& IEC958_AES0_NONAUDIO
);
1733 mutex_unlock(&codec
->spdif_mutex
);
1742 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1743 struct hda_codec
*codec
,
1744 unsigned int stream_tag
,
1745 unsigned int format
,
1746 struct snd_pcm_substream
*substream
)
1748 hda_nid_t cvt_nid
= hinfo
->nid
;
1749 struct hdmi_spec
*spec
= codec
->spec
;
1750 int pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1751 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1752 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1756 non_pcm
= check_non_pcm_per_cvt(codec
, cvt_nid
);
1757 mutex_lock(&per_pin
->lock
);
1758 per_pin
->channels
= substream
->runtime
->channels
;
1759 per_pin
->setup
= true;
1761 hdmi_setup_audio_infoframe(codec
, per_pin
, non_pcm
);
1762 mutex_unlock(&per_pin
->lock
);
1764 if (spec
->dyn_pin_out
) {
1765 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
1766 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1767 snd_hda_codec_write(codec
, pin_nid
, 0,
1768 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1772 return spec
->ops
.setup_stream(codec
, cvt_nid
, pin_nid
, stream_tag
, format
);
1775 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
1776 struct hda_codec
*codec
,
1777 struct snd_pcm_substream
*substream
)
1779 snd_hda_codec_cleanup_stream(codec
, hinfo
->nid
);
1783 static int hdmi_pcm_close(struct hda_pcm_stream
*hinfo
,
1784 struct hda_codec
*codec
,
1785 struct snd_pcm_substream
*substream
)
1787 struct hdmi_spec
*spec
= codec
->spec
;
1788 int cvt_idx
, pin_idx
;
1789 struct hdmi_spec_per_cvt
*per_cvt
;
1790 struct hdmi_spec_per_pin
*per_pin
;
1794 cvt_idx
= cvt_nid_to_cvt_index(codec
, hinfo
->nid
);
1795 if (snd_BUG_ON(cvt_idx
< 0))
1797 per_cvt
= get_cvt(spec
, cvt_idx
);
1799 snd_BUG_ON(!per_cvt
->assigned
);
1800 per_cvt
->assigned
= 0;
1803 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1804 if (snd_BUG_ON(pin_idx
< 0))
1806 per_pin
= get_pin(spec
, pin_idx
);
1808 if (spec
->dyn_pin_out
) {
1809 pinctl
= snd_hda_codec_read(codec
, per_pin
->pin_nid
, 0,
1810 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1811 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
1812 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1816 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1818 mutex_lock(&per_pin
->lock
);
1819 per_pin
->chmap_set
= false;
1820 memset(per_pin
->chmap
, 0, sizeof(per_pin
->chmap
));
1822 per_pin
->setup
= false;
1823 per_pin
->channels
= 0;
1824 mutex_unlock(&per_pin
->lock
);
1830 static const struct hda_pcm_ops generic_ops
= {
1831 .open
= hdmi_pcm_open
,
1832 .close
= hdmi_pcm_close
,
1833 .prepare
= generic_hdmi_playback_pcm_prepare
,
1834 .cleanup
= generic_hdmi_playback_pcm_cleanup
,
1838 * ALSA API channel-map control callbacks
1840 static int hdmi_chmap_ctl_info(struct snd_kcontrol
*kcontrol
,
1841 struct snd_ctl_elem_info
*uinfo
)
1843 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1844 struct hda_codec
*codec
= info
->private_data
;
1845 struct hdmi_spec
*spec
= codec
->spec
;
1846 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
1847 uinfo
->count
= spec
->channels_max
;
1848 uinfo
->value
.integer
.min
= 0;
1849 uinfo
->value
.integer
.max
= SNDRV_CHMAP_LAST
;
1853 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation
*cap
,
1856 /* If the speaker allocation matches the channel count, it is OK.*/
1857 if (cap
->channels
!= channels
)
1860 /* all channels are remappable freely */
1861 return SNDRV_CTL_TLVT_CHMAP_VAR
;
1864 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation
*cap
,
1865 unsigned int *chmap
, int channels
)
1870 for (c
= 7; c
>= 0; c
--) {
1871 int spk
= cap
->speakers
[c
];
1875 chmap
[count
++] = spk_to_chmap(spk
);
1878 WARN_ON(count
!= channels
);
1881 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol
*kcontrol
, int op_flag
,
1882 unsigned int size
, unsigned int __user
*tlv
)
1884 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1885 struct hda_codec
*codec
= info
->private_data
;
1886 struct hdmi_spec
*spec
= codec
->spec
;
1887 unsigned int __user
*dst
;
1892 if (put_user(SNDRV_CTL_TLVT_CONTAINER
, tlv
))
1896 for (chs
= 2; chs
<= spec
->channels_max
; chs
++) {
1898 struct cea_channel_speaker_allocation
*cap
;
1899 cap
= channel_allocations
;
1900 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++, cap
++) {
1901 int chs_bytes
= chs
* 4;
1902 int type
= spec
->ops
.chmap_cea_alloc_validate_get_type(cap
, chs
);
1903 unsigned int tlv_chmap
[8];
1909 if (put_user(type
, dst
) ||
1910 put_user(chs_bytes
, dst
+ 1))
1915 if (size
< chs_bytes
)
1919 spec
->ops
.cea_alloc_to_tlv_chmap(cap
, tlv_chmap
, chs
);
1920 if (copy_to_user(dst
, tlv_chmap
, chs_bytes
))
1925 if (put_user(count
, tlv
+ 1))
1930 static int hdmi_chmap_ctl_get(struct snd_kcontrol
*kcontrol
,
1931 struct snd_ctl_elem_value
*ucontrol
)
1933 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1934 struct hda_codec
*codec
= info
->private_data
;
1935 struct hdmi_spec
*spec
= codec
->spec
;
1936 int pin_idx
= kcontrol
->private_value
;
1937 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1940 for (i
= 0; i
< ARRAY_SIZE(per_pin
->chmap
); i
++)
1941 ucontrol
->value
.integer
.value
[i
] = per_pin
->chmap
[i
];
1945 static int hdmi_chmap_ctl_put(struct snd_kcontrol
*kcontrol
,
1946 struct snd_ctl_elem_value
*ucontrol
)
1948 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1949 struct hda_codec
*codec
= info
->private_data
;
1950 struct hdmi_spec
*spec
= codec
->spec
;
1951 int pin_idx
= kcontrol
->private_value
;
1952 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1953 unsigned int ctl_idx
;
1954 struct snd_pcm_substream
*substream
;
1955 unsigned char chmap
[8];
1956 int i
, err
, ca
, prepared
= 0;
1958 ctl_idx
= snd_ctl_get_ioffidx(kcontrol
, &ucontrol
->id
);
1959 substream
= snd_pcm_chmap_substream(info
, ctl_idx
);
1960 if (!substream
|| !substream
->runtime
)
1961 return 0; /* just for avoiding error from alsactl restore */
1962 switch (substream
->runtime
->status
->state
) {
1963 case SNDRV_PCM_STATE_OPEN
:
1964 case SNDRV_PCM_STATE_SETUP
:
1966 case SNDRV_PCM_STATE_PREPARED
:
1972 memset(chmap
, 0, sizeof(chmap
));
1973 for (i
= 0; i
< ARRAY_SIZE(chmap
); i
++)
1974 chmap
[i
] = ucontrol
->value
.integer
.value
[i
];
1975 if (!memcmp(chmap
, per_pin
->chmap
, sizeof(chmap
)))
1977 ca
= hdmi_manual_channel_allocation(ARRAY_SIZE(chmap
), chmap
);
1980 if (spec
->ops
.chmap_validate
) {
1981 err
= spec
->ops
.chmap_validate(ca
, ARRAY_SIZE(chmap
), chmap
);
1985 mutex_lock(&per_pin
->lock
);
1986 per_pin
->chmap_set
= true;
1987 memcpy(per_pin
->chmap
, chmap
, sizeof(chmap
));
1989 hdmi_setup_audio_infoframe(codec
, per_pin
, per_pin
->non_pcm
);
1990 mutex_unlock(&per_pin
->lock
);
1995 static int generic_hdmi_build_pcms(struct hda_codec
*codec
)
1997 struct hdmi_spec
*spec
= codec
->spec
;
2000 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2001 struct hda_pcm
*info
;
2002 struct hda_pcm_stream
*pstr
;
2003 struct hdmi_spec_per_pin
*per_pin
;
2005 per_pin
= get_pin(spec
, pin_idx
);
2006 sprintf(per_pin
->pcm_name
, "HDMI %d", pin_idx
);
2007 info
= snd_array_new(&spec
->pcm_rec
);
2010 info
->name
= per_pin
->pcm_name
;
2011 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
2012 info
->own_chmap
= true;
2014 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
2015 pstr
->substreams
= 1;
2016 pstr
->ops
= generic_ops
;
2017 /* other pstr fields are set in open */
2020 codec
->num_pcms
= spec
->num_pins
;
2021 codec
->pcm_info
= spec
->pcm_rec
.list
;
2026 static int generic_hdmi_build_jack(struct hda_codec
*codec
, int pin_idx
)
2028 char hdmi_str
[32] = "HDMI/DP";
2029 struct hdmi_spec
*spec
= codec
->spec
;
2030 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2031 int pcmdev
= get_pcm_rec(spec
, pin_idx
)->device
;
2034 sprintf(hdmi_str
+ strlen(hdmi_str
), ",pcm=%d", pcmdev
);
2035 if (!is_jack_detectable(codec
, per_pin
->pin_nid
))
2036 strncat(hdmi_str
, " Phantom",
2037 sizeof(hdmi_str
) - strlen(hdmi_str
) - 1);
2039 return snd_hda_jack_add_kctl(codec
, per_pin
->pin_nid
, hdmi_str
, 0);
2042 static int generic_hdmi_build_controls(struct hda_codec
*codec
)
2044 struct hdmi_spec
*spec
= codec
->spec
;
2048 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2049 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2051 err
= generic_hdmi_build_jack(codec
, pin_idx
);
2055 err
= snd_hda_create_dig_out_ctls(codec
,
2057 per_pin
->mux_nids
[0],
2061 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
2063 /* add control for ELD Bytes */
2064 err
= hdmi_create_eld_ctl(codec
, pin_idx
,
2065 get_pcm_rec(spec
, pin_idx
)->device
);
2070 hdmi_present_sense(per_pin
, 0);
2073 /* add channel maps */
2074 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2075 struct snd_pcm_chmap
*chmap
;
2076 struct snd_kcontrol
*kctl
;
2079 if (!codec
->pcm_info
[pin_idx
].pcm
)
2081 err
= snd_pcm_add_chmap_ctls(codec
->pcm_info
[pin_idx
].pcm
,
2082 SNDRV_PCM_STREAM_PLAYBACK
,
2083 NULL
, 0, pin_idx
, &chmap
);
2086 /* override handlers */
2087 chmap
->private_data
= codec
;
2089 for (i
= 0; i
< kctl
->count
; i
++)
2090 kctl
->vd
[i
].access
|= SNDRV_CTL_ELEM_ACCESS_WRITE
;
2091 kctl
->info
= hdmi_chmap_ctl_info
;
2092 kctl
->get
= hdmi_chmap_ctl_get
;
2093 kctl
->put
= hdmi_chmap_ctl_put
;
2094 kctl
->tlv
.c
= hdmi_chmap_ctl_tlv
;
2100 static int generic_hdmi_init_per_pins(struct hda_codec
*codec
)
2102 struct hdmi_spec
*spec
= codec
->spec
;
2105 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2106 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2108 per_pin
->codec
= codec
;
2109 mutex_init(&per_pin
->lock
);
2110 INIT_DELAYED_WORK(&per_pin
->work
, hdmi_repoll_eld
);
2111 eld_proc_new(per_pin
, pin_idx
);
2116 static int generic_hdmi_init(struct hda_codec
*codec
)
2118 struct hdmi_spec
*spec
= codec
->spec
;
2121 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2122 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2123 hda_nid_t pin_nid
= per_pin
->pin_nid
;
2125 hdmi_init_pin(codec
, pin_nid
);
2126 snd_hda_jack_detect_enable_callback(codec
, pin_nid
, pin_nid
,
2127 codec
->jackpoll_interval
> 0 ? jack_callback
: NULL
);
2132 static void hdmi_array_init(struct hdmi_spec
*spec
, int nums
)
2134 snd_array_init(&spec
->pins
, sizeof(struct hdmi_spec_per_pin
), nums
);
2135 snd_array_init(&spec
->cvts
, sizeof(struct hdmi_spec_per_cvt
), nums
);
2136 snd_array_init(&spec
->pcm_rec
, sizeof(struct hda_pcm
), nums
);
2139 static void hdmi_array_free(struct hdmi_spec
*spec
)
2141 snd_array_free(&spec
->pins
);
2142 snd_array_free(&spec
->cvts
);
2143 snd_array_free(&spec
->pcm_rec
);
2146 static void generic_hdmi_free(struct hda_codec
*codec
)
2148 struct hdmi_spec
*spec
= codec
->spec
;
2151 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2152 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2154 cancel_delayed_work(&per_pin
->work
);
2155 eld_proc_free(per_pin
);
2158 flush_workqueue(codec
->bus
->workq
);
2159 hdmi_array_free(spec
);
2164 static int generic_hdmi_resume(struct hda_codec
*codec
)
2166 struct hdmi_spec
*spec
= codec
->spec
;
2169 generic_hdmi_init(codec
);
2170 snd_hda_codec_resume_amp(codec
);
2171 snd_hda_codec_resume_cache(codec
);
2173 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2174 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2175 hdmi_present_sense(per_pin
, 1);
2181 static const struct hda_codec_ops generic_hdmi_patch_ops
= {
2182 .init
= generic_hdmi_init
,
2183 .free
= generic_hdmi_free
,
2184 .build_pcms
= generic_hdmi_build_pcms
,
2185 .build_controls
= generic_hdmi_build_controls
,
2186 .unsol_event
= hdmi_unsol_event
,
2188 .resume
= generic_hdmi_resume
,
2192 static const struct hdmi_ops generic_standard_hdmi_ops
= {
2193 .pin_get_eld
= snd_hdmi_get_eld
,
2194 .pin_get_slot_channel
= hdmi_pin_get_slot_channel
,
2195 .pin_set_slot_channel
= hdmi_pin_set_slot_channel
,
2196 .pin_setup_infoframe
= hdmi_pin_setup_infoframe
,
2197 .pin_hbr_setup
= hdmi_pin_hbr_setup
,
2198 .setup_stream
= hdmi_setup_stream
,
2199 .chmap_cea_alloc_validate_get_type
= hdmi_chmap_cea_alloc_validate_get_type
,
2200 .cea_alloc_to_tlv_chmap
= hdmi_cea_alloc_to_tlv_chmap
,
2204 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
,
2207 struct hdmi_spec
*spec
= codec
->spec
;
2211 nconns
= snd_hda_get_connections(codec
, nid
, conns
, ARRAY_SIZE(conns
));
2212 if (nconns
== spec
->num_cvts
&&
2213 !memcmp(conns
, spec
->cvt_nids
, spec
->num_cvts
* sizeof(hda_nid_t
)))
2216 /* override pins connection list */
2217 codec_dbg(codec
, "hdmi: haswell: override pin connection 0x%x\n", nid
);
2218 snd_hda_override_conn_list(codec
, nid
, spec
->num_cvts
, spec
->cvt_nids
);
2221 #define INTEL_VENDOR_NID 0x08
2222 #define INTEL_GET_VENDOR_VERB 0xf81
2223 #define INTEL_SET_VENDOR_VERB 0x781
2224 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2225 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2227 static void intel_haswell_enable_all_pins(struct hda_codec
*codec
,
2230 unsigned int vendor_param
;
2232 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2233 INTEL_GET_VENDOR_VERB
, 0);
2234 if (vendor_param
== -1 || vendor_param
& INTEL_EN_ALL_PIN_CVTS
)
2237 vendor_param
|= INTEL_EN_ALL_PIN_CVTS
;
2238 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2239 INTEL_SET_VENDOR_VERB
, vendor_param
);
2240 if (vendor_param
== -1)
2244 snd_hda_codec_update_widgets(codec
);
2247 static void intel_haswell_fixup_enable_dp12(struct hda_codec
*codec
)
2249 unsigned int vendor_param
;
2251 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2252 INTEL_GET_VENDOR_VERB
, 0);
2253 if (vendor_param
== -1 || vendor_param
& INTEL_EN_DP12
)
2256 /* enable DP1.2 mode */
2257 vendor_param
|= INTEL_EN_DP12
;
2258 snd_hda_codec_write_cache(codec
, INTEL_VENDOR_NID
, 0,
2259 INTEL_SET_VENDOR_VERB
, vendor_param
);
2262 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2263 * Otherwise you may get severe h/w communication errors.
2265 static void haswell_set_power_state(struct hda_codec
*codec
, hda_nid_t fg
,
2266 unsigned int power_state
)
2268 if (power_state
== AC_PWRST_D0
) {
2269 intel_haswell_enable_all_pins(codec
, false);
2270 intel_haswell_fixup_enable_dp12(codec
);
2273 snd_hda_codec_read(codec
, fg
, 0, AC_VERB_SET_POWER_STATE
, power_state
);
2274 snd_hda_codec_set_power_to_all(codec
, fg
, power_state
);
2277 static int patch_generic_hdmi(struct hda_codec
*codec
)
2279 struct hdmi_spec
*spec
;
2281 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
2285 spec
->ops
= generic_standard_hdmi_ops
;
2287 hdmi_array_init(spec
, 4);
2289 if (is_haswell_plus(codec
)) {
2290 intel_haswell_enable_all_pins(codec
, true);
2291 intel_haswell_fixup_enable_dp12(codec
);
2294 if (is_haswell(codec
) || is_valleyview(codec
)) {
2295 codec
->depop_delay
= 0;
2298 if (hdmi_parse_codec(codec
) < 0) {
2303 codec
->patch_ops
= generic_hdmi_patch_ops
;
2304 if (is_haswell_plus(codec
)) {
2305 codec
->patch_ops
.set_power_state
= haswell_set_power_state
;
2306 codec
->dp_mst
= true;
2309 generic_hdmi_init_per_pins(codec
);
2311 init_channel_allocations();
2317 * Shared non-generic implementations
2320 static int simple_playback_build_pcms(struct hda_codec
*codec
)
2322 struct hdmi_spec
*spec
= codec
->spec
;
2323 struct hda_pcm
*info
;
2325 struct hda_pcm_stream
*pstr
;
2326 struct hdmi_spec_per_cvt
*per_cvt
;
2328 per_cvt
= get_cvt(spec
, 0);
2329 chans
= get_wcaps(codec
, per_cvt
->cvt_nid
);
2330 chans
= get_wcaps_channels(chans
);
2332 info
= snd_array_new(&spec
->pcm_rec
);
2335 info
->name
= get_pin(spec
, 0)->pcm_name
;
2336 sprintf(info
->name
, "HDMI 0");
2337 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
2338 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
2339 *pstr
= spec
->pcm_playback
;
2340 pstr
->nid
= per_cvt
->cvt_nid
;
2341 if (pstr
->channels_max
<= 2 && chans
&& chans
<= 16)
2342 pstr
->channels_max
= chans
;
2344 codec
->num_pcms
= 1;
2345 codec
->pcm_info
= info
;
2350 /* unsolicited event for jack sensing */
2351 static void simple_hdmi_unsol_event(struct hda_codec
*codec
,
2354 snd_hda_jack_set_dirty_all(codec
);
2355 snd_hda_jack_report_sync(codec
);
2358 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2359 * as long as spec->pins[] is set correctly
2361 #define simple_hdmi_build_jack generic_hdmi_build_jack
2363 static int simple_playback_build_controls(struct hda_codec
*codec
)
2365 struct hdmi_spec
*spec
= codec
->spec
;
2366 struct hdmi_spec_per_cvt
*per_cvt
;
2369 per_cvt
= get_cvt(spec
, 0);
2370 err
= snd_hda_create_dig_out_ctls(codec
, per_cvt
->cvt_nid
,
2375 return simple_hdmi_build_jack(codec
, 0);
2378 static int simple_playback_init(struct hda_codec
*codec
)
2380 struct hdmi_spec
*spec
= codec
->spec
;
2381 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, 0);
2382 hda_nid_t pin
= per_pin
->pin_nid
;
2384 snd_hda_codec_write(codec
, pin
, 0,
2385 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
2386 /* some codecs require to unmute the pin */
2387 if (get_wcaps(codec
, pin
) & AC_WCAP_OUT_AMP
)
2388 snd_hda_codec_write(codec
, pin
, 0, AC_VERB_SET_AMP_GAIN_MUTE
,
2390 snd_hda_jack_detect_enable(codec
, pin
, pin
);
2394 static void simple_playback_free(struct hda_codec
*codec
)
2396 struct hdmi_spec
*spec
= codec
->spec
;
2398 hdmi_array_free(spec
);
2403 * Nvidia specific implementations
2406 #define Nv_VERB_SET_Channel_Allocation 0xF79
2407 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2408 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2409 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2411 #define nvhdmi_master_con_nid_7x 0x04
2412 #define nvhdmi_master_pin_nid_7x 0x05
2414 static const hda_nid_t nvhdmi_con_nids_7x
[4] = {
2415 /*front, rear, clfe, rear_surr */
2419 static const struct hda_verb nvhdmi_basic_init_7x_2ch
[] = {
2420 /* set audio protect on */
2421 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2422 /* enable digital output on pin widget */
2423 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2427 static const struct hda_verb nvhdmi_basic_init_7x_8ch
[] = {
2428 /* set audio protect on */
2429 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2430 /* enable digital output on pin widget */
2431 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2432 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2433 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2434 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2435 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2439 #ifdef LIMITED_RATE_FMT_SUPPORT
2440 /* support only the safe format and rate */
2441 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2442 #define SUPPORTED_MAXBPS 16
2443 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2445 /* support all rates and formats */
2446 #define SUPPORTED_RATES \
2447 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2448 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2449 SNDRV_PCM_RATE_192000)
2450 #define SUPPORTED_MAXBPS 24
2451 #define SUPPORTED_FORMATS \
2452 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2455 static int nvhdmi_7x_init_2ch(struct hda_codec
*codec
)
2457 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_2ch
);
2461 static int nvhdmi_7x_init_8ch(struct hda_codec
*codec
)
2463 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_8ch
);
2467 static unsigned int channels_2_6_8
[] = {
2471 static unsigned int channels_2_8
[] = {
2475 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels
= {
2476 .count
= ARRAY_SIZE(channels_2_6_8
),
2477 .list
= channels_2_6_8
,
2481 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels
= {
2482 .count
= ARRAY_SIZE(channels_2_8
),
2483 .list
= channels_2_8
,
2487 static int simple_playback_pcm_open(struct hda_pcm_stream
*hinfo
,
2488 struct hda_codec
*codec
,
2489 struct snd_pcm_substream
*substream
)
2491 struct hdmi_spec
*spec
= codec
->spec
;
2492 struct snd_pcm_hw_constraint_list
*hw_constraints_channels
= NULL
;
2494 switch (codec
->preset
->id
) {
2499 hw_constraints_channels
= &hw_constraints_2_8_channels
;
2502 hw_constraints_channels
= &hw_constraints_2_6_8_channels
;
2508 if (hw_constraints_channels
!= NULL
) {
2509 snd_pcm_hw_constraint_list(substream
->runtime
, 0,
2510 SNDRV_PCM_HW_PARAM_CHANNELS
,
2511 hw_constraints_channels
);
2513 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
2514 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
2517 return snd_hda_multi_out_dig_open(codec
, &spec
->multiout
);
2520 static int simple_playback_pcm_close(struct hda_pcm_stream
*hinfo
,
2521 struct hda_codec
*codec
,
2522 struct snd_pcm_substream
*substream
)
2524 struct hdmi_spec
*spec
= codec
->spec
;
2525 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2528 static int simple_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2529 struct hda_codec
*codec
,
2530 unsigned int stream_tag
,
2531 unsigned int format
,
2532 struct snd_pcm_substream
*substream
)
2534 struct hdmi_spec
*spec
= codec
->spec
;
2535 return snd_hda_multi_out_dig_prepare(codec
, &spec
->multiout
,
2536 stream_tag
, format
, substream
);
2539 static const struct hda_pcm_stream simple_pcm_playback
= {
2544 .open
= simple_playback_pcm_open
,
2545 .close
= simple_playback_pcm_close
,
2546 .prepare
= simple_playback_pcm_prepare
2550 static const struct hda_codec_ops simple_hdmi_patch_ops
= {
2551 .build_controls
= simple_playback_build_controls
,
2552 .build_pcms
= simple_playback_build_pcms
,
2553 .init
= simple_playback_init
,
2554 .free
= simple_playback_free
,
2555 .unsol_event
= simple_hdmi_unsol_event
,
2558 static int patch_simple_hdmi(struct hda_codec
*codec
,
2559 hda_nid_t cvt_nid
, hda_nid_t pin_nid
)
2561 struct hdmi_spec
*spec
;
2562 struct hdmi_spec_per_cvt
*per_cvt
;
2563 struct hdmi_spec_per_pin
*per_pin
;
2565 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
2570 hdmi_array_init(spec
, 1);
2572 spec
->multiout
.num_dacs
= 0; /* no analog */
2573 spec
->multiout
.max_channels
= 2;
2574 spec
->multiout
.dig_out_nid
= cvt_nid
;
2577 per_pin
= snd_array_new(&spec
->pins
);
2578 per_cvt
= snd_array_new(&spec
->cvts
);
2579 if (!per_pin
|| !per_cvt
) {
2580 simple_playback_free(codec
);
2583 per_cvt
->cvt_nid
= cvt_nid
;
2584 per_pin
->pin_nid
= pin_nid
;
2585 spec
->pcm_playback
= simple_pcm_playback
;
2587 codec
->patch_ops
= simple_hdmi_patch_ops
;
2592 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec
*codec
,
2595 unsigned int chanmask
;
2596 int chan
= channels
? (channels
- 1) : 1;
2615 /* Set the audio infoframe channel allocation and checksum fields. The
2616 * channel count is computed implicitly by the hardware. */
2617 snd_hda_codec_write(codec
, 0x1, 0,
2618 Nv_VERB_SET_Channel_Allocation
, chanmask
);
2620 snd_hda_codec_write(codec
, 0x1, 0,
2621 Nv_VERB_SET_Info_Frame_Checksum
,
2622 (0x71 - chan
- chanmask
));
2625 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream
*hinfo
,
2626 struct hda_codec
*codec
,
2627 struct snd_pcm_substream
*substream
)
2629 struct hdmi_spec
*spec
= codec
->spec
;
2632 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
,
2633 0, AC_VERB_SET_CHANNEL_STREAMID
, 0);
2634 for (i
= 0; i
< 4; i
++) {
2635 /* set the stream id */
2636 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2637 AC_VERB_SET_CHANNEL_STREAMID
, 0);
2638 /* set the stream format */
2639 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2640 AC_VERB_SET_STREAM_FORMAT
, 0);
2643 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2644 * streams are disabled. */
2645 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
2647 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2650 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2651 struct hda_codec
*codec
,
2652 unsigned int stream_tag
,
2653 unsigned int format
,
2654 struct snd_pcm_substream
*substream
)
2657 unsigned int dataDCC2
, channel_id
;
2659 struct hdmi_spec
*spec
= codec
->spec
;
2660 struct hda_spdif_out
*spdif
;
2661 struct hdmi_spec_per_cvt
*per_cvt
;
2663 mutex_lock(&codec
->spdif_mutex
);
2664 per_cvt
= get_cvt(spec
, 0);
2665 spdif
= snd_hda_spdif_out_of_nid(codec
, per_cvt
->cvt_nid
);
2667 chs
= substream
->runtime
->channels
;
2671 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2672 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
))
2673 snd_hda_codec_write(codec
,
2674 nvhdmi_master_con_nid_7x
,
2676 AC_VERB_SET_DIGI_CONVERT_1
,
2677 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2679 /* set the stream id */
2680 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2681 AC_VERB_SET_CHANNEL_STREAMID
, (stream_tag
<< 4) | 0x0);
2683 /* set the stream format */
2684 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2685 AC_VERB_SET_STREAM_FORMAT
, format
);
2687 /* turn on again (if needed) */
2688 /* enable and set the channel status audio/data flag */
2689 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2690 snd_hda_codec_write(codec
,
2691 nvhdmi_master_con_nid_7x
,
2693 AC_VERB_SET_DIGI_CONVERT_1
,
2694 spdif
->ctls
& 0xff);
2695 snd_hda_codec_write(codec
,
2696 nvhdmi_master_con_nid_7x
,
2698 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
2701 for (i
= 0; i
< 4; i
++) {
2707 /* turn off SPDIF once;
2708 *otherwise the IEC958 bits won't be updated
2710 if (codec
->spdif_status_reset
&&
2711 (spdif
->ctls
& AC_DIG1_ENABLE
))
2712 snd_hda_codec_write(codec
,
2713 nvhdmi_con_nids_7x
[i
],
2715 AC_VERB_SET_DIGI_CONVERT_1
,
2716 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2717 /* set the stream id */
2718 snd_hda_codec_write(codec
,
2719 nvhdmi_con_nids_7x
[i
],
2721 AC_VERB_SET_CHANNEL_STREAMID
,
2722 (stream_tag
<< 4) | channel_id
);
2723 /* set the stream format */
2724 snd_hda_codec_write(codec
,
2725 nvhdmi_con_nids_7x
[i
],
2727 AC_VERB_SET_STREAM_FORMAT
,
2729 /* turn on again (if needed) */
2730 /* enable and set the channel status audio/data flag */
2731 if (codec
->spdif_status_reset
&&
2732 (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2733 snd_hda_codec_write(codec
,
2734 nvhdmi_con_nids_7x
[i
],
2736 AC_VERB_SET_DIGI_CONVERT_1
,
2737 spdif
->ctls
& 0xff);
2738 snd_hda_codec_write(codec
,
2739 nvhdmi_con_nids_7x
[i
],
2741 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
2745 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, chs
);
2747 mutex_unlock(&codec
->spdif_mutex
);
2751 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x
= {
2755 .nid
= nvhdmi_master_con_nid_7x
,
2756 .rates
= SUPPORTED_RATES
,
2757 .maxbps
= SUPPORTED_MAXBPS
,
2758 .formats
= SUPPORTED_FORMATS
,
2760 .open
= simple_playback_pcm_open
,
2761 .close
= nvhdmi_8ch_7x_pcm_close
,
2762 .prepare
= nvhdmi_8ch_7x_pcm_prepare
2766 static int patch_nvhdmi_2ch(struct hda_codec
*codec
)
2768 struct hdmi_spec
*spec
;
2769 int err
= patch_simple_hdmi(codec
, nvhdmi_master_con_nid_7x
,
2770 nvhdmi_master_pin_nid_7x
);
2774 codec
->patch_ops
.init
= nvhdmi_7x_init_2ch
;
2775 /* override the PCM rates, etc, as the codec doesn't give full list */
2777 spec
->pcm_playback
.rates
= SUPPORTED_RATES
;
2778 spec
->pcm_playback
.maxbps
= SUPPORTED_MAXBPS
;
2779 spec
->pcm_playback
.formats
= SUPPORTED_FORMATS
;
2783 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec
*codec
)
2785 struct hdmi_spec
*spec
= codec
->spec
;
2786 int err
= simple_playback_build_pcms(codec
);
2788 struct hda_pcm
*info
= get_pcm_rec(spec
, 0);
2789 info
->own_chmap
= true;
2794 static int nvhdmi_7x_8ch_build_controls(struct hda_codec
*codec
)
2796 struct hdmi_spec
*spec
= codec
->spec
;
2797 struct hda_pcm
*info
;
2798 struct snd_pcm_chmap
*chmap
;
2801 err
= simple_playback_build_controls(codec
);
2805 /* add channel maps */
2806 info
= get_pcm_rec(spec
, 0);
2807 err
= snd_pcm_add_chmap_ctls(info
->pcm
,
2808 SNDRV_PCM_STREAM_PLAYBACK
,
2809 snd_pcm_alt_chmaps
, 8, 0, &chmap
);
2812 switch (codec
->preset
->id
) {
2817 chmap
->channel_mask
= (1U << 2) | (1U << 8);
2820 chmap
->channel_mask
= (1U << 2) | (1U << 6) | (1U << 8);
2825 static int patch_nvhdmi_8ch_7x(struct hda_codec
*codec
)
2827 struct hdmi_spec
*spec
;
2828 int err
= patch_nvhdmi_2ch(codec
);
2832 spec
->multiout
.max_channels
= 8;
2833 spec
->pcm_playback
= nvhdmi_pcm_playback_8ch_7x
;
2834 codec
->patch_ops
.init
= nvhdmi_7x_init_8ch
;
2835 codec
->patch_ops
.build_pcms
= nvhdmi_7x_8ch_build_pcms
;
2836 codec
->patch_ops
.build_controls
= nvhdmi_7x_8ch_build_controls
;
2838 /* Initialize the audio infoframe channel mask and checksum to something
2840 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
2846 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2850 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation
*cap
,
2853 if (cap
->ca_index
== 0x00 && channels
== 2)
2854 return SNDRV_CTL_TLVT_CHMAP_FIXED
;
2856 return hdmi_chmap_cea_alloc_validate_get_type(cap
, channels
);
2859 static int nvhdmi_chmap_validate(int ca
, int chs
, unsigned char *map
)
2861 if (ca
== 0x00 && (map
[0] != SNDRV_CHMAP_FL
|| map
[1] != SNDRV_CHMAP_FR
))
2867 static int patch_nvhdmi(struct hda_codec
*codec
)
2869 struct hdmi_spec
*spec
;
2872 err
= patch_generic_hdmi(codec
);
2877 spec
->dyn_pin_out
= true;
2879 spec
->ops
.chmap_cea_alloc_validate_get_type
=
2880 nvhdmi_chmap_cea_alloc_validate_get_type
;
2881 spec
->ops
.chmap_validate
= nvhdmi_chmap_validate
;
2887 * ATI/AMD-specific implementations
2890 #define is_amdhdmi_rev3_or_later(codec) \
2891 ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2892 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2894 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2895 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2896 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
2897 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
2898 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
2899 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
2900 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
2901 #define ATI_VERB_SET_HBR_CONTROL 0x77c
2902 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
2903 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
2904 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
2905 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
2906 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
2907 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2908 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
2909 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
2910 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
2911 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
2912 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
2913 #define ATI_VERB_GET_HBR_CONTROL 0xf7c
2914 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
2915 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
2916 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
2917 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
2918 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
2920 /* AMD specific HDA cvt verbs */
2921 #define ATI_VERB_SET_RAMP_RATE 0x770
2922 #define ATI_VERB_GET_RAMP_RATE 0xf70
2924 #define ATI_OUT_ENABLE 0x1
2926 #define ATI_MULTICHANNEL_MODE_PAIRED 0
2927 #define ATI_MULTICHANNEL_MODE_SINGLE 1
2929 #define ATI_HBR_CAPABLE 0x01
2930 #define ATI_HBR_ENABLE 0x10
2932 static int atihdmi_pin_get_eld(struct hda_codec
*codec
, hda_nid_t nid
,
2933 unsigned char *buf
, int *eld_size
)
2935 /* call hda_eld.c ATI/AMD-specific function */
2936 return snd_hdmi_get_eld_ati(codec
, nid
, buf
, eld_size
,
2937 is_amdhdmi_rev3_or_later(codec
));
2940 static void atihdmi_pin_setup_infoframe(struct hda_codec
*codec
, hda_nid_t pin_nid
, int ca
,
2941 int active_channels
, int conn_type
)
2943 snd_hda_codec_write(codec
, pin_nid
, 0, ATI_VERB_SET_CHANNEL_ALLOCATION
, ca
);
2946 static int atihdmi_paired_swap_fc_lfe(int pos
)
2949 * ATI/AMD have automatic FC/LFE swap built-in
2950 * when in pairwise mapping mode.
2954 /* see channel_allocations[].speakers[] */
2963 static int atihdmi_paired_chmap_validate(int ca
, int chs
, unsigned char *map
)
2965 struct cea_channel_speaker_allocation
*cap
;
2968 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
2970 cap
= &channel_allocations
[get_channel_allocation_order(ca
)];
2971 for (i
= 0; i
< chs
; ++i
) {
2972 int mask
= to_spk_mask(map
[i
]);
2974 bool companion_ok
= false;
2979 for (j
= 0 + i
% 2; j
< 8; j
+= 2) {
2980 int chan_idx
= 7 - atihdmi_paired_swap_fc_lfe(j
);
2981 if (cap
->speakers
[chan_idx
] == mask
) {
2982 /* channel is in a supported position */
2985 if (i
% 2 == 0 && i
+ 1 < chs
) {
2986 /* even channel, check the odd companion */
2987 int comp_chan_idx
= 7 - atihdmi_paired_swap_fc_lfe(j
+ 1);
2988 int comp_mask_req
= to_spk_mask(map
[i
+1]);
2989 int comp_mask_act
= cap
->speakers
[comp_chan_idx
];
2991 if (comp_mask_req
== comp_mask_act
)
2992 companion_ok
= true;
3004 i
++; /* companion channel already checked */
3010 static int atihdmi_pin_set_slot_channel(struct hda_codec
*codec
, hda_nid_t pin_nid
,
3011 int hdmi_slot
, int stream_channel
)
3014 int ati_channel_setup
= 0;
3019 if (!has_amd_full_remap_support(codec
)) {
3020 hdmi_slot
= atihdmi_paired_swap_fc_lfe(hdmi_slot
);
3022 /* In case this is an odd slot but without stream channel, do not
3023 * disable the slot since the corresponding even slot could have a
3024 * channel. In case neither have a channel, the slot pair will be
3025 * disabled when this function is called for the even slot. */
3026 if (hdmi_slot
% 2 != 0 && stream_channel
== 0xf)
3029 hdmi_slot
-= hdmi_slot
% 2;
3031 if (stream_channel
!= 0xf)
3032 stream_channel
-= stream_channel
% 2;
3035 verb
= ATI_VERB_SET_MULTICHANNEL_01
+ hdmi_slot
/2 + (hdmi_slot
% 2) * 0x00e;
3037 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3039 if (stream_channel
!= 0xf)
3040 ati_channel_setup
= (stream_channel
<< 4) | ATI_OUT_ENABLE
;
3042 return snd_hda_codec_write(codec
, pin_nid
, 0, verb
, ati_channel_setup
);
3045 static int atihdmi_pin_get_slot_channel(struct hda_codec
*codec
, hda_nid_t pin_nid
,
3048 bool was_odd
= false;
3049 int ati_asp_slot
= asp_slot
;
3051 int ati_channel_setup
;
3056 if (!has_amd_full_remap_support(codec
)) {
3057 ati_asp_slot
= atihdmi_paired_swap_fc_lfe(asp_slot
);
3058 if (ati_asp_slot
% 2 != 0) {
3064 verb
= ATI_VERB_GET_MULTICHANNEL_01
+ ati_asp_slot
/2 + (ati_asp_slot
% 2) * 0x00e;
3066 ati_channel_setup
= snd_hda_codec_read(codec
, pin_nid
, 0, verb
, 0);
3068 if (!(ati_channel_setup
& ATI_OUT_ENABLE
))
3071 return ((ati_channel_setup
& 0xf0) >> 4) + !!was_odd
;
3074 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation
*cap
,
3080 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3081 * we need to take that into account (a single channel may take 2
3082 * channel slots if we need to carry a silent channel next to it).
3083 * On Rev3+ AMD codecs this function is not used.
3087 /* We only produce even-numbered channel count TLVs */
3088 if ((channels
% 2) != 0)
3091 for (c
= 0; c
< 7; c
+= 2) {
3092 if (cap
->speakers
[c
] || cap
->speakers
[c
+1])
3096 if (chanpairs
* 2 != channels
)
3099 return SNDRV_CTL_TLVT_CHMAP_PAIRED
;
3102 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation
*cap
,
3103 unsigned int *chmap
, int channels
)
3105 /* produce paired maps for pre-rev3 ATI/AMD codecs */
3109 for (c
= 7; c
>= 0; c
--) {
3110 int chan
= 7 - atihdmi_paired_swap_fc_lfe(7 - c
);
3111 int spk
= cap
->speakers
[chan
];
3113 /* add N/A channel if the companion channel is occupied */
3114 if (cap
->speakers
[chan
+ (chan
% 2 ? -1 : 1)])
3115 chmap
[count
++] = SNDRV_CHMAP_NA
;
3120 chmap
[count
++] = spk_to_chmap(spk
);
3123 WARN_ON(count
!= channels
);
3126 static int atihdmi_pin_hbr_setup(struct hda_codec
*codec
, hda_nid_t pin_nid
,
3129 int hbr_ctl
, hbr_ctl_new
;
3131 hbr_ctl
= snd_hda_codec_read(codec
, pin_nid
, 0, ATI_VERB_GET_HBR_CONTROL
, 0);
3132 if (hbr_ctl
>= 0 && (hbr_ctl
& ATI_HBR_CAPABLE
)) {
3134 hbr_ctl_new
= hbr_ctl
| ATI_HBR_ENABLE
;
3136 hbr_ctl_new
= hbr_ctl
& ~ATI_HBR_ENABLE
;
3139 "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3141 hbr_ctl
== hbr_ctl_new
? "" : "new-",
3144 if (hbr_ctl
!= hbr_ctl_new
)
3145 snd_hda_codec_write(codec
, pin_nid
, 0,
3146 ATI_VERB_SET_HBR_CONTROL
,
3155 static int atihdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
3156 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
3159 if (is_amdhdmi_rev3_or_later(codec
)) {
3160 int ramp_rate
= 180; /* default as per AMD spec */
3161 /* disable ramp-up/down for non-pcm as per AMD spec */
3162 if (format
& AC_FMT_TYPE_NON_PCM
)
3165 snd_hda_codec_write(codec
, cvt_nid
, 0, ATI_VERB_SET_RAMP_RATE
, ramp_rate
);
3168 return hdmi_setup_stream(codec
, cvt_nid
, pin_nid
, stream_tag
, format
);
3172 static int atihdmi_init(struct hda_codec
*codec
)
3174 struct hdmi_spec
*spec
= codec
->spec
;
3177 err
= generic_hdmi_init(codec
);
3182 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
3183 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
3185 /* make sure downmix information in infoframe is zero */
3186 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0, ATI_VERB_SET_DOWNMIX_INFO
, 0);
3188 /* enable channel-wise remap mode if supported */
3189 if (has_amd_full_remap_support(codec
))
3190 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
3191 ATI_VERB_SET_MULTICHANNEL_MODE
,
3192 ATI_MULTICHANNEL_MODE_SINGLE
);
3198 static int patch_atihdmi(struct hda_codec
*codec
)
3200 struct hdmi_spec
*spec
;
3201 struct hdmi_spec_per_cvt
*per_cvt
;
3204 err
= patch_generic_hdmi(codec
);
3209 codec
->patch_ops
.init
= atihdmi_init
;
3213 spec
->ops
.pin_get_eld
= atihdmi_pin_get_eld
;
3214 spec
->ops
.pin_get_slot_channel
= atihdmi_pin_get_slot_channel
;
3215 spec
->ops
.pin_set_slot_channel
= atihdmi_pin_set_slot_channel
;
3216 spec
->ops
.pin_setup_infoframe
= atihdmi_pin_setup_infoframe
;
3217 spec
->ops
.pin_hbr_setup
= atihdmi_pin_hbr_setup
;
3218 spec
->ops
.setup_stream
= atihdmi_setup_stream
;
3220 if (!has_amd_full_remap_support(codec
)) {
3221 /* override to ATI/AMD-specific versions with pairwise mapping */
3222 spec
->ops
.chmap_cea_alloc_validate_get_type
=
3223 atihdmi_paired_chmap_cea_alloc_validate_get_type
;
3224 spec
->ops
.cea_alloc_to_tlv_chmap
= atihdmi_paired_cea_alloc_to_tlv_chmap
;
3225 spec
->ops
.chmap_validate
= atihdmi_paired_chmap_validate
;
3228 /* ATI/AMD converters do not advertise all of their capabilities */
3229 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
3230 per_cvt
= get_cvt(spec
, cvt_idx
);
3231 per_cvt
->channels_max
= max(per_cvt
->channels_max
, 8u);
3232 per_cvt
->rates
|= SUPPORTED_RATES
;
3233 per_cvt
->formats
|= SUPPORTED_FORMATS
;
3234 per_cvt
->maxbps
= max(per_cvt
->maxbps
, 24u);
3237 spec
->channels_max
= max(spec
->channels_max
, 8u);
3242 /* VIA HDMI Implementation */
3243 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
3244 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
3246 static int patch_via_hdmi(struct hda_codec
*codec
)
3248 return patch_simple_hdmi(codec
, VIAHDMI_CVT_NID
, VIAHDMI_PIN_NID
);
3252 * called from hda_codec.c for generic HDMI support
3254 int snd_hda_parse_hdmi_codec(struct hda_codec
*codec
)
3256 return patch_generic_hdmi(codec
);
3258 EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec
);
3263 static const struct hda_codec_preset snd_hda_preset_hdmi
[] = {
3264 { .id
= 0x1002793c, .name
= "RS600 HDMI", .patch
= patch_atihdmi
},
3265 { .id
= 0x10027919, .name
= "RS600 HDMI", .patch
= patch_atihdmi
},
3266 { .id
= 0x1002791a, .name
= "RS690/780 HDMI", .patch
= patch_atihdmi
},
3267 { .id
= 0x1002aa01, .name
= "R6xx HDMI", .patch
= patch_atihdmi
},
3268 { .id
= 0x10951390, .name
= "SiI1390 HDMI", .patch
= patch_generic_hdmi
},
3269 { .id
= 0x10951392, .name
= "SiI1392 HDMI", .patch
= patch_generic_hdmi
},
3270 { .id
= 0x17e80047, .name
= "Chrontel HDMI", .patch
= patch_generic_hdmi
},
3271 { .id
= 0x10de0002, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
3272 { .id
= 0x10de0003, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
3273 { .id
= 0x10de0005, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
3274 { .id
= 0x10de0006, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
3275 { .id
= 0x10de0007, .name
= "MCP79/7A HDMI", .patch
= patch_nvhdmi_8ch_7x
},
3276 { .id
= 0x10de000a, .name
= "GPU 0a HDMI/DP", .patch
= patch_nvhdmi
},
3277 { .id
= 0x10de000b, .name
= "GPU 0b HDMI/DP", .patch
= patch_nvhdmi
},
3278 { .id
= 0x10de000c, .name
= "MCP89 HDMI", .patch
= patch_nvhdmi
},
3279 { .id
= 0x10de000d, .name
= "GPU 0d HDMI/DP", .patch
= patch_nvhdmi
},
3280 { .id
= 0x10de0010, .name
= "GPU 10 HDMI/DP", .patch
= patch_nvhdmi
},
3281 { .id
= 0x10de0011, .name
= "GPU 11 HDMI/DP", .patch
= patch_nvhdmi
},
3282 { .id
= 0x10de0012, .name
= "GPU 12 HDMI/DP", .patch
= patch_nvhdmi
},
3283 { .id
= 0x10de0013, .name
= "GPU 13 HDMI/DP", .patch
= patch_nvhdmi
},
3284 { .id
= 0x10de0014, .name
= "GPU 14 HDMI/DP", .patch
= patch_nvhdmi
},
3285 { .id
= 0x10de0015, .name
= "GPU 15 HDMI/DP", .patch
= patch_nvhdmi
},
3286 { .id
= 0x10de0016, .name
= "GPU 16 HDMI/DP", .patch
= patch_nvhdmi
},
3287 /* 17 is known to be absent */
3288 { .id
= 0x10de0018, .name
= "GPU 18 HDMI/DP", .patch
= patch_nvhdmi
},
3289 { .id
= 0x10de0019, .name
= "GPU 19 HDMI/DP", .patch
= patch_nvhdmi
},
3290 { .id
= 0x10de001a, .name
= "GPU 1a HDMI/DP", .patch
= patch_nvhdmi
},
3291 { .id
= 0x10de001b, .name
= "GPU 1b HDMI/DP", .patch
= patch_nvhdmi
},
3292 { .id
= 0x10de001c, .name
= "GPU 1c HDMI/DP", .patch
= patch_nvhdmi
},
3293 { .id
= 0x10de0040, .name
= "GPU 40 HDMI/DP", .patch
= patch_nvhdmi
},
3294 { .id
= 0x10de0041, .name
= "GPU 41 HDMI/DP", .patch
= patch_nvhdmi
},
3295 { .id
= 0x10de0042, .name
= "GPU 42 HDMI/DP", .patch
= patch_nvhdmi
},
3296 { .id
= 0x10de0043, .name
= "GPU 43 HDMI/DP", .patch
= patch_nvhdmi
},
3297 { .id
= 0x10de0044, .name
= "GPU 44 HDMI/DP", .patch
= patch_nvhdmi
},
3298 { .id
= 0x10de0051, .name
= "GPU 51 HDMI/DP", .patch
= patch_nvhdmi
},
3299 { .id
= 0x10de0060, .name
= "GPU 60 HDMI/DP", .patch
= patch_nvhdmi
},
3300 { .id
= 0x10de0067, .name
= "MCP67 HDMI", .patch
= patch_nvhdmi_2ch
},
3301 { .id
= 0x10de8001, .name
= "MCP73 HDMI", .patch
= patch_nvhdmi_2ch
},
3302 { .id
= 0x11069f80, .name
= "VX900 HDMI/DP", .patch
= patch_via_hdmi
},
3303 { .id
= 0x11069f81, .name
= "VX900 HDMI/DP", .patch
= patch_via_hdmi
},
3304 { .id
= 0x11069f84, .name
= "VX11 HDMI/DP", .patch
= patch_generic_hdmi
},
3305 { .id
= 0x11069f85, .name
= "VX11 HDMI/DP", .patch
= patch_generic_hdmi
},
3306 { .id
= 0x80860054, .name
= "IbexPeak HDMI", .patch
= patch_generic_hdmi
},
3307 { .id
= 0x80862801, .name
= "Bearlake HDMI", .patch
= patch_generic_hdmi
},
3308 { .id
= 0x80862802, .name
= "Cantiga HDMI", .patch
= patch_generic_hdmi
},
3309 { .id
= 0x80862803, .name
= "Eaglelake HDMI", .patch
= patch_generic_hdmi
},
3310 { .id
= 0x80862804, .name
= "IbexPeak HDMI", .patch
= patch_generic_hdmi
},
3311 { .id
= 0x80862805, .name
= "CougarPoint HDMI", .patch
= patch_generic_hdmi
},
3312 { .id
= 0x80862806, .name
= "PantherPoint HDMI", .patch
= patch_generic_hdmi
},
3313 { .id
= 0x80862807, .name
= "Haswell HDMI", .patch
= patch_generic_hdmi
},
3314 { .id
= 0x80862808, .name
= "Broadwell HDMI", .patch
= patch_generic_hdmi
},
3315 { .id
= 0x80862880, .name
= "CedarTrail HDMI", .patch
= patch_generic_hdmi
},
3316 { .id
= 0x80862882, .name
= "Valleyview2 HDMI", .patch
= patch_generic_hdmi
},
3317 { .id
= 0x808629fb, .name
= "Crestline HDMI", .patch
= patch_generic_hdmi
},
3321 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3322 MODULE_ALIAS("snd-hda-codec-id:10027919");
3323 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3324 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3325 MODULE_ALIAS("snd-hda-codec-id:10951390");
3326 MODULE_ALIAS("snd-hda-codec-id:10951392");
3327 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3328 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3329 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3330 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3331 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3332 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3333 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3334 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3335 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3336 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3337 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3338 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3339 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3340 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3341 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3342 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3343 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3344 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3345 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3346 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3347 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3348 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3349 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3350 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3351 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3352 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3353 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3354 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3355 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3356 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3357 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3358 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3359 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3360 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3361 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3362 MODULE_ALIAS("snd-hda-codec-id:80860054");
3363 MODULE_ALIAS("snd-hda-codec-id:80862801");
3364 MODULE_ALIAS("snd-hda-codec-id:80862802");
3365 MODULE_ALIAS("snd-hda-codec-id:80862803");
3366 MODULE_ALIAS("snd-hda-codec-id:80862804");
3367 MODULE_ALIAS("snd-hda-codec-id:80862805");
3368 MODULE_ALIAS("snd-hda-codec-id:80862806");
3369 MODULE_ALIAS("snd-hda-codec-id:80862807");
3370 MODULE_ALIAS("snd-hda-codec-id:80862808");
3371 MODULE_ALIAS("snd-hda-codec-id:80862880");
3372 MODULE_ALIAS("snd-hda-codec-id:80862882");
3373 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3375 MODULE_LICENSE("GPL");
3376 MODULE_DESCRIPTION("HDMI HD-audio codec");
3377 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3378 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3379 MODULE_ALIAS("snd-hda-codec-atihdmi");
3381 static struct hda_codec_preset_list intel_list
= {
3382 .preset
= snd_hda_preset_hdmi
,
3383 .owner
= THIS_MODULE
,
3386 static int __init
patch_hdmi_init(void)
3388 return snd_hda_add_codec_preset(&intel_list
);
3391 static void __exit
patch_hdmi_exit(void)
3393 snd_hda_delete_codec_preset(&intel_list
);
3396 module_init(patch_hdmi_init
)
3397 module_exit(patch_hdmi_exit
)